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* ARM FastISel integer sext/zext improvementsJF Bastien2013-06-071-38/+103
* R600: Don't compare iterators of different maps.Benjamin Kramer2013-06-071-1/+1
* Teach AsmPrinter how to print odd constants.Quentin Colombet2013-06-071-2/+43
* DIBuilder: No functionality change.Manman Ren2013-06-071-23/+26
* Vincent says the element is at most once in the vector, so we don't need a fu...Benjamin Kramer2013-06-071-3/+7
* Use isxdigit.Rafael Espindola2013-06-071-9/+1
* Fix a typo in asm string of BP* family of instructions. With this fixRoman Divacky2013-06-071-1/+1
* Support OpenBSD's native frame protection conventions.Rafael Espindola2013-06-071-11/+36
* R600: Fix a potential iterator invalidation issue.Benjamin Kramer2013-06-071-5/+3
* R600: Remove an extra break in R600OptimizeVectorRegisters.cppVincent Lejeune2013-06-071-3/+1
* Fold variable that's only used in assert into the assert.Benjamin Kramer2013-06-071-2/+1
* Correct wrong register in this example, pointed out by Baoshan Pang.Duncan Sands2013-06-071-1/+1
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-077-20/+27
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-0711-40/+67
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-073-6/+5
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-074-10/+6
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-079-19/+25
* [objc-arc] Ensure that the cfg path count does not overflow when we multiply ...Michael Gottesman2013-06-071-10/+38
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-0715-42/+48
* Don't cache the instruction info and register info objects.Bill Wendling2013-06-076-28/+22
* DIBuilder: No functionality change.Manman Ren2013-06-071-3/+3
* ARM sched model: Use the right resources for DIVArnold Schwaighofer2013-06-071-1/+1
* ARM sched model: Add VFP div instruction on SwiftArnold Schwaighofer2013-06-071-0/+16
* ARM sched model: Add SIMD/VFP load/store instructions on SwiftArnold Schwaighofer2013-06-071-0/+364
* [Sparc]: Use cmp instruction instead of subcc to compare integers.Venkatraman Govindaraju2013-06-073-17/+19
* Simplify code. No functionality change.Jakub Staszak2013-06-061-2/+1
* R600: Rewrite an awkward loop in R600MachineSchedulerVincent Lejeune2013-06-061-7/+15
* Jeffrey Yasskin volunteered to benchmark the vectorizer on -O2 or -Os when co...Nadav Rotem2013-06-061-1/+7
* Fix break in r183446 - helps to increment the iterator in a loopDavid Blaikie2013-06-061-1/+2
* Revert "ARM sched model: Add SIMD/VFP load/store instructions on Swift"Arnold Schwaighofer2013-06-061-364/+0
* Debug Info: simplify parameter ordering preservationDavid Blaikie2013-06-061-25/+21
* ARM sched model: Add SIMD/VFP load/store instructions on SwiftArnold Schwaighofer2013-06-061-0/+364
* ARM sched model: Add integer VFP/SIMD instructions on SwiftArnold Schwaighofer2013-06-063-0/+125
* Re-apply "Use IRBuilder instead of ConstantInt methods." with the fixed issues.Jakub Staszak2013-06-061-68/+55
* ARM sched model: Add integer load/store instructions on SwiftArnold Schwaighofer2013-06-061-0/+209
* ARM sched model: Add integer arithmetic instructions on SwiftArnold Schwaighofer2013-06-061-0/+155
* ARM sched model: Cortex A9 - More InstRW sched resourcesArnold Schwaighofer2013-06-061-4/+45
* ARM sched model: Add branch thumb instructionsArnold Schwaighofer2013-06-061-18/+21
* ARM sched model: Add branch thumb2 instructionsArnold Schwaighofer2013-06-061-11/+15
* ARM sched model: Add branch instructionsArnold Schwaighofer2013-06-061-27/+35
* ARM sched model: Add preload thumb2 instructionsArnold Schwaighofer2013-06-061-3/+6
* ARM sched model: Add preload instructionsArnold Schwaighofer2013-06-061-2/+4
* Teach llvm-objdump with the -macho parser how to use the data in code tableKevin Enderby2013-06-061-1/+45
* ARM sched model: Add more ALU and CMP thumb instructionsArnold Schwaighofer2013-06-061-46/+61
* Revert "Use IRBuilder instead of ConstantInt methods. It simplifies code a li...Rafael Espindola2013-06-061-56/+70
* ARM sched model: Add more ALU and CMP thumb2 instructionsArnold Schwaighofer2013-06-061-52/+86
* R600: Remove leftover code in R600MachineScheduler.cppVincent Lejeune2013-06-061-16/+0
* Print symbol names in relocations when dumping COFF as YAML.Rafael Espindola2013-06-061-2/+3
* Cast to the correct type. Pointer, not reference.Bill Wendling2013-06-061-1/+1
* R600OptimizeVectorRegisters.cpp: Tweak a warning. [-Wsometimes-uninitialized]NAKAMURA Takumi2013-06-061-1/+1
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