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* refactor the interface to EmitInlineAsm a bit, no functionality change.Chris Lattner2010-11-172-11/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119482 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR8613 - Copy constructor of SwitchInst does not call SwitchInst::initChris Lattner2010-11-171-8/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119463 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy upChris Lattner2010-11-172-26/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119462 91177308-0d34-0410-b5e6-96231b3b80d8
* The machine instruction no longer encodes the submode as a separate operand. WeBill Wendling2010-11-173-6/+14
| | | | | | | should get the submode from the load/store multiple instruction's opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119461 91177308-0d34-0410-b5e6-96231b3b80d8
* Proper encoding for VLDM and VSTM instructions. The register lists for theseBill Wendling2010-11-173-11/+57
| | | | | | | | | | instructions have to distinguish between lists of single- and double-precision registers in order for the ASM matcher to do a proper job. In all other respects, a list of single- or double-precision registers are the same as a list of GPR registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119460 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a layering violation: hasConstantValue, which is part of the PHINodeDuncan Sands2010-11-173-61/+46
| | | | | | | | | | | | | | | class, uses DominatorTree which is an analysis. This change moves all of the tricky hasConstantValue logic to SimplifyInstruction, and replaces it with a very simple literal implementation. I already taught users of hasConstantValue that need tricky stuff to use SimplifyInstruction instead. I didn't update InlineFunction because the IR looks like it might be in a funky state at the point it calls hasConstantValue, which makes calling SimplifyInstruction dangerous since it can in theory do a lot of tricky reasoning. This may be a pessimization, for example in the case where all phi node operands are either undef or a fixed constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119459 91177308-0d34-0410-b5e6-96231b3b80d8
* Have ScalarEvolution use SimplifyInstruction rather than hasConstantValue.Duncan Sands2010-11-171-1/+5
| | | | | | | While there, add a note about an inefficiency I noticed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119458 91177308-0d34-0410-b5e6-96231b3b80d8
* Have RemovePredecessorAndSimplify you SimplifyInstructionDuncan Sands2010-11-171-4/+4
| | | | | | | rather than hasConstantValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119457 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code in GVN: now that SimplifyInstruction is calledDuncan Sands2010-11-171-43/+2
| | | | | | | | | | | systematically, CollapsePhi will always return null here. Note that CollapsePhi did an extra check, isSafeReplacement, which the SimplifyInstruction logic does not do. I think that check was bogus - I guess we will soon find out! (It was originally added in commit 41998 without a testcase). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119456 91177308-0d34-0410-b5e6-96231b3b80d8
* Memoize results from ScalarEvolution's getUnsignedRange and getSignedRange.Dan Gohman2010-11-171-43/+80
| | | | | | | This fixes some extreme compile times on unrolled sha512 code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119455 91177308-0d34-0410-b5e6-96231b3b80d8
* Only avoid the check if we're the last operand before the variableEric Christopher2010-11-171-3/+3
| | | | | | | operands in a variadic instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119446 91177308-0d34-0410-b5e6-96231b3b80d8
* Add binary emission stuff for VLDM/VSTM. This reuses theBill Wendling2010-11-172-6/+49
| | | | | | | | "getRegisterListOpValue" logic. If the registers are double or single precision, the value returned is suitable for VLDM/VSTM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119435 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo: Exectuable -> ExecutablePeter Collingbourne2010-11-172-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119433 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the correct variable names so that the encodings will be correct.Bill Wendling2010-11-162-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119403 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r118917. With pseudo-instruction expansion moved toDan Gohman2010-11-161-5/+5
| | | | | | | | a different pass, the complicated interaction between cmov expansion and fast isel is no longer a concern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119400 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assembling X86CompilationCallback_Win64.asm on VS 10.Oscar Fuentes2010-11-161-2/+2
| | | | | | Patch by Louis Zhuang! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119394 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix grammaro.Dan Gohman2010-11-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119386 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ExpandPseudos.cpp.Evan Cheng2010-11-161-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119385 91177308-0d34-0410-b5e6-96231b3b80d8
* Add .loc methods to the streamer.Rafael Espindola2010-11-1611-26/+77
| | | | | | | Next: Add support for the !HasDotLocAndDotFile case to the MCAsmStreamer and then switch codegen to use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119384 91177308-0d34-0410-b5e6-96231b3b80d8
* Split pseudo-instruction expansion into a separate pass, to make itDan Gohman2010-11-163-13/+87
| | | | | | | | easier to debug, and to avoid complications when the CFG changes in the middle of the instruction selection process. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119382 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix emergency spilling in LiveIntervals::spillPhysRegAroundRegDefsUses.Jakob Stoklund Olesen2010-11-161-22/+23
| | | | | | | | | | | | | | Always spill the full representative register at any point where any subregister is live. This fixes PR8620 which caused the old logic to get confused and not spill anything at all. The fundamental problem here is that the coalescer is too aggressive about physical register coalescing. It sometimes makes it impossible to allocate registers without these emergency spills. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119375 91177308-0d34-0410-b5e6-96231b3b80d8
* Print out the register class of the current interval.Jakob Stoklund Olesen2010-11-161-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119374 91177308-0d34-0410-b5e6-96231b3b80d8
* Parse and ignore some .cfi_* directives.Rafael Espindola2010-11-161-0/+95
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119362 91177308-0d34-0410-b5e6-96231b3b80d8
* This is the first step in adding sane error handling support to LLVMSystem.Michael J. Spencer2010-11-164-0/+298
| | | | | | | | | | | | | | | | | The system API's will be shifted over to returning an error_code, and returning other return values as out parameters to the function. Code that needs to check error conditions will use the errc enum values which are the same as the posix_errno defines (EBADF, E2BIG, etc...), and are compatable with the error codes in WinError.h due to some magic in system_error. An example would be: if (error_code ec = KillEvil("Java")) { // error_code can be converted to bool. handle_error(ec); } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119360 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM conditional mov encoding fix.Jim Grosbach2010-11-161-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119354 91177308-0d34-0410-b5e6-96231b3b80d8
* Have a few places that want to simplify phi nodes use SimplifyInstructionDuncan Sands2010-11-165-13/+18
| | | | | | | rather than calling hasConstantValue. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119352 91177308-0d34-0410-b5e6-96231b3b80d8
* In which I discover the existence of loops. Threading an operationDuncan Sands2010-11-162-62/+104
| | | | | | | | | | | | over a phi node by applying it to each operand may be wrong if the operation and the phi node are mutually interdependent (the testcase has a simple example of this). So only do this transform if it would be correct to perform the operation in each predecessor of the block containing the phi, i.e. if the other operands all dominate the phi. This should fix the FFMPEG snow.c regression reported by İsmail Dönmez. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119347 91177308-0d34-0410-b5e6-96231b3b80d8
* A bit more of gnu as compatibility when handling relocations with aliases.Rafael Espindola2010-11-161-2/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119328 91177308-0d34-0410-b5e6-96231b3b80d8
* L_bit doesn't work here.Bill Wendling2010-11-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119325 91177308-0d34-0410-b5e6-96231b3b80d8
* - Remove dead patterns.Bill Wendling2010-11-163-43/+19
| | | | | | | - Add encodings to the *LDMIA_RET instrs. Probably not needed... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119323 91177308-0d34-0410-b5e6-96231b3b80d8
* vldm and vstm are mnemonics for vldmia and vstmia resp.Bill Wendling2010-11-161-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119321 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the verifier a little quieter on instructions that it's probablyEric Christopher2010-11-161-1/+3
| | | | | | | (and likely) wrong about anyhow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119320 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug I introduced in the ppc refactoring, which caused longChris Lattner2010-11-161-0/+1
| | | | | | | | | | | | branches to be emitted as: bne cr0, 2 instead of: bne cr0, $+8 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119317 91177308-0d34-0410-b5e6-96231b3b80d8
* Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling2010-11-1612-536/+562
| | | | | | | | | | 'db', 'ib', 'da') instead of having that mode as a separate field in the instruction. It's more convenient for the asm parser and much more readable for humans. <rdar://problem/8654088> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119310 91177308-0d34-0410-b5e6-96231b3b80d8
* Object: Get rid of sys::Path, Triple, and cleanup namespace.Michael J. Spencer2010-11-161-7/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119309 91177308-0d34-0410-b5e6-96231b3b80d8
* add copy of comment to the code that will survive the mcjit'izationChris Lattner2010-11-161-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119308 91177308-0d34-0410-b5e6-96231b3b80d8
* relax an assertion a bit, allowing the GPR argument ofChris Lattner2010-11-162-2/+6
| | | | | | | | | these instructions to be encoded with getMachineOpValue. This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll when running on a G5 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119307 91177308-0d34-0410-b5e6-96231b3b80d8
* Remember to resize SpillSlotToUsesMap when allocating an emergency spill slot.Jakob Stoklund Olesen2010-11-162-19/+19
| | | | | | | | | Use amazing new function call technology instead of writing identical code in multiple places. This fixes PR8604. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119306 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR8612 in the standard spiller, take two.Jakob Stoklund Olesen2010-11-161-1/+8
| | | | | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. Except when it is an early clobber tied to a use operand. Then it starts at the def slot like a standard def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119305 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Thumb2 encodings for mov and friends.Owen Anderson2010-11-161-23/+50
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119295 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the 11 byte nop to be a single instruction.Rafael Espindola2010-11-151-4/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119286 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a pasto that massively broke the ppc jit while the buildbots happenedChris Lattner2010-11-151-2/+2
| | | | | | | | to be broken for other reasons git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119283 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Fix PR8612 in the standard spiller as well."Jakob Stoklund Olesen2010-11-151-5/+1
| | | | | | This reverts r119183 which borke the buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119270 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to provide encodings for some miscellaneous Thumb2 encodings.Owen Anderson2010-11-151-14/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119187 91177308-0d34-0410-b5e6-96231b3b80d8
* Code clean up. The peephole pass should be the one updating the instructionEvan Cheng2010-11-153-24/+18
| | | | | | | iterator, not TII->OptimizeCompareInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119186 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide Thumb2 encodings for sxtb and friends.Owen Anderson2010-11-151-32/+42
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119185 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommit this change and remove the failing part of the test - it didn'tEric Christopher2010-11-151-4/+5
| | | | | | | | pass in the first place and was masked by earlier failures not warning and aborting the block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119184 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR8612 in the standard spiller as well.Jakob Stoklund Olesen2010-11-151-1/+5
| | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119183 91177308-0d34-0410-b5e6-96231b3b80d8
* When spilling a register defined by an early clobber, make sure that the newJakob Stoklund Olesen2010-11-151-0/+6
| | | | | | | | | | | | | live ranges for the spill register are also defined at the use slot instead of the normal def slot. This fixes PR8612 for the inline spiller. A use was being allocated to the same register as a spilled early clobber def. This problem exists in all the spillers. A fix for the standard spiller is forthcoming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119182 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding.Jim Grosbach2010-11-154-38/+151
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119180 91177308-0d34-0410-b5e6-96231b3b80d8
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