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* Add support for Thumb2 literal loads with negative zero offsetMihai Popa2013-08-162-4/+4
* Fix Thumb2 aliasing complementary instructions taking modified immediatesMihai Popa2013-08-162-5/+6
* [SystemZ] Use SRST to implement strlen and strnlenRichard Sandiford2013-08-168-0/+122
* [SystemZ] Use MVST to implement strcpy and stpcpyRichard Sandiford2013-08-168-0/+68
* [SystemZ] Use CLST to implement strcmpRichard Sandiford2013-08-169-10/+168
* [SystemZ] Fix handling of 64-bit memcmp resultsRichard Sandiford2013-08-163-19/+38
* [SystemZ] Fix sign of integer memcmp resultRichard Sandiford2013-08-162-36/+34
* This patch implements wait instruction for mips. Examples are added in test f...Vladimir Medic2013-08-161-0/+11
* Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8...Craig Topper2013-08-162-12/+12
* Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"Tom Stellard2013-08-163-8/+10
* R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructionsTom Stellard2013-08-163-10/+8
* R600: Add support for global vector loads with element types less than 32-bitsTom Stellard2013-08-161-0/+13
* R600: Add support for global vector stores with elements less than 32-bitsTom Stellard2013-08-163-1/+72
* R600: Add support for i16 and i8 global storesTom Stellard2013-08-168-27/+106
* R600: Add support for v4i32 stores on CaymanTom Stellard2013-08-161-0/+1
* R600: Enable folding of inline literals into REQ_SEQUENCE instructionsTom Stellard2013-08-162-17/+23
* R600: Add IsExport bit to TableGen instruction definitionsTom Stellard2013-08-166-10/+16
* R600: Change the RAT instruction assembly names so they match the docsTom Stellard2013-08-162-32/+35
* InstCombine: Simplify if(x!=0 && x!=-1).Jim Grosbach2013-08-161-1/+6
* Tighten up the yamilizer so it stops eliding empty sequences if the embedded ...Aaron Ballman2013-08-151-0/+17
* Don't do FoldCmpLoadFromIndexedGlobal for non inbounds GEPsMatt Arsenault2013-08-151-9/+2
* Fix spellingMatt Arsenault2013-08-152-9/+9
* Support X86_64_GOTLoad relocations in RuntimeDyldMachO by treating them theLang Hames2013-08-151-4/+4
* Fixing a corner-case bug in strchr and strrchr lib call optimizations whereYunzhong Gao2013-08-151-2/+2
* make arm-use-movt available for all ARMRenato Golin2013-08-151-3/+3
* make arm-reserve-r9 available for all ARMRenato Golin2013-08-151-2/+3
* Make a few more things const.Bill Wendling2013-08-151-2/+2
* Use a reference instead of making an unnecessary copy. Also use 'const'.Bill Wendling2013-08-151-3/+3
* DataFlowSanitizer: Add a debugging feature to help us track nonzero labels.Peter Collingbourne2013-08-151-2/+48
* Constify the function parameters.Bill Wendling2013-08-151-2/+2
* This fixes three issues related to Thumb literal loads:Mihai Popa2013-08-153-7/+4
* [Mips][msa] Added the simple builtins (madd_q to xori)Jack Carter2013-08-151-0/+842
* [Mips][msa] Added the simple builtins (fadd to ftq)Jack Carter2013-08-151-0/+467
* [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)Jack Carter2013-08-156-20/+1238
* Revert r188449 as it turns out we're just missing the instructions that need ...Craig Topper2013-08-151-9/+26
* Clang and AArch64 backend patches to support shll/shl and vmovl instructions ...Hao Liu2013-08-154-1/+220
* Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type...Craig Topper2013-08-151-26/+9
* Tentative fix for global-buffer-overflow caused by r188426. Found by AddressS...Alexey Samsonov2013-08-151-1/+4
* Use MVT instead of EVT in X86ISelDAGToDAG since all the types should be legal.Craig Topper2013-08-151-29/+29
* Use MVT in place of EVT in more X86 operation lowering functions.Craig Topper2013-08-151-38/+33
* Replace getValueType().getSimpleVT() with getSimpleValueType().Craig Topper2013-08-156-18/+17
* Replace getValueType().getSimpleVT() with getSimpleValueType(). Also remove o...Craig Topper2013-08-155-77/+77
* Auto-compute live intervals on demand.Mark Lacey2013-08-147-90/+115
* Notify LiveRangeEdit of new virtual registers.Mark Lacey2013-08-142-3/+14
* Track new virtual registers by register number.Mark Lacey2013-08-1410-68/+78
* R600/SI: Improve legalization of vector operationsTom Stellard2013-08-144-5/+56
* R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsicsTom Stellard2013-08-144-4/+18
* R600/SI: Convert v16i8 resource descriptors to i128Tom Stellard2013-08-1412-44/+280
* R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2Tom Stellard2013-08-147-111/+86
* R600/SI: Choose the correct MOV instruction for copying immediatesTom Stellard2013-08-145-0/+69
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