aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen/ARM
Commit message (Expand)AuthorAgeFilesLines
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-281-27/+0
* [arm] Implement eabi_attribute, cpu, and fpu directives.Logan Chien2013-10-282-38/+259
* ARM: don't expand atomicrmw inline on Cortex-M0Tim Northover2013-10-251-0/+1
* LegalizeDAG: allow libcalls for max/min atomic operationsTim Northover2013-10-251-0/+24
* ARM: Test r193381 a bit more thoroughly.Jim Grosbach2013-10-241-0/+2
* ARM: Tweak usage of '*vfp' compiler_rt functions.Jim Grosbach2013-10-241-2/+2
* ARM: Use non-VFP softcalls on embedded Darwinish targetsTim Northover2013-10-241-0/+22
* 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targetsDavid Peixotto2013-10-171-0/+1523
* Port to FileCheck.Rafael Espindola2013-10-161-4/+17
* Struct byval: fix a copy-paste error for thumb2.Manman Ren2013-10-151-4/+43
* MachineSink: Fix and tweak critical-edge breaking heuristic.Will Dietz2013-10-144-11/+23
* Add Cortex-A57 supportBernard Ogden2013-10-141-0/+13
* Add subtarget feature support for Cortex-A53Bernard Ogden2013-10-141-4/+8
* Remove kill flags after if conversion if necessaryMatthias Braun2013-10-111-0/+30
* Revert "Tests: Be less dependent on a specific schedule/regalloc"Matthias Braun2013-10-1110-53/+55
* [ARM] Fix FP ABI attributes with no VFP enabled.Amara Emerson2013-10-112-8/+3
* Tests: Be less dependent on a specific schedule/regallocMatthias Braun2013-10-1110-55/+53
* [ARM] Add a test case for disabled neon/fpu features.Amara Emerson2013-10-111-0/+33
* Tests: Use CHECK-LABEL where possibleMatthias Braun2013-10-104-15/+15
* ARM: correct liveness flags during ARMLoadStoreOptTim Northover2013-10-101-0/+40
* Struct byval: use the correct alignment for loads generated to loadManman Ren2013-10-071-0/+27
* Change objectsize intrinsic to accept different address spaces.Matt Arsenault2013-10-071-2/+2
* [ARM] Improve build attributes emission.Amara Emerson2013-10-072-4/+117
* ARM: optimizeSelect has to consider the previous register classMatthias Braun2013-10-041-0/+23
* ARM: do not add a regmask for TAILJUMPsMatthias Braun2013-10-041-0/+35
* ARM: preserve undef flag in pseudo instruction expandersMatthias Braun2013-10-041-0/+7
* [arm] Enhance the test case by checking .fpu directive.Logan Chien2013-10-031-0/+1
* ARM: support interrupt attributeTim Northover2013-10-011-0/+130
* [ARM] Introduce the 'sevl' instruction in ARMv8.Joey Gouly2013-10-011-0/+3
* TBAA: remove !tbaa from testing cases when they are not needed.Manman Ren2013-09-303-43/+29
* Fix PR 17372: Emitting PLD for stack address for ARM Thumb2Weiming Zhao2013-09-261-0/+22
* [ARM] Use the load-acquire/store-release instructions optimally in AArch32.Amara Emerson2013-09-262-15/+1345
* Fix PR 17368: disable vector mul distribution for square of add/sub for ARMWeiming Zhao2013-09-251-0/+11
* [PR16882] Ignore noreturn definitions when setting isPhysRegUsed.Quentin Colombet2013-09-251-0/+38
* CriticalAntiDepBreaker is no longer needed for armv7 scheduling.Andrew Trick2013-09-253-5/+5
* Initialize BSSSection explicitly in InitMachOMCObjectFileInfo() to appease msvc.NAKAMURA Takumi2013-09-211-3/+0
* llvm/test: Mark 3 tests as XFAIL:msvc.NAKAMURA Takumi2013-09-201-0/+3
* [ARMv8] Add support for the v8 cryptography extensions.Amara Emerson2013-09-191-0/+57
* [SelectionDAG] Teach the vector scalarizer about TRUNCATE.Quentin Colombet2013-09-171-0/+20
* [ARMv8] Change hasV8Fp to hasFPARMv8, and other command line optionsJoey Gouly2013-09-133-24/+24
* [ARMv8] Emit the proper .fpu directive.Joey Gouly2013-09-131-0/+7
* [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.Joey Gouly2013-09-095-2/+53
* Debug Info Testing: update context from empty string to null.Manman Ren2013-09-081-1/+1
* Debug Info Testing: updated to use NULL instead of "i32 0" in a few fields.Manman Ren2013-09-068-48/+48
* Debug Info Testing: Updated to use null instead of "i32 0" for containing-typeManman Ren2013-09-063-27/+27
* [ARMv8] Implement the new DMB/DSB operands.Joey Gouly2013-09-051-0/+16
* Reverting 190043 for now.Tilmann Scheller2013-09-051-76/+0
* ARM: Add GPR register class excluding LR for use with the ADR instruction.Tilmann Scheller2013-09-051-0/+76
* Expand and rewrite comment.Eric Christopher2013-09-041-3/+4
* Change swift/vldm test case to be less dependent on allocation orderArnold Schwaighofer2013-09-041-16/+16
generated by cgit v1.1 at 2025-02-14 00:44:36 +0000