| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | In the presence of variable sized objects, allocate an emergency spill slot. | Jim Grosbach | 2010-07-09 | 1 | -2/+2 |
| * | Fix test to be less sensitive of regalloc accidents | Jakob Stoklund Olesen | 2010-07-09 | 1 | -1/+1 |
| * | Print "dregpair" NEON operands with a space between them, for readability and | Bob Wilson | 2010-07-09 | 1 | -2/+2 |
| * | Reenable DAG combining for vector shuffles. It looks like it was temporarily | Bob Wilson | 2010-07-09 | 2 | -10/+12 |
| * | Check for FiniteOnlyFPMath as well. | Evan Cheng | 2010-07-08 | 1 | -1/+1 |
| * | r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0. | Evan Cheng | 2010-07-08 | 1 | -1/+1 |
| * | Optimize some vfp comparisons to integer ones. This patch implements the simp... | Evan Cheng | 2010-07-08 | 1 | -0/+29 |
| * | Changes to ARM tail calls, mostly cosmetic. | Dale Johannesen | 2010-07-08 | 1 | -2/+11 |
| * | Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion | Rafael Espindola | 2010-07-06 | 1 | -1/+1 |
| * | Fix incorrect asm-printing of some NEON immediates. Fix weak testcase so | Bob Wilson | 2010-07-02 | 1 | -34/+20 |
| * | Implement the "linker_private_weak" linkage type. This will be used for | Bill Wendling | 2010-07-01 | 1 | -1/+1 |
| * | Fix the handling of partial redefines in the fast register allocator. | Jakob Stoklund Olesen | 2010-06-29 | 1 | -0/+22 |
| * | Fix a register scavenger crash when dealing with undefined subregs. | Bob Wilson | 2010-06-29 | 1 | -0/+15 |
| * | Add a VT argument to getMinimalPhysRegClass and replace the copy related uses | Rafael Espindola | 2010-06-29 | 1 | -1/+1 |
| * | Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they | Bob Wilson | 2010-06-28 | 1 | -0/+10 |
| * | When splitting a VAARG, remember its alignment. | Rafael Espindola | 2010-06-26 | 1 | -0/+19 |
| * | Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This was | Daniel Dunbar | 2010-06-25 | 1 | -0/+75 |
| * | Change if-conversion block size limit checks to add some flexibility. | Evan Cheng | 2010-06-25 | 1 | -1/+1 |
| * | Teach EmitLiveInCopies to omit copies for unused virtual registers, | Dan Gohman | 2010-06-24 | 1 | -4/+4 |
| * | It's possible that a flag is added to the SDNode that points back to the | Bill Wendling | 2010-06-24 | 1 | -0/+27 |
| * | Replace a big gob of old coalescer logic with the new CoalescerPair class. | Jakob Stoklund Olesen | 2010-06-24 | 1 | -2/+2 |
| * | Eliminate the other half of the BRCOND optimization, and update | Dan Gohman | 2010-06-24 | 1 | -2/+2 |
| * | Revert "Replace a big gob of old coalescer logic with the new CoalescerPair c... | Jakob Stoklund Olesen | 2010-06-24 | 1 | -2/+2 |
| * | Replace a big gob of old coalescer logic with the new CoalescerPair class. | Jakob Stoklund Olesen | 2010-06-24 | 1 | -2/+2 |
| * | We are missing opportunites to use ldm. Take code like this: | Bill Wendling | 2010-06-23 | 1 | -3/+5 |
| * | Reinstate correct test, remove the real invalidated test. | Dale Johannesen | 2010-06-23 | 1 | -4/+2 |
| * | Remove tests invalidated by previous checkin. | Dale Johannesen | 2010-06-23 | 3 | -69/+0 |
| * | Thumb1 functions using @llvm.returnaddress were not saving the incoming LR. | Bob Wilson | 2010-06-22 | 1 | -1/+3 |
| * | Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores wh... | Evan Cheng | 2010-06-21 | 1 | -0/+148 |
| * | Add missing FileCheck call. | Dale Johannesen | 2010-06-21 | 1 | -1/+1 |
| * | Fix PR 7433. Silly typo in non-Darwin ARM tail call | Dale Johannesen | 2010-06-21 | 1 | -0/+145 |
| * | Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emi... | Evan Cheng | 2010-06-19 | 1 | -4/+7 |
| * | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng | 2010-06-18 | 1 | -5/+10 |
| * | Fix an inverted condition. | Evan Cheng | 2010-06-18 | 1 | -1/+1 |
| * | When using ADDri to get the address of a stack object, 255 is a conservative | Jakob Stoklund Olesen | 2010-06-18 | 1 | -0/+16 |
| * | Enable tail calls on ARM by default, with some | Dale Johannesen | 2010-06-18 | 4 | -0/+107 |
| * | Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86 | Jakob Stoklund Olesen | 2010-06-18 | 1 | -0/+12 |
| * | Remove arm_apcscc from the test files. It is the default and doing this | Rafael Espindola | 2010-06-17 | 48 | -141/+141 |
| * | Remove the local register allocator. | Jakob Stoklund Olesen | 2010-06-15 | 4 | -4/+0 |
| * | Set the mtriple in some tests so that they use AAPCS. | Rafael Espindola | 2010-06-15 | 4 | -4/+4 |
| * | Remove the arm_aapcscc marker from the tests. It is the default | Rafael Espindola | 2010-06-15 | 8 | -16/+16 |
| * | Generalize the pre-coalescing of extract_subregs feeding reg_sequences, | Bob Wilson | 2010-06-15 | 1 | -2/+2 |
| * | Add a missing bitcast. This code used to only handle conversions between | Bob Wilson | 2010-06-11 | 1 | -0/+19 |
| * | Re-apply 105308 with fix. | Evan Cheng | 2010-06-04 | 1 | -0/+18 |
| * | More tail call removal. | Dale Johannesen | 2010-06-04 | 1 | -1/+1 |
| * | Remove more tail calls. | Dale Johannesen | 2010-06-04 | 2 | -2/+2 |
| * | Remove a tail call, and move some CHECKs to the | Dale Johannesen | 2010-06-04 | 1 | -3/+3 |
| * | Revert 105308. | Bob Wilson | 2010-06-03 | 1 | -18/+0 |
| * | Enable machine cse of instructions which define physical registers. | Evan Cheng | 2010-06-02 | 1 | -0/+18 |
| * | Fix some latency computation bugs: if the use is not a machine opcode do not ... | Evan Cheng | 2010-05-28 | 2 | -13/+14 |
