| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | ARM: Allocation hints must make sure to be in the alloc order. | Jim Grosbach | 2013-02-19 | 1 | -0/+53 |
| * | FileCheck-ify some grep tests | Reid Kleckner | 2013-01-25 | 1 | -2/+2 |
| * | Remove some register allocation order dependencies. | Jakob Stoklund Olesen | 2013-01-19 | 1 | -1/+1 |
| * | On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, | Evan Cheng | 2012-12-20 | 1 | -13/+69 |
| * | Fix typos in CHECK lines. | Dmitri Gribenko | 2012-12-06 | 1 | -1/+1 |
| * | Add GPRPair Register class to ARM. | Jakob Stoklund Olesen | 2012-10-26 | 1 | -2/+2 |
| * | Fix a miscompilation caused by a typo. When turning a adde with negative value | Evan Cheng | 2012-10-24 | 1 | -0/+13 |
| * | Add LLVM support for Swift. | Bob Wilson | 2012-09-29 | 4 | -3/+24 |
| * | Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte | Evan Cheng | 2012-09-18 | 1 | -2/+2 |
| * | Use predication instead of pseudo-opcodes when folding into MOVCC. | Jakob Stoklund Olesen | 2012-09-05 | 1 | -2/+2 |
| * | Patch to implement UMLAL/SMLAL instructions for the ARM architecture | Arnold Schwaighofer | 2012-09-04 | 1 | -0/+44 |
| * | Add ADD and SUB to the predicable ARM instructions. | Jakob Stoklund Olesen | 2012-08-16 | 1 | -9/+9 |
| * | Fold predicable instructions into MOVCC / t2MOVCC. | Jakob Stoklund Olesen | 2012-08-15 | 1 | -1/+1 |
| * | [arm-fast-isel] Add support for vararg function calls. | Jush Lu | 2012-07-19 | 1 | -4/+5 |
| * | Fix the remaining TCL-style quotes found in the testsuite. This is | Chandler Carruth | 2012-07-02 | 2 | -2/+2 |
| * | Do not attempt to use ROR for Thumb1. | Bob Wilson | 2012-07-02 | 1 | -2/+4 |
| * | Fix the TCL-style quoting in one random test that somehow slipped | Chandler Carruth | 2012-07-02 | 1 | -1/+1 |
| * | Convert all tests using TCL-style quoting to use shell-style quoting. | Chandler Carruth | 2012-07-02 | 2 | -5/+5 |
| * | Add a test case for global live range splitting. | Jakob Stoklund Olesen | 2012-05-23 | 1 | -0/+27 |
| * | Add a last resort tryInstructionSplit() to RAGreedy. | Jakob Stoklund Olesen | 2012-05-23 | 1 | -0/+22 |
| * | FileCheck'ize test, and add a bit to test for r157221. | Jim Grosbach | 2012-05-21 | 1 | -1/+7 |
| * | Use the right register class for LDRrs. | Jakob Stoklund Olesen | 2012-05-20 | 1 | -2/+2 |
| * | Refactor data-in-code annotations. | Jim Grosbach | 2012-05-18 | 1 | -1/+3 |
| * | Remove -join-physregs from the test suite. | Jakob Stoklund Olesen | 2012-05-17 | 7 | -63/+63 |
| * | Added a regress test for the bug #9964 before close it. | Danil Malyshev | 2012-05-09 | 1 | -0/+9 |
| * | Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits... | Sebastian Pop | 2012-05-04 | 1 | -4/+14 |
| * | If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume | Evan Cheng | 2012-04-26 | 1 | -7/+14 |
| * | Fix updateTerminator to be resiliant to degenerate terminators where | Chandler Carruth | 2012-04-16 | 1 | -1/+1 |
| * | Flip the new block-placement pass to be on by default. | Chandler Carruth | 2012-04-16 | 3 | -8/+16 |
| * | Don't break the IV update in TLI::SimplifySetCC(). | Jakob Stoklund Olesen | 2012-04-05 | 1 | -8/+3 |
| * | Don't kill the base register when expanding strd. | Jakob Stoklund Olesen | 2012-03-28 | 1 | -0/+15 |
| * | Spill DPair registers, not just QPR. | Jakob Stoklund Olesen | 2012-03-28 | 1 | -1/+15 |
| * | Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu | Eli Bendersky | 2012-03-25 | 1 | -8/+1 |
| * | Enable ARM base pointer when calling functions with large arguments. | Jakob Stoklund Olesen | 2012-02-28 | 1 | -0/+29 |
| * | Thumb2 size reduction fix for tied operands of tMUL. | Jim Grosbach | 2012-02-24 | 2 | -2/+2 |
| * | Replace all instances of dg.exp file with lit.local.cfg, since all tests are ... | Eli Bendersky | 2012-02-16 | 2 | -5/+13 |
| * | After r147827 and r147902, it's now possible for unallocatable registers to be | Evan Cheng | 2012-01-14 | 1 | -0/+103 |
| * | Consider unknown alignment caused by OptimizeThumb2Instructions(). | Jakob Stoklund Olesen | 2012-01-10 | 1 | -0/+1400 |
| * | Allow machine-cse to look across MBB boundary when cse'ing instructions that | Evan Cheng | 2012-01-10 | 1 | -1/+0 |
| * | Enable aligned NEON spilling by default. | Jakob Stoklund Olesen | 2012-01-06 | 1 | -2/+2 |
| * | Reapply r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-05 | 1 | -1/+1 |
| * | Fix more places which should be checking for iOS, not darwin. | Evan Cheng | 2012-01-04 | 3 | -3/+3 |
| * | Revert r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-03 | 1 | -1/+1 |
| * | Experimental support for aligned NEON spills. | Jakob Stoklund Olesen | 2011-12-23 | 1 | -0/+73 |
| * | Heed spill slot alignment on ARM. | Jakob Stoklund Olesen | 2011-12-20 | 1 | -0/+22 |
| * | ARM target code clean up. Check for iOS, not Darwin where it makes sense. | Evan Cheng | 2011-12-20 | 1 | -1/+1 |
| * | Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle. | Evan Cheng | 2011-12-17 | 1 | -0/+28 |
| * | Fix off-by-one error in bucket sort. | Jakob Stoklund Olesen | 2011-12-16 | 1 | -0/+26 |
| * | - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function | Evan Cheng | 2011-12-14 | 2 | -2/+2 |
| * | Manually upgrade the test suite to specify the flag to cttz and ctlz. | Chandler Carruth | 2011-12-12 | 1 | -2/+2 |
