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* MachineSink: Fix and tweak critical-edge breaking heuristic.Will Dietz2013-10-141-4/+1
* Fixed a bug in dynamic allocation memory on stack.Elena Demikhovsky2013-10-141-2/+2
* Fix spelling intruction -> instruction.Robert Wilhelm2013-09-281-1/+1
* [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.Joey Gouly2013-09-095-0/+236
* ARM: make sure ARM-mode pseudo-inst requires IsARMTim Northover2013-08-231-1/+10
* ARM: use TableGen patterns to select CMOV operations.Tim Northover2013-08-221-3/+11
* ARM: R9 is not safe to use for tcGPR.Jim Grosbach2013-08-221-0/+14
* [tests] Cleanup initialization of test suffixes.Daniel Dunbar2013-08-161-2/+0
* Refactor AnalyzeBranch on ARM. The previous version did not always analyzeLang Hames2013-07-191-3/+3
* Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-181-1/+1
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-1484-330/+330
* Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging....Stephen Lin2013-07-136-17/+17
* ARM: Fix incorrect pack pattern for thumb2Jim Grosbach2013-07-091-1/+24
* ARM: allow predicated barriers in Thumb modeTim Northover2013-06-261-10/+12
* Cortex-R5 can issue Thumb2 integer division instructions.Evan Cheng2013-06-041-9/+11
* Fix ARM FastISel tests, as a first step to enabling ARM FastISelDerek Schuff2013-05-141-1/+1
* TBAA: remove !tbaa from testing cases if not used.Manman Ren2013-04-301-7/+3
* SDAG: Handle scalarizing an extend of a <1 x iN> vector.Jim Grosbach2013-03-071-0/+19
* ARM: Creating a vector from a lane of another.Jim Grosbach2013-03-021-0/+14
* Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls2013-02-222-9/+9
* Make RAFast::UsedInInstr indexed by register units.Jakob Stoklund Olesen2013-02-211-0/+9
* ARM: Allocation hints must make sure to be in the alloc order.Jim Grosbach2013-02-191-0/+53
* FileCheck-ify some grep testsReid Kleckner2013-01-251-2/+2
* Remove some register allocation order dependencies.Jakob Stoklund Olesen2013-01-191-1/+1
* On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,Evan Cheng2012-12-201-13/+69
* Fix typos in CHECK lines.Dmitri Gribenko2012-12-061-1/+1
* Add GPRPair Register class to ARM.Jakob Stoklund Olesen2012-10-261-2/+2
* Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng2012-10-241-0/+13
* Add LLVM support for Swift.Bob Wilson2012-09-294-3/+24
* Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byteEvan Cheng2012-09-181-2/+2
* Use predication instead of pseudo-opcodes when folding into MOVCC.Jakob Stoklund Olesen2012-09-051-2/+2
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-09-041-0/+44
* Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen2012-08-161-9/+9
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-151-1/+1
* [arm-fast-isel] Add support for vararg function calls.Jush Lu2012-07-191-4/+5
* Fix the remaining TCL-style quotes found in the testsuite. This isChandler Carruth2012-07-022-2/+2
* Do not attempt to use ROR for Thumb1.Bob Wilson2012-07-021-2/+4
* Fix the TCL-style quoting in one random test that somehow slippedChandler Carruth2012-07-021-1/+1
* Convert all tests using TCL-style quoting to use shell-style quoting.Chandler Carruth2012-07-022-5/+5
* Add a test case for global live range splitting.Jakob Stoklund Olesen2012-05-231-0/+27
* Add a last resort tryInstructionSplit() to RAGreedy.Jakob Stoklund Olesen2012-05-231-0/+22
* FileCheck'ize test, and add a bit to test for r157221.Jim Grosbach2012-05-211-1/+7
* Use the right register class for LDRrs.Jakob Stoklund Olesen2012-05-201-2/+2
* Refactor data-in-code annotations.Jim Grosbach2012-05-181-1/+3
* Remove -join-physregs from the test suite.Jakob Stoklund Olesen2012-05-177-63/+63
* Added a regress test for the bug #9964 before close it.Danil Malyshev2012-05-091-0/+9
* Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits...Sebastian Pop2012-05-041-4/+14
* If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assumeEvan Cheng2012-04-261-7/+14
* Fix updateTerminator to be resiliant to degenerate terminators whereChandler Carruth2012-04-161-1/+1
* Flip the new block-placement pass to be on by default.Chandler Carruth2012-04-163-8/+16