aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen
Commit message (Expand)AuthorAgeFilesLines
* Don't form PPC CTR-based loops around a copysignl callHal Finkel2013-08-191-0/+28
* Improve the widening of integral binary vector operationsPaul Redmond2013-08-193-10/+4
* AVX-512: added arithmetic and logical operations.Elena Demikhovsky2013-08-192-3/+229
* [SystemZ] Add negative integer absolute (load negative)Richard Sandiford2013-08-191-0/+91
* [SystemZ] Add integer absolute (load positive)Richard Sandiford2013-08-191-0/+83
* [SystemZ] Add support for sibling callsRichard Sandiford2013-08-193-154/+125
* Add ExpandFloatOp_FCOPYSIGN to handle ppcf128-related expansionsHal Finkel2013-08-191-0/+67
* Add the PPC fcpsgn instructionHal Finkel2013-08-191-0/+52
* ARM: make sure we keep inline asm operands tied.Tim Northover2013-08-181-0/+9
* AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.Elena Demikhovsky2013-08-181-0/+75
* R600: Expand vector FRINT opsTom Stellard2013-08-161-0/+54
* R600: Expand vector FFLOOR opsTom Stellard2013-08-161-0/+54
* R600: Expand vector float operations for both SI and R600Tom Stellard2013-08-164-75/+110
* ARM: Properly constrain comparison fastisel register classes.Jim Grosbach2013-08-161-1/+1
* ARM: Fast-isel register class constrain for extends.Jim Grosbach2013-08-166-17/+17
* ARM: Fix more fast-isel verifier failures.Jim Grosbach2013-08-161-1/+1
* ARM: Clean up fast-isel machine verifier errors.Jim Grosbach2013-08-169-41/+41
* Fix a subtle difference between running clang vs llc for mips16.Reed Kotler2013-08-161-0/+27
* [tests] Another attempt to workaround broken misched-copy.s test on some buil...Daniel Dunbar2013-08-162-1/+9
* R600/SI: Add pattern for xor of i1Michel Danzer2013-08-161-0/+17
* R600/SI: Fix broken encoding of DS_WRITE_B32Michel Danzer2013-08-161-2/+2
* When initializing the PIC global base register on ARM/ELF add pc to fix the a...Benjamin Kramer2013-08-161-0/+4
* [SystemZ] Use SRST to implement strlen and strnlenRichard Sandiford2013-08-162-0/+78
* [SystemZ] Use MVST to implement strcpy and stpcpyRichard Sandiford2013-08-161-0/+50
* [SystemZ] Use CLST to implement strcmpRichard Sandiford2013-08-162-0/+142
* [SystemZ] Fix handling of 64-bit memcmp resultsRichard Sandiford2013-08-162-1/+136
* [SystemZ] Fix sign of integer memcmp resultRichard Sandiford2013-08-161-8/+7
* Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8...Craig Topper2013-08-161-0/+41
* [tests] Add a hack to eliminate some dangling .s files on buildbots.Daniel Dunbar2013-08-161-0/+8
* [tests] Remove an out-dated failing test.Daniel Dunbar2013-08-162-41/+0
* Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"Tom Stellard2013-08-161-2/+2
* R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructionsTom Stellard2013-08-161-2/+2
* R600: Add support for global vector loads with element types less than 32-bitsTom Stellard2013-08-161-0/+176
* R600: Add support for global vector stores with elements less than 32-bitsTom Stellard2013-08-161-0/+62
* R600: Add support for i16 and i8 global storesTom Stellard2013-08-162-2/+61
* R600: Add support for v4i32 stores on CaymanTom Stellard2013-08-162-1/+15
* R600: Enable folding of inline literals into REQ_SEQUENCE instructionsTom Stellard2013-08-161-0/+13
* R600: Change the RAT instruction assembly names so they match the docsTom Stellard2013-08-165-25/+25
* [tests] Cleanup initialization of test suffixes.Daniel Dunbar2013-08-1619-42/+5
* [Mips][msa] Added the simple builtins (madd_q to xori)Jack Carter2013-08-1514-0/+3692
* [Mips][msa] Added the simple builtins (fadd to ftq)Jack Carter2013-08-1511-0/+1710
* [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)Jack Carter2013-08-1513-0/+4027
* Revert r188449 as it turns out we're just missing the instructions that need ...Craig Topper2013-08-151-8/+0
* Clang and AArch64 backend patches to support shll/shl and vmovl instructions ...Hao Liu2013-08-152-0/+241
* Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type...Craig Topper2013-08-151-0/+8
* R600/SI: Improve legalization of vector operationsTom Stellard2013-08-141-0/+111
* R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsicsTom Stellard2013-08-141-0/+17
* R600/SI: Convert v16i8 resource descriptors to i128Tom Stellard2013-08-142-34/+34
* R600/SI: Use i8 types for resource descriptors in testsTom Stellard2013-08-144-62/+62
* R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2Tom Stellard2013-08-142-1/+51
generated by cgit v1.1 at 2025-01-09 07:06:31 +0000