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* Comment out the rdar number.Chad Rosier2013-02-181-1/+1
* [fast-isel] Remove an invalid assert.Chad Rosier2013-02-181-0/+7
* Support for HiPE-compatible code emission, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-181-0/+67
* R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad patternVincent Lejeune2013-02-181-0/+19
* Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16.Reed Kotler2013-02-181-0/+96
* Expand pseudo/macro BteqzT8SltX16.Reed Kotler2013-02-181-0/+98
* Expand macro/pseudo BteqzT8CmpX16.Reed Kotler2013-02-181-0/+96
* Beginning of expanding all current mips16 macro/pseudo instruction sequences.Reed Kotler2013-02-181-0/+95
* Force a cpu for test. It failed on atom due to different scheduling decisions.Benjamin Kramer2013-02-171-1/+1
* Replace "check:" wth "CHECK:".Jakub Staszak2013-02-161-4/+4
* Reinitialize the ivars in the subtarget so that they can be reset with the ne...Bill Wendling2013-02-161-1/+0
* [ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier2013-02-161-2/+8
* Temporary revert of 175320.Bill Wendling2013-02-151-0/+1
* Reinitialize the ivars in the subtarget.Bill Wendling2013-02-151-0/+66
* enable SDISel sincos optimization for GNU environmentsPaul Redmond2013-02-151-14/+40
* AArch64: remove ConstantIsland pass & put literals in separate section.Tim Northover2013-02-159-31/+38
* AArch64: refactor frame handling to use movz/movk for overlarge offsets.Tim Northover2013-02-151-18/+15
* Fix minor mips16 issues in directives for function prologue. Probably this doesReed Kotler2013-02-151-4/+20
* Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.Nadav Rotem2013-02-141-0/+34
* Re-apply r175088 for bug fix 13622: Add paired register support forWeiming Zhao2013-02-142-2/+55
* R600: Do not fold single instruction with more that 3 kcache readVincent Lejeune2013-02-141-0/+52
* Make ARMAsmParser accept the correct alignment specifier syntax in instructions.Kristof Beyls2013-02-141-1/+1
* Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure).Elena Demikhovsky2013-02-141-0/+14
* R600: Add lit tests for texture sampling instruction selection.Michel Danzer2013-02-142-0/+113
* Reapply "s/grep/FileCheck/ in some tests"Andrew Trick2013-02-145-6/+15
* Revert "s/grep/FileCheck/ in some tests"Andrew Trick2013-02-145-16/+6
* temporarily revert the patch due to some conflictsWeiming Zhao2013-02-132-55/+2
* Hexagon: add support for predicate-GPR copies.Anshuman Dasgupta2013-02-131-0/+8
* R600: Add support for 128-bit parametersTom Stellard2013-02-131-0/+18
* s/grep/FileCheck/ in some testsEli Bendersky2013-02-131-1/+2
* s/grep/FileCheck/ in some testsEli Bendersky2013-02-135-6/+16
* Bug fix 13622: Add paired register support for inline asm with 64-bit data on...Weiming Zhao2013-02-132-2/+55
* [ms-inline asm] Fix up test case for non-Darwin platforms.Chad Rosier2013-02-131-1/+1
* Hexagon: Use absolute addressing mode loads/stores for global+offset Jyotsna Verma2013-02-132-0/+86
* [ms-inline-asm] Add support for memory references that have non-immediateChad Rosier2013-02-131-0/+23
* For Mips 16, add the optimization where the 16 bit form of addiu sp can be usedReed Kotler2013-02-131-0/+31
* PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIADavid Peixotto2013-02-131-0/+28
* X86: Disable generation of rep;movsl when %esi is used as a base pointer.Benjamin Kramer2013-02-131-0/+18
* Make jumptables work for -staticReed Kotler2013-02-131-0/+71
* Prevent insertion of "vzeroupper" before call that preserves YMM registers, s...Elena Demikhovsky2013-02-131-0/+40
* Check i1 as well as i8 variables for 8 bit registers for x86 inlineEric Christopher2013-02-131-0/+31
* Finish obviously broken thought.Eric Christopher2013-02-131-1/+1
* Fix the lit test added in r174972Paul Redmond2013-02-121-2/+2
* Hexagon: Add support to generate predicated absolute addressing modeJyotsna Verma2013-02-121-0/+19
* PR14562 - Truncation of left shift became undefPaul Redmond2013-02-121-0/+15
* [NVPTX] Disable vector registersJustin Holewinski2013-02-121-0/+66
* ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer2013-02-121-0/+27
* Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek2013-02-117-0/+1528
* [NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture ...Justin Holewinski2013-02-111-0/+21
* Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are theReed Kotler2013-02-081-0/+30
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