| Commit message (Expand) | Author | Age | Files | Lines |
* | Add an option which permits the user to specify using a bitmask, that various | Reed Kotler | 2013-08-20 | 1 | -0/+23 |
* | ARM: Fix fast-isel copy/paste-o. | Jim Grosbach | 2013-08-20 | 1 | -5/+6 |
* | AVX-512: Added more patterns for VMOVSS, VMOVSD, VMOVD, VMOVQ | Elena Demikhovsky | 2013-08-20 | 1 | -0/+27 |
* | [mips][msa] Removed fcge, fcgt, fsge, fsgt | Daniel Sanders | 2013-08-20 | 1 | -176/+0 |
* | [SystemZ] Use SRST to optimize memchr | Richard Sandiford | 2013-08-20 | 2 | -0/+78 |
* | [mips][msa] Added insve | Daniel Sanders | 2013-08-20 | 1 | -0/+91 |
* | Fix test typo and add usual "br %r14" test | Richard Sandiford | 2013-08-20 | 1 | -1/+2 |
* | Fix overly pessimistic shortcut in post-RA MachineLICM | Richard Sandiford | 2013-08-20 | 1 | -0/+22 |
* | ARM: implement some simple f64 materializations. | Tim Northover | 2013-08-20 | 2 | -3/+70 |
* | [mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v | Daniel Sanders | 2013-08-20 | 1 | -0/+176 |
* | Don't form PPC CTR-based loops around a copysignl call | Hal Finkel | 2013-08-19 | 1 | -0/+28 |
* | Improve the widening of integral binary vector operations | Paul Redmond | 2013-08-19 | 3 | -10/+4 |
* | AVX-512: added arithmetic and logical operations. | Elena Demikhovsky | 2013-08-19 | 2 | -3/+229 |
* | [SystemZ] Add negative integer absolute (load negative) | Richard Sandiford | 2013-08-19 | 1 | -0/+91 |
* | [SystemZ] Add integer absolute (load positive) | Richard Sandiford | 2013-08-19 | 1 | -0/+83 |
* | [SystemZ] Add support for sibling calls | Richard Sandiford | 2013-08-19 | 3 | -154/+125 |
* | Add ExpandFloatOp_FCOPYSIGN to handle ppcf128-related expansions | Hal Finkel | 2013-08-19 | 1 | -0/+67 |
* | Add the PPC fcpsgn instruction | Hal Finkel | 2013-08-19 | 1 | -0/+52 |
* | ARM: make sure we keep inline asm operands tied. | Tim Northover | 2013-08-18 | 1 | -0/+9 |
* | AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions. | Elena Demikhovsky | 2013-08-18 | 1 | -0/+75 |
* | R600: Expand vector FRINT ops | Tom Stellard | 2013-08-16 | 1 | -0/+54 |
* | R600: Expand vector FFLOOR ops | Tom Stellard | 2013-08-16 | 1 | -0/+54 |
* | R600: Expand vector float operations for both SI and R600 | Tom Stellard | 2013-08-16 | 4 | -75/+110 |
* | ARM: Properly constrain comparison fastisel register classes. | Jim Grosbach | 2013-08-16 | 1 | -1/+1 |
* | ARM: Fast-isel register class constrain for extends. | Jim Grosbach | 2013-08-16 | 6 | -17/+17 |
* | ARM: Fix more fast-isel verifier failures. | Jim Grosbach | 2013-08-16 | 1 | -1/+1 |
* | ARM: Clean up fast-isel machine verifier errors. | Jim Grosbach | 2013-08-16 | 9 | -41/+41 |
* | Fix a subtle difference between running clang vs llc for mips16. | Reed Kotler | 2013-08-16 | 1 | -0/+27 |
* | [tests] Another attempt to workaround broken misched-copy.s test on some buil... | Daniel Dunbar | 2013-08-16 | 2 | -1/+9 |
* | R600/SI: Add pattern for xor of i1 | Michel Danzer | 2013-08-16 | 1 | -0/+17 |
* | R600/SI: Fix broken encoding of DS_WRITE_B32 | Michel Danzer | 2013-08-16 | 1 | -2/+2 |
* | When initializing the PIC global base register on ARM/ELF add pc to fix the a... | Benjamin Kramer | 2013-08-16 | 1 | -0/+4 |
* | [SystemZ] Use SRST to implement strlen and strnlen | Richard Sandiford | 2013-08-16 | 2 | -0/+78 |
* | [SystemZ] Use MVST to implement strcpy and stpcpy | Richard Sandiford | 2013-08-16 | 1 | -0/+50 |
* | [SystemZ] Use CLST to implement strcmp | Richard Sandiford | 2013-08-16 | 2 | -0/+142 |
* | [SystemZ] Fix handling of 64-bit memcmp results | Richard Sandiford | 2013-08-16 | 2 | -1/+136 |
* | [SystemZ] Fix sign of integer memcmp result | Richard Sandiford | 2013-08-16 | 1 | -8/+7 |
* | Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8... | Craig Topper | 2013-08-16 | 1 | -0/+41 |
* | [tests] Add a hack to eliminate some dangling .s files on buildbots. | Daniel Dunbar | 2013-08-16 | 1 | -0/+8 |
* | [tests] Remove an out-dated failing test. | Daniel Dunbar | 2013-08-16 | 2 | -41/+0 |
* | Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions" | Tom Stellard | 2013-08-16 | 1 | -2/+2 |
* | R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions | Tom Stellard | 2013-08-16 | 1 | -2/+2 |
* | R600: Add support for global vector loads with element types less than 32-bits | Tom Stellard | 2013-08-16 | 1 | -0/+176 |
* | R600: Add support for global vector stores with elements less than 32-bits | Tom Stellard | 2013-08-16 | 1 | -0/+62 |
* | R600: Add support for i16 and i8 global stores | Tom Stellard | 2013-08-16 | 2 | -2/+61 |
* | R600: Add support for v4i32 stores on Cayman | Tom Stellard | 2013-08-16 | 2 | -1/+15 |
* | R600: Enable folding of inline literals into REQ_SEQUENCE instructions | Tom Stellard | 2013-08-16 | 1 | -0/+13 |
* | R600: Change the RAT instruction assembly names so they match the docs | Tom Stellard | 2013-08-16 | 5 | -25/+25 |
* | [tests] Cleanup initialization of test suffixes. | Daniel Dunbar | 2013-08-16 | 19 | -42/+5 |
* | [Mips][msa] Added the simple builtins (madd_q to xori) | Jack Carter | 2013-08-15 | 14 | -0/+3692 |