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* Use a full triple for a PPC test case for asm syntax.Andrew Trick2012-11-181-3/+3
* Silence the buildbots for this test while I figure out the tripleAndrew Trick2012-11-171-2/+2
* Broaden isSchedulingBoundary to check aliases of SP.Andrew Trick2012-11-171-0/+33
* Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete C...Eli Friedman2012-11-171-0/+8
* [fast-isel] Add the -verify-machineinstrs to these test cases. The remainingChad Rosier2012-11-178-15/+15
* Initial implementation of MipsTargetLowering::isLegalAddressingMode.Akira Hatanaka2012-11-171-0/+41
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-41/+41
* Make sure FABS on v2f32 and v4f32 is legal on ARM NEONAnton Korobeynikov2012-11-161-0/+17
* Fix handling of aliases to functions.Richard Osborne2012-11-161-0/+32
* [NVPTX] Order global variables in def-use order before emiting them in the fi...Justin Holewinski2012-11-161-0/+20
* llvm/test/CodeGen/X86/hipe-cc*.ll: Add explicit -mcpu, or they don't expect t...NAKAMURA Takumi2012-11-162-2/+2
* Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.Duncan Sands2012-11-162-0/+164
* Use roundps/pd for llvm.ceil, llvm.trunc, llvm.rint, and llvm.nearbyint of ve...Craig Topper2012-11-161-0/+144
* [mips] Fix delay slot filler so that instructions with register operand $1 areAkira Hatanaka2012-11-161-0/+32
* Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missingEli Friedman2012-11-151-0/+9
* PowerPC: Lowering floor intrinsic for AltivecAdhemerval Zanella2012-11-151-0/+172
* This patch is in preparation for adding medium code model support to theBill Schmidt2012-11-144-4/+4
* Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.Jakub Staszak2012-11-144-8/+8
* test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the f...NAKAMURA Takumi2012-11-141-1/+1
* Remove the CellSPU port.Eric Christopher2012-11-1459-7313/+0
* llvm/test/CodeGen/X86/memset.ll: FileCheck-ize, and add another case on +avx.NAKAMURA Takumi2012-11-141-2/+23
* Added multiclass for post-increment load instructions.Jyotsna Verma2012-11-141-0/+29
* Force CPU in test so we don't accidentally get AVX code on an AVX-capable host.Benjamin Kramer2012-11-141-2/+2
* X86: Enable SSE memory intrinsics even when stack alignment is less than 16 b...Benjamin Kramer2012-11-144-22/+79
* The code pattern "imm0_255_neg" is used for checking if an immediate value is...Nadav Rotem2012-11-141-0/+31
* [NVPTX] Implement custom lowering of loads/stores for i1Justin Holewinski2012-11-141-0/+26
* Fix really stupid ARM EHABI info generation bug: we should not emitAnton Korobeynikov2012-11-141-0/+18
* Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.Rafael Espindola2012-11-141-0/+12
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-141-0/+44
* Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."Eric Christopher2012-11-131-2/+2
* X86: when constructing VZEXT_LOAD from other loads, makes sure its outputManman Ren2012-11-131-0/+51
* Do not consider a machine instruction that uses and defines the sameUlrich Weigand2012-11-131-0/+18
* Codegen support for arbitrary vector getelementptrs.Duncan Sands2012-11-131-0/+5
* Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling2012-11-131-2/+2
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-131-1/+1
* Fix test case added in patch fixing PR14314Michael Liao2012-11-121-4/+4
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-121-0/+2
* Fix PR14314Michael Liao2012-11-122-4/+17
* [NVPTX] Add more precise PTX/SM target attributesJustin Holewinski2012-11-1210-0/+60
* Convert an improper CodeGen test to a MC test.Evan Cheng2012-11-101-25/+0
* xfail a bad test. This is a MC test but it's dependent on a codegen optimizat...Evan Cheng2012-11-101-0/+2
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-102-15/+0
* Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper2012-11-101-5/+47
* [NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski2012-11-091-0/+25
* Fix assertions in updateRegMaskSlots().Jakob Stoklund Olesen2012-11-091-0/+45
* Recommit modified r167540.Amara Emerson2012-11-081-2/+2
* Add support of RTM from TSX extensionMichael Liao2012-11-081-0/+30
* [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka2012-11-071-0/+63
* misched: Heuristics based on the machine model.Andrew Trick2012-11-071-0/+230
* On PowerPC64, integer return values (as well as arguments) are supposedUlrich Weigand2012-11-052-1/+99
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