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* Merging r195574:Bill Wendling2013-11-271-2/+0
* Merging r195573:Bill Wendling2013-11-271-6/+16
* Merging r195779:Bill Wendling2013-11-271-0/+10
* Merging r195424:Bill Wendling2013-11-262-0/+155
* Merging r195408:Bill Wendling2013-11-261-42/+42
* Merging r195713:Bill Wendling2013-11-261-0/+3
* Merging r195469:Bill Wendling2013-11-261-0/+31
* Merging r195444:Bill Wendling2013-11-261-0/+27
* Merging r195364:Bill Wendling2013-11-261-0/+33
* Merging r195343:Bill Wendling2013-11-261-0/+141
* Merging r195731:Richard Sandiford2013-11-261-0/+14
* Merging r195716:Bill Wendling2013-11-261-0/+14
* Merging r195670:Bill Wendling2013-11-251-0/+31
* Merging r195636:Bill Wendling2013-11-251-29/+0
* Merging r195635:Daniel Sanders2013-11-251-0/+143
* Merging r195330:Bill Wendling2013-11-251-0/+80
* Merging r195327:Bill Wendling2013-11-252-70/+37
* Merging r195514:Bill Wendling2013-11-252-9/+577
* Merging r195491:Bill Wendling2013-11-251-0/+42
* Merging r195476:Bill Wendling2013-11-251-0/+16
* Merging r195599:Bill Wendling2013-11-251-0/+29
* Merging r195439:Bill Wendling2013-11-222-4/+6
* Add file missing from r195474.Richard Sandiford2013-11-221-0/+49
* Merging r195473:Richard Sandiford2013-11-221-0/+1
* Merging r195398:Bill Wendling2013-11-221-0/+15
* Merging r195339:Bill Wendling2013-11-211-32/+0
* Merging r195333:Bill Wendling2013-11-211-0/+1
* Merging r195355:Daniel Sanders2013-11-212-0/+234
* Merging r195317:Bill Wendling2013-11-211-0/+31
* Merging r195272:Bill Wendling2013-11-211-0/+16
* Merging r195318:Bill Wendling2013-11-212-6/+4
* Merging r195129:Bill Wendling2013-11-201-0/+1
* Merging r195094:Bill Wendling2013-11-191-1/+41
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-192-0/+2432
* Implement AArch64 SISD intrinsics for vget_high and vget_low.Jiangning Liu2013-11-191-0/+225
* Add predicate for AArch64 crypto instructions.Jiangning Liu2013-11-191-1/+3
* R600/SI: Fix moveToVALU when the first operand is VSrc.Matt Arsenault2013-11-181-11/+10
* R600/SI: Fix multiple SGPR reads when using VCC.Matt Arsenault2013-11-181-3/+18
* R600/SI: Implement add i64, but do not yet enable.Matt Arsenault2013-11-181-0/+45
* R600/SI: Move patterns to match add / sub to scalar instructionsMatt Arsenault2013-11-184-20/+24
* R600: Enable the IR structurizer by defaultTom Stellard2013-11-183-3/+3
* R600: Fix a crash in the AMDILCFGStrucurizerTom Stellard2013-11-181-0/+62
* R600/SI: Fix illegal VGPR->SGPR copy inside of loopTom Stellard2013-11-181-0/+31
* R600/SI: Fix another case of illegal VGPR->SGPR copyTom Stellard2013-11-181-0/+26
* [PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV.NAKAMURA Takumi2013-11-182-0/+4
* [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code fo...Daniel Sanders2013-11-181-0/+31
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-182-101/+1269
* Testcase for PR17964Bill Wendling2013-11-171-0/+10
* DAGCombiner: Partially revert r192795, getNOT was fixed not to create illegal...Benjamin Kramer2013-11-171-0/+2
* Added a size field to the stack map record to handle subregister spills.Andrew Trick2013-11-172-60/+132
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