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* Update aosp/master LLVM for rebase to r235153Pirama Arumuga Nainar2015-05-1816-11/+297
| | | | | Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7 (cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-091-4/+4
| | | | Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-236-6/+8
| | | | Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-0211-43/+255
| | | | Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
* Update LLVM for rebase to r212749.Stephen Hines2014-07-2111-10/+450
| | | | | | | Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-2964-3459/+13141
| | | | Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
* Update to LLVM 3.5a.Stephen Hines2014-04-248-44/+215
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* Merging r195803:Bill Wendling2013-12-012-0/+25
| | | | | | | | | | | ------------------------------------------------------------------------ r195803 | mcrosier | 2013-11-26 17:45:58 -0800 (Tue, 26 Nov 2013) | 1 line [AArch64] Add support for NEON scalar floating-point absolute difference. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195994 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195788:Bill Wendling2013-12-012-0/+278
| | | | | | | | | | | | ------------------------------------------------------------------------ r195788 | mcrosier | 2013-11-26 14:17:37 -0800 (Tue, 26 Nov 2013) | 2 lines [AArch64] Add support for NEON scalar floating-point to integer convert instructions. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195993 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195330:Bill Wendling2013-11-251-0/+26
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195330 | apazos | 2013-11-21 00:16:15 -0800 (Thu, 21 Nov 2013) | 5 lines Implemented Neon scalar vdup_lane intrinsics. Fixed scalar dup alias and added test case. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195612 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-192-0/+444
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195078 91177308-0d34-0410-b5e6-96231b3b80d8
* implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit ↵Kevin Qin2013-11-192-0/+16
| | | | | | integer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195072 91177308-0d34-0410-b5e6-96231b3b80d8
* Add predicate for AArch64 crypto instructions.Jiangning Liu2013-11-191-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195071 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64 NEON]Add mov alias for simd copy instructions.Kevin Qin2013-11-181-10/+36
| | | | | | Set some unspecified bits of INS/DUP to zero as ARMARM requested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194996 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case for AArch64 NEON instruction set misc.Kevin Qin2013-11-141-0/+646
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194673 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction class SIMD misc.Kevin Qin2013-11-141-0/+1034
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194656 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 NEON instruction set AdvSIMD (table).Jiangning Liu2013-11-142-0/+104
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194648 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalarChad Rosier2013-11-129-6/+461
| | | | | | | | copy in MC layer. Added the MC layer tests. Fixed triple setting in test cases. Patch by Ana Pazos <apazos@codeaurora.org>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194501 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point convert to fixed-point ↵Chad Rosier2013-11-112-0/+56
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194394 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon instruction set Perm.Jiangning Liu2013-11-062-0/+519
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194123 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon instruction set Bitwise Extract.Jiangning Liu2013-11-062-0/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194118 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon Crypto instruction classes AES, SHA, and 3 SHA.Jiangning Liu2013-11-052-0/+148
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194085 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 post-index vector load/store multiple N-element structure ↵Hao Liu2013-11-052-0/+445
| | | | | | | | | | | | | class SIMD(lselem-post). Including following 14 instructions: 4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194043 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar fixed-point convert to floating-point ↵Chad Rosier2013-10-312-0/+60
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193816 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add diagnostic tests for NEON scalar shift immediate instructions ↵Chad Rosier2013-10-311-0/+295
| | | | | | (see: r193790). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193798 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar shift immediate instructions.Chad Rosier2013-10-312-12/+198
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193790 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Make the use of FP instructions optional, but enabled by default.Amara Emerson2013-10-313-3/+3
| | | | | | | | This adds a new subtarget feature called FPARMv8 (implied by NEON), and predicates the support of the FP instructions and registers on this feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193739 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point compare instructions.Chad Rosier2013-10-302-0/+243
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193691 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-281-0/+209
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193538 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-281-0/+59
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193537 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-281-0/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193536 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert a llc -filetype=obj test into a llvm-mc test.Rafael Espindola2013-10-281-0/+98
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193534 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar extract narrow instructions.Chad Rosier2013-10-182-0/+95
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192970 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar three register different instructionChad Rosier2013-10-172-0/+72
| | | | | | | | class. The instruction class includes the signed saturating doubling multiply-add long, signed saturating doubling multiply-subtract long, and the signed saturating doubling multiply long instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192908 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar negate instruction.Chad Rosier2013-10-162-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192843 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar absolute value instruction.Chad Rosier2013-10-162-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192842 91177308-0d34-0410-b5e6-96231b3b80d8
* Update comment.Chad Rosier2013-10-162-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192806 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar signed saturating accumulated of unsignedChad Rosier2013-10-162-0/+71
| | | | | | value and unsigned saturating accumulate of signed value instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192800 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar signed saturating absolute value andChad Rosier2013-10-152-0/+34
| | | | | | scalar signed saturating negate instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192733 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar integer compare instructions.Chad Rosier2013-10-142-0/+200
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192596 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction set AdvSIMD (copy).Kevin Qin2013-10-112-0/+223
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192410 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 vector load/store multiple N-element structure class ↵Hao Liu2013-10-102-0/+684
| | | | | | | | | | | | | SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Implement AArch64 vector load/store multiple N-element structure ↵Rafael Espindola2013-10-102-684/+0
| | | | | | | | class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)." This reverts commit r192352. It broke the build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192354 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 vector load/store multiple N-element structure class ↵Hao Liu2013-10-102-0/+684
| | | | | | | | | | | | | | SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192352 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: migrate ADRP relaxation test to be llvm-mc only.Tim Northover2013-10-091-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192281 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point reciprocal estimate,Chad Rosier2013-10-082-0/+71
| | | | | | reciprocal exponent, and reciprocal square root estimate instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192242 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar signed/unsigned integer to floating-pointChad Rosier2013-10-081-0/+23
| | | | | | convert instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192231 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar arithmetic instructions:Chad Rosier2013-10-073-0/+124
| | | | | | SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192107 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction set AdvSIMD (Across).Jiangning Liu2013-10-052-0/+264
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192028 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction set AdvSIMD (3V elem).Jiangning Liu2013-10-042-0/+1030
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191944 91177308-0d34-0410-b5e6-96231b3b80d8
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