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* Tidy up. These tests are covered in the .s file tests now.Jim Grosbach2011-10-031-236/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141047 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify printing of ARM shifted immediates.Jim Grosbach2011-07-111-4/+3
| | | | | | | | | | Print shifted immediate values directly rather than as a payload+shifter value pair. This makes for more readable output assembly code, simplifies the instruction printer, and is consistent with how Thumb immediates are displayed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134902 91177308-0d34-0410-b5e6-96231b3b80d8
* Explicitly request -join-physregs for some tests that depend on it.Jakob Stoklund Olesen2011-05-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130855 91177308-0d34-0410-b5e6-96231b3b80d8
* Constants with multiple encodings (ARM):Johnny Chen2011-04-051-3/+3
| | | | | | | | | | | An alternative syntax is available for a modified immediate constant that permits the programmer to specify the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where: <byte> is the numeric value of abcdefgh, in the range 0-255 <rot> is twice the numeric value of rotation, an even number in the range 0-30. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128897 91177308-0d34-0410-b5e6-96231b3b80d8
* Roll r127459 back in:Cameron Zwarich2011-03-111-1/+1
| | | | | | | | | | | Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often getDaniel Dunbar2011-03-111-1/+1
| | | | | | created from the", it broke some GCC test suite tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize trivial branches in CodeGenPrepare, which often get created from theCameron Zwarich2011-03-111-1/+1
| | | | | | | | | | lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127459 91177308-0d34-0410-b5e6-96231b3b80d8
* Add encoding for ARM "trap" instruction.Bill Wendling2010-11-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119938 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a CMP test.Jim Grosbach2010-10-221-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117187 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy up.Jim Grosbach2010-10-221-25/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117166 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM mode encoding information for CLZ, RBIT, REV*, and PKH*.Jim Grosbach2010-10-221-1/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117165 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the encoding information for the rest of the ARM mode multiply instructions.Jim Grosbach2010-10-221-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117133 91177308-0d34-0410-b5e6-96231b3b80d8
* More ARM multiply instuction binary encodings.Jim Grosbach2010-10-221-0/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117121 91177308-0d34-0410-b5e6-96231b3b80d8
* More ARM multiply instruction encoding information.Jim Grosbach2010-10-221-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117108 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM binary encodings for MVN variants.Jim Grosbach2010-10-211-1/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117076 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM Binary encoding information for BFC/BFI instructions.Jim Grosbach2010-10-211-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117072 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM mode encoding information for UBFX and SBFX instructions.Jim Grosbach2010-10-151-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify test file a bit.Jim Grosbach2010-10-141-10/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116540 91177308-0d34-0410-b5e6-96231b3b80d8
* Add testcase for RRX and ASRS (which effectively tests MOVs, since thoseJim Grosbach2010-10-141-0/+8
| | | | | | are just forms of that instruction). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116538 91177308-0d34-0410-b5e6-96231b3b80d8
* MOVi16 and MOVT ARM mode encodings.Jim Grosbach2010-10-141-0/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116498 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.Jim Grosbach2010-10-131-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ARM mode operand encoding information for ADDE/SUBE instructions.Jim Grosbach2010-10-131-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116412 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ARM encoding information for comparisons, forced-cc-out arithmetics, andJim Grosbach2010-10-131-1/+10
| | | | | | arithmetic-with-carry-in instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116384 91177308-0d34-0410-b5e6-96231b3b80d8
* Be nitpicky and line up the comments.Jim Grosbach2010-10-121-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116365 91177308-0d34-0410-b5e6-96231b3b80d8
* Add encoding information for the remainder of the generic arithmeticJim Grosbach2010-10-121-0/+11
| | | | | | ARM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116313 91177308-0d34-0410-b5e6-96231b3b80d8
* MC machine encoding for simple aritmetic instructions that use a shiftedJim Grosbach2010-10-111-4/+16
| | | | | | register operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116259 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a few more binary encoding bits. Still very early stage proof-of-Jim Grosbach2010-10-081-1/+9
| | | | | | | | | | concept level stuff at this point, but it is generally working for those instructions that know how to map the operands. This patch fills in the register operands for add/sub/or/etc instructions and adds the conditional execution predicate encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116112 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test file for simple ARM binary encodings with MCJim Grosbach2010-10-081-0/+18
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116024 91177308-0d34-0410-b5e6-96231b3b80d8
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