| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Change the second line of the test added for r152414 to use CHECK-NEXT. | Kevin Enderby | 2012-03-12 | 1 | -1/+1 |
| * | Fix the x86 disassembler to at least print the lock prefix if it is the first | Kevin Enderby | 2012-03-09 | 1 | -0/+5 |
| * | X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by ... | Craig Topper | 2012-02-27 | 1 | -0/+5 |
| * | Add vmfunc instruction to X86 assembler and disassembler. | Craig Topper | 2012-02-19 | 1 | -0/+3 |
| * | Add X86 assembler and disassembler support for AMD SVM instructions. Original... | Craig Topper | 2012-02-18 | 1 | -0/+24 |
| * | Add disassembler support for VPERMIL2PD and VPERMIL2PS. | Craig Topper | 2011-12-30 | 1 | -2/+5 |
| * | Add FMA4 instructions to disassembler. | Craig Topper | 2011-12-30 | 1 | -0/+6 |
| * | Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 ins... | Craig Topper | 2011-12-29 | 1 | -0/+12 |
| * | Expose FMA3 instructions to the disassembler. | Craig Topper | 2011-12-29 | 1 | -0/+24 |
| * | Add X86 SARX, SHRX, and SHLX instructions. | Craig Topper | 2011-10-23 | 1 | -0/+36 |
| * | Add X86 RORX instruction | Craig Topper | 2011-10-23 | 1 | -0/+12 |
| * | Add X86 MULX instruction for disassembler. | Craig Topper | 2011-10-23 | 1 | -0/+12 |
| * | Rename PEXTR to PEXT. Add intrinsics for BMI instructions. | Craig Topper | 2011-10-19 | 1 | -4/+4 |
| * | Add X86 PEXTR and PDEP instructions. | Craig Topper | 2011-10-16 | 1 | -0/+24 |
| * | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper | 2011-10-16 | 1 | -0/+12 |
| * | Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMR... | Craig Topper | 2011-10-16 | 1 | -0/+3 |
| * | Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3... | Craig Topper | 2011-10-16 | 1 | -0/+12 |
| * | Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ... | Craig Topper | 2011-10-15 | 1 | -0/+18 |
| * | Add X86 ANDN instruction. Including instruction selection. | Craig Topper | 2011-10-14 | 1 | -0/+12 |
| * | Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro... | Craig Topper | 2011-10-14 | 1 | -0/+9 |
| * | Revert r141854 because it was causing failures: | Bill Wendling | 2011-10-13 | 1 | -9/+0 |
| * | Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro... | Craig Topper | 2011-10-13 | 1 | -0/+9 |
| * | Add X86 LZCNT instruction. Including instruction selection support. | Craig Topper | 2011-10-11 | 1 | -0/+9 |
| * | Fix disassembling of popcntw. Also remove some code that says it accounts for... | Craig Topper | 2011-10-11 | 1 | -0/+9 |
| * | Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa... | Craig Topper | 2011-10-09 | 1 | -8/+32 |
| * | Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE. | Craig Topper | 2011-10-07 | 1 | -0/+24 |
| * | Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT. | Craig Topper | 2011-10-07 | 1 | -0/+9 |
| * | Add support in the disassembler for ignoring the L-bit on certain VEX instruc... | Craig Topper | 2011-10-04 | 1 | -0/+27 |
| * | Add support for MOVBE and RDRAND instructions for the assembler and disassemb... | Craig Topper | 2011-10-03 | 1 | -0/+27 |
| * | Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to re... | Craig Topper | 2011-10-03 | 1 | -0/+3 |
| * | Fix some Intel syntax disassembly issues with instructions that implicitly us... | Craig Topper | 2011-10-02 | 1 | -0/+54 |
| * | Special case disassembler handling of REX.B prefix on NOP instruction to deco... | Craig Topper | 2011-10-02 | 1 | -0/+3 |
| * | Fix disassembling of INVEPT and INVVPID to take operands | Craig Topper | 2011-10-01 | 1 | -0/+6 |
| * | Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2... | Craig Topper | 2011-10-01 | 1 | -0/+12 |
| * | Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND fr... | Craig Topper | 2011-09-14 | 1 | -0/+18 |
| * | Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fix... | Craig Topper | 2011-09-14 | 1 | -0/+3 |
| * | Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from bein... | Craig Topper | 2011-09-13 | 1 | -12/+48 |
| * | Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVA... | Craig Topper | 2011-09-11 | 1 | -0/+60 |
| * | Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SB... | Craig Topper | 2011-09-11 | 1 | -0/+12 |
| * | Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disasse... | Craig Topper | 2011-09-11 | 1 | -0/+3 |
| * | Change X86 disassembly to print immediates values as signed by default. Special | Kevin Enderby | 2011-09-02 | 1 | -0/+56 |
| * | Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form fr... | Craig Topper | 2011-09-02 | 1 | -0/+3 |
| * | Add vvvv support to disassembling of instructions with MRMDestMem and MRMDest... | Craig Topper | 2011-08-30 | 1 | -0/+3 |
| * | Fix disassembling of VCVTSD2SI | Craig Topper | 2011-08-26 | 1 | -0/+9 |
| * | Give ATTR_VEX higher priority when generating the disassembler context table.... | Craig Topper | 2011-08-25 | 1 | -0/+3 |
| * | Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be dis... | Craig Topper | 2011-08-25 | 1 | -0/+6 |
| * | Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler | Craig Topper | 2011-08-19 | 1 | -0/+6 |
| * | Basic sanity checks to ensure that 2- and 3-byte | Sean Callanan | 2011-03-15 | 1 | -0/+6 |
| * | Segregate tests by target. | Dale Johannesen | 2010-11-14 | 1 | -0/+68 |
