| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Replace all instances of dg.exp file with lit.local.cfg, since all tests are ... | Eli Bendersky | 2012-02-16 | 24 | -64/+144 |
| * | For ELF, also call fixSymbolsInTLSFixups() on expressions passed to EmitValue... | David Meyer | 2012-02-15 | 2 | -2/+102 |
| * | Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE... | James Molloy | 2012-02-09 | 1 | -0/+5 |
| * | Fixed a crash in llvm-mc for Mach-O when a symbol difference expression uses a | Kevin Enderby | 2012-01-31 | 1 | -0/+27 |
| * | Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,... | Devang Patel | 2012-01-30 | 1 | -0/+3 |
| * | Intel syntax. Support .intel_syntax directive. | Devang Patel | 2012-01-30 | 1 | -0/+7 |
| * | Ensure .AliasedSymbol() is called on all uses of getSymbol(). Affects ARM and... | James Molloy | 2012-01-28 | 2 | -0/+12 |
| * | Small improvement to the recursion detection logic from the previous commit. | Rafael Espindola | 2012-01-28 | 1 | -0/+4 |
| * | Handle recursive variable definitions directly. This gives us better error | Rafael Espindola | 2012-01-28 | 2 | -1/+13 |
| * | Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320] | Devang Patel | 2012-01-27 | 1 | -0/+2 |
| * | Add support for the R_ARM_TARGET1 relocation, which should be given to reloca... | James Molloy | 2012-01-26 | 1 | -0/+12 |
| * | ARM assemly parsing and validation of IT instruction. | Jim Grosbach | 2012-01-25 | 1 | -0/+11 |
| * | NEON VLD4(all lanes) assembly parsing and encoding. | Jim Grosbach | 2012-01-25 | 1 | -0/+40 |
| * | NEON VLD3(all lanes) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 1 | -0/+41 |
| * | ARM Darwin symbol ref differences w/o subsection-via-symbols. | Jim Grosbach | 2012-01-24 | 1 | -0/+18 |
| * | Intel Syntax: Extend special hand coded logic, to recognize special instructi... | Devang Patel | 2012-01-24 | 1 | -0/+3 |
| * | NEON VST4(one lane) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 1 | -11/+33 |
| * | NEON VLD4(one lane) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 1 | -11/+33 |
| * | NEON Two-operand assembly aliases for VSRA. | Jim Grosbach | 2012-01-24 | 1 | -33/+71 |
| * | Remove redundant test file. | Jim Grosbach | 2012-01-24 | 1 | -98/+0 |
| * | NEON Two-operand assembly aliases for VSLI. | Jim Grosbach | 2012-01-24 | 1 | -16/+33 |
| * | NEON Two-operand assembly aliases for VSRI. | Jim Grosbach | 2012-01-24 | 1 | -16/+33 |
| * | Tidy up. | Jim Grosbach | 2012-01-24 | 1 | -32/+41 |
| * | NEON VST4(multiple 4 element structures) assembly parsing. | Jim Grosbach | 2012-01-24 | 1 | -17/+39 |
| * | NEON VLD4(multiple 4 element structures) assembly parsing. | Jim Grosbach | 2012-01-24 | 1 | -19/+39 |
| * | NEON VST3(single element from one lane) assembly parsing. | Jim Grosbach | 2012-01-24 | 1 | -0/+35 |
| * | NEON VST3(multiple 3-element structures) assembly parsing. | Jim Grosbach | 2012-01-23 | 1 | -19/+39 |
| * | NEON VLD3(multiple 3-element structures) assembly parsing. | Jim Grosbach | 2012-01-23 | 2 | -65/+73 |
| * | Intel syntax: Robustify parsing of memory operand's displacement experssion. | Devang Patel | 2012-01-23 | 1 | -2/+4 |
| * | NEON VLD3 lane-indexed assembly parsing and encoding. | Jim Grosbach | 2012-01-23 | 1 | -11/+33 |
| * | Add support for .cfi_signal_frame. Fixes pr11762. | Rafael Espindola | 2012-01-23 | 1 | -0/+23 |
| * | Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] | Devang Patel | 2012-01-23 | 1 | -1/+3 |
| * | Simplify some NEON assembly pseudo definitions. | Jim Grosbach | 2012-01-23 | 1 | -8/+8 |
| * | Intel syntax: Parse segment registers. | Devang Patel | 2012-01-23 | 1 | -0/+2 |
| * | Intel syntax: Robustify register parsing. | Devang Patel | 2012-01-20 | 1 | -0/+2 |
| * | Intel syntax: Parse ... PTR [-8] | Devang Patel | 2012-01-20 | 1 | -1/+2 |
| * | Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax. | Devang Patel | 2012-01-20 | 1 | -1/+4 |
| * | NEON use vmov.i32 to splat some f32 values into vectors. | Jim Grosbach | 2012-01-20 | 1 | -0/+8 |
| * | Post process 'and', 'sub' instructions and select better encoding, if available. | Devang Patel | 2012-01-19 | 1 | -0/+8 |
| * | Intel syntax: There is no need to create unary expr for simple negative displ... | Devang Patel | 2012-01-19 | 1 | -0/+4 |
| * | Post process 'xor', 'or' and 'cmp' instructions and select better encoding, i... | Devang Patel | 2012-01-19 | 1 | -0/+22 |
| * | Add testcase. | Jim Grosbach | 2012-01-19 | 1 | -0/+13 |
| * | Thumb2 alternate syntax for LDR(literal) and friends. | Jim Grosbach | 2012-01-18 | 1 | -0/+27 |
| * | Process instructions after match to select alternative encoding which may be ... | Devang Patel | 2012-01-18 | 1 | -0/+24 |
| * | Thumb2 relaxation for LDR(literal). | Jim Grosbach | 2012-01-18 | 1 | -0/+13 |
| * | MC tweak symbol difference resolution for non-local symbols. | Jim Grosbach | 2012-01-17 | 3 | -5/+7 |
| * | Tidy up. | Jim Grosbach | 2012-01-17 | 1 | -2/+2 |
| * | Intel syntax: Fix parser match class to check memory operand size. | Devang Patel | 2012-01-17 | 1 | -0/+2 |
| * | Intel syntax: Parse "BYTE PTR [RDX + RCX]" | Devang Patel | 2012-01-17 | 1 | -0/+2 |
| * | Intel syntax: Do not unncessarily create plus expression for memory operand d... | Devang Patel | 2012-01-17 | 1 | -0/+2 |
