| Commit message (Expand) | Author | Age | Files | Lines |
* | Add X86 SARX, SHRX, and SHLX instructions. | Craig Topper | 2011-10-23 | 3 | -0/+103 |
* | Add X86 RORX instruction | Craig Topper | 2011-10-23 | 3 | -0/+50 |
* | Add X86 MULX instruction for disassembler. | Craig Topper | 2011-10-23 | 2 | -0/+24 |
* | Assembly parsing for 4-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 | 1 | -6/+6 |
* | Assembly parsing for 2-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 | 1 | -7/+7 |
* | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -0/+9 |
* | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -1/+8 |
* | ARM VLD parsing and encoding. | Jim Grosbach | 2011-10-21 | 1 | -8/+8 |
* | Revert r142618, r142622, and r142624, which were based on an incorrect readin... | Owen Anderson | 2011-10-20 | 3 | -23/+73 |
* | Fix decoding tests for fixed MSR encodings. | Owen Anderson | 2011-10-20 | 2 | -55/+5 |
* | Fix tests for corrected MSR encodings. | Owen Anderson | 2011-10-20 | 1 | -18/+18 |
* | ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 | 2 | -224/+222 |
* | Tidy up formatting. | Jim Grosbach | 2011-10-20 | 1 | -46/+59 |
* | ARM VTBX (one register) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 | 1 | -13/+12 |
* | Fix parsing of a line with only a # in it. | Rafael Espindola | 2011-10-19 | 1 | -0/+15 |
* | Rename PEXTR to PEXT. Add intrinsics for BMI instructions. | Craig Topper | 2011-10-19 | 3 | -14/+14 |
* | Tidy up formatting. | Jim Grosbach | 2011-10-18 | 1 | -8/+12 |
* | Tidy up formatting. | Jim Grosbach | 2011-10-18 | 1 | -8/+12 |
* | Enable more encoded immediate tests. | Jim Grosbach | 2011-10-18 | 1 | -5/+5 |
* | More vmov lane testcases. | Jim Grosbach | 2011-10-18 | 1 | -22/+22 |
* | ARM vmla/vmls assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 | 1 | -4/+4 |
* | ARM vmov assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 | 1 | -22/+22 |
* | ARM vmla/vmls assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 | 2 | -4/+8 |
* | Another failing encoding. | Owen Anderson | 2011-10-18 | 1 | -0/+3 |
* | Fix NEON mul encoding tests. Wrong file contents previously. | Jim Grosbach | 2011-10-18 | 1 | -79/+71 |
* | ARM vqdmulh assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 | 1 | -2/+2 |
* | Remove duplicate test. | Jim Grosbach | 2011-10-18 | 1 | -3/+0 |
* | Tidy up formatting. | Jim Grosbach | 2011-10-18 | 1 | -32/+43 |
* | ARM vmul assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 | 1 | -6/+6 |
* | Tidy up. | Jim Grosbach | 2011-10-18 | 1 | -10/+8 |
* | Add a few more testcases. | Owen Anderson | 2011-10-18 | 1 | -0/+5 |
* | Add several FIXME cases for ARM encodings. | Owen Anderson | 2011-10-18 | 2 | -0/+14 |
* | Tests for 142365. | Jim Grosbach | 2011-10-18 | 2 | -0/+16 |
* | Tidy up formatting. | Jim Grosbach | 2011-10-18 | 1 | -32/+48 |
* | ARM assembly parsing and encoding for VMOV.i64. | Jim Grosbach | 2011-10-18 | 2 | -8/+8 |
* | ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32. | Jim Grosbach | 2011-10-18 | 2 | -72/+72 |
* | Enable a few more NEON immediate tests. | Jim Grosbach | 2011-10-17 | 1 | -12/+12 |
* | ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16. | Jim Grosbach | 2011-10-17 | 1 | -12/+12 |
* | Add support for a new extension to the .file directive: | Nick Lewycky | 2011-10-17 | 1 | -1/+2 |
* | ARM NEON "vmov.i8" immediate assembly parsing and encoding. | Jim Grosbach | 2011-10-17 | 2 | -170/+181 |
* | Add X86 PEXTR and PDEP instructions. | Craig Topper | 2011-10-16 | 3 | -0/+68 |
* | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper | 2011-10-16 | 3 | -0/+34 |
* | Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMR... | Craig Topper | 2011-10-16 | 2 | -0/+6 |
* | Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does... | Chris Lattner | 2011-10-16 | 1 | -0/+3 |
* | Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3... | Craig Topper | 2011-10-16 | 3 | -0/+34 |
* | Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ... | Craig Topper | 2011-10-15 | 3 | -0/+84 |
* | Update test for disabling of code/data marker labels in ELF. | Owen Anderson | 2011-10-14 | 1 | -2/+2 |
* | Add X86 ANDN instruction. Including instruction selection. | Craig Topper | 2011-10-14 | 2 | -0/+24 |
* | Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro... | Craig Topper | 2011-10-14 | 2 | -0/+15 |
* | Revert r141854 because it was causing failures: | Bill Wendling | 2011-10-13 | 2 | -15/+0 |