| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [PowerPC] Support ".machine any" | Ulrich Weigand | 2013-07-09 | 1 | -0/+14 |
| * | Add MC assembly/disassembly support for VCVT{A, N, P, M} to V8FP. | Joey Gouly | 2013-07-09 | 2 | -0/+87 |
| * | [PowerPC] Support .llong and fix .word | Ulrich Weigand | 2013-07-09 | 3 | -1/+57 |
| * | CEHCK->CHECK typo fix. | Eric Christopher | 2013-07-08 | 1 | -4/+4 |
| * | Fix up whitespace. | Eric Christopher | 2013-07-08 | 1 | -36/+36 |
| * | [PowerPC] Support time base instructions | Ulrich Weigand | 2013-07-08 | 1 | -0/+9 |
| * | [PowerPC] Support basic compare mnemonics | Ulrich Weigand | 2013-07-08 | 1 | -1/+19 |
| * | Revert: Fix wrong code offset for unwind code SET_FPREG. | Kai Nacke | 2013-07-08 | 1 | -0/+2 |
| * | Revert: Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH data structures. | Kai Nacke | 2013-07-08 | 1 | -22/+1 |
| * | Revert: Fix alignment of unwind data. | Kai Nacke | 2013-07-08 | 3 | -226/+0 |
| * | Add MC support for the v8fp instructions: vmaxnm and vminnm. | Joey Gouly | 2013-07-06 | 2 | -0/+24 |
| * | Fix alignment of unwind data. | Kai Nacke | 2013-07-06 | 3 | -0/+226 |
| * | Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH | Kai Nacke | 2013-07-06 | 1 | -1/+22 |
| * | Fix wrong code offset for unwind code SET_FPREG. | Kai Nacke | 2013-07-06 | 1 | -2/+0 |
| * | MC: Implement COFF .linkonce directive | Nico Rieck | 2013-07-06 | 2 | -0/+219 |
| * | [PowerPC] Add some special @got@tprel fixup cases | Ulrich Weigand | 2013-07-05 | 1 | -0/+20 |
| * | [PowerPC] Make test case buildable with GNU as | Ulrich Weigand | 2013-07-05 | 1 | -12/+7 |
| * | [PowerPC] Support @tls in the asm parser | Ulrich Weigand | 2013-07-05 | 2 | -2/+15 |
| * | MC: Add .section directive to COFF | Nico Rieck | 2013-07-04 | 3 | -2/+178 |
| * | [PowerPC] Implement writeNopData | Ulrich Weigand | 2013-07-04 | 1 | -0/+9 |
| * | Add 'not' in front of a command that is expected to fail. | Rafael Espindola | 2013-07-04 | 1 | -1/+1 |
| * | Add support for MC assembling and disassembling of vsel{ge, gt, eq, vs} instr... | Joey Gouly | 2013-07-04 | 2 | -0/+43 |
| * | [PowerPC] Add all trap mnemonics | Ulrich Weigand | 2013-07-04 | 2 | -2/+149 |
| * | [PowerPC] Add asm parser support for CR expressions | Ulrich Weigand | 2013-07-04 | 1 | -1/+99 |
| * | Add a V8FP instruction 'vcvt{b,t}' to convert between half and double precision. | Joey Gouly | 2013-07-04 | 4 | -0/+68 |
| * | ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certa... | Tilmann Scheller | 2013-07-03 | 1 | -0/+2 |
| * | [PowerPC] Support lmw/stmw in the asm parser | Ulrich Weigand | 2013-07-03 | 1 | -1/+6 |
| * | [PowerPC] Use mtocrf when available | Ulrich Weigand | 2013-07-03 | 2 | -4/+6 |
| * | Prefix failing commands with not to make clear they are expected to fail. | Rafael Espindola | 2013-07-03 | 19 | -23/+23 |
| * | [PowerPC] Support mtspr/mfspr in the asm parser | Ulrich Weigand | 2013-07-03 | 2 | -4/+8 |
| * | This corrects the implementation of Thumb ADR instruction. There are three i... | Mihai Popa | 2013-07-03 | 3 | -6/+16 |
| * | [PowerPC] PR16512 - Support TLS call sequences in the asm parser | Ulrich Weigand | 2013-07-02 | 1 | -0/+14 |
| * | [SystemZ] Add the MVC instruction | Richard Sandiford | 2013-07-02 | 3 | -3/+82 |
| * | Fix ARM EHABI compact model 1 and 2 without handlerdata. | Logan Chien | 2013-07-02 | 1 | -1/+1 |
| * | Cleanup PPC Altivec registers in CSR lists and improve VRSAVE handling | Hal Finkel | 2013-07-02 | 1 | -0/+235 |
| * | [PowerPC] Add support for TLS data relocations | Ulrich Weigand | 2013-07-01 | 1 | -2/+19 |
| * | [PowerPC] Support all condition register logical instructions | Ulrich Weigand | 2013-07-01 | 2 | -7/+22 |
| * | [ARMAsmParser] Sort the ARM register lists based on the encoding value, not the | Chad Rosier | 2013-07-01 | 2 | -21/+21 |
| * | [PowerPC] Also add "msync" alias | Ulrich Weigand | 2013-07-01 | 1 | -0/+2 |
| * | [mips] Increase the number of floating point control registers available to 32. | Akira Hatanaka | 2013-07-01 | 4 | -16/+16 |
| * | [PowerPC] Fix @got references to local symbols | Ulrich Weigand | 2013-07-01 | 1 | -0/+46 |
| * | [PowerPC] Add "wait" instruction | Ulrich Weigand | 2013-07-01 | 1 | -4/+8 |
| * | [PowerPC] Support "eieio" instruction | Ulrich Weigand | 2013-07-01 | 1 | -1/+2 |
| * | [PowerPC] Add some existing instructions to ppc64-encoding-bookII.s | Ulrich Weigand | 2013-07-01 | 1 | -3/+8 |
| * | [PowerPC] Add variants of "sync" instruction | Ulrich Weigand | 2013-07-01 | 1 | -4/+7 |
| * | Added the test missed from r185080. | Serge Pavlov | 2013-07-01 | 1 | -0/+13 |
| * | ARM: Fix pseudo-instructions for SRS (Store Return State). | Tilmann Scheller | 2013-06-28 | 2 | -20/+20 |
| * | Integrate Assembler: Support X86_64_DTPOFF64 relocations | David Blaikie | 2013-06-28 | 1 | -1/+2 |
| * | Improve the compression of the tablegen DiffLists by introducing a new sort | Chad Rosier | 2013-06-27 | 1 | -18/+18 |
| * | [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg | Chad Rosier | 2013-06-26 | 4 | -16/+16 |
