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* misched: tag a few XFAILs that I plan to fixAndrew Trick2012-03-214-2/+10
* Re-factored RuntimeDyld.Danil Malyshev2012-03-2147-0/+1073
* Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby2012-03-212-0/+368
* Fix generation of the address size override prefix. Add assertions forJoerg Sonnenberger2012-03-211-0/+13
* I meant to disable this test, not XFAIL itAndrew Trick2012-03-211-2/+2
* misched: beginning to add unit testsAndrew Trick2012-03-211-0/+20
* Incremental big endian patch by Jack Carter.Akira Hatanaka2012-03-211-0/+45
* Fix test case from r153135.Chad Rosier2012-03-201-1/+1
* [avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu toChad Rosier2012-03-201-0/+89
* Assembler should accept redefinitions of unused variable symbols.Jim Grosbach2012-03-201-0/+1
* LoopSimplify bug fix. Handle indirect loop back edges.Andrew Trick2012-03-201-0/+41
* LSR: teach isSimplifiedLoopNest to handle PHI IVUsers.Andrew Trick2012-03-201-0/+32
* LSR: fix IVUsers isSimplifiedLoopNest to perform a full domtree walkAndrew Trick2012-03-201-0/+73
* [avx] Move the vextractf128 patterns closer to the vextractf128 def. RemoveChad Rosier2012-03-201-1/+0
* Fix assembling ARM vst2 instructions with double-spaced registers.Kevin Enderby2012-03-202-0/+8
* ARM non-scattered MachO relocations for movw/movt.Jim Grosbach2012-03-201-0/+23
* Fix test.Chad Rosier2012-03-201-1/+1
* [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads.Chad Rosier2012-03-201-0/+13
* The ARM instructions that have an unpredictable behavior when the pc register...Silviu Baranga2012-03-205-5/+17
* It's possible to have a constant expression who's size is quite big (e.g.,Bill Wendling2012-03-201-0/+17
* Perform mul combine when multiplying wiht negative constants.Anton Korobeynikov2012-03-191-0/+42
* llvm/test/DebugInfo: Move two tests to DebugInfo/X86. They are X86-dependent.NAKAMURA Takumi2012-03-192-0/+0
* This patch adds X86 instruction itineraries for non-pseudo opcodes inPreston Gurd2012-03-191-1/+1
* Factor out the multiply analysis code in ComputeMaskedBits and apply it to theNick Lewycky2012-03-181-6/+74
* MC asm parser macro argument count was wrong when empty.Jim Grosbach2012-03-171-0/+10
* ARM ldm/stm register lists can be out of order.Jim Grosbach2012-03-161-1/+1
* Revert r152907.Bill Wendling2012-03-161-12/+0
* The alignment of the pointer part of the store instruction may have anBill Wendling2012-03-161-0/+12
* Rip out support for 'llvm.noinline'. This thing has a strange history...Chandler Carruth2012-03-161-46/+0
* LSR fix: Add isSimplifiedLoopNest to IVUsers analysis.Andrew Trick2012-03-161-0/+50
* In InstCombiner::visitOr, make sure we reverse the operand swap used for chec...Eli Friedman2012-03-161-0/+12
* ARM optional operand on MRC/MCR assembly instructions.Jim Grosbach2012-03-161-0/+8
* ARM vmrs system registers mvfr0 and mvfr1 handling.Jim Grosbach2012-03-161-3/+12
* Do the right thing on NULL uint64 fields.Eric Christopher2012-03-161-0/+6
* For types with a parent of the compile unit make sure and emitEric Christopher2012-03-154-7/+33
* [fast-isel] Address Eli's comments for r152847. Specifically, add a test caseChad Rosier2012-03-151-0/+19
* ARM case-insensitive checking for APSR_nzcv.Jim Grosbach2012-03-154-6/+8
* line endingsMatt Beaumont-Gay2012-03-151-20/+20
* Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints onLang Hames2012-03-152-27/+3
* Fix VCVT decoding (between floating-point and fixed-point, Floating-point). ...Kristof Beyls2012-03-151-1/+26
* Short term fix for pr12270 before we change dominates to handle unreachableRafael Espindola2012-03-151-0/+15
* When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add...Nadav Rotem2012-03-151-0/+10
* Revert the removal of DW_AT_MIPS_linkage_name when we aren't puttingEric Christopher2012-03-154-61/+6
* [avx] Add patterns for VINSERTF128rm.Chad Rosier2012-03-151-0/+12
* Fixed a transform crash when setting a negative size value for memset. Fixes...Aaron Ballman2012-03-151-0/+20
* Extend the inline cost calculation to account for bonuses due toChandler Carruth2012-03-141-0/+56
* When an invoke is marked with metadata indicating its unwind edgeDan Gohman2012-03-141-0/+36
* Remove the DW_AT_MIPS_linkage name attribute when we don't need itEric Christopher2012-03-144-6/+61
* DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) toEvan Cheng2012-03-131-0/+16
* Change the X86 assembler to not require a segment register on stringKevin Enderby2012-03-131-0/+3