| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Speculatively revert r142781. Bots are showing | Nick Lewycky | 2011-10-24 | 1 | -33/+1 |
| * | Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the | Nick Lewycky | 2011-10-23 | 1 | -1/+33 |
| * | Add X86 SARX, SHRX, and SHLX instructions. | Craig Topper | 2011-10-23 | 3 | -0/+103 |
| * | Teach the BranchProbabilityInfo pass to print its results, and use that | Chandler Carruth | 2011-10-23 | 2 | -0/+93 |
| * | Completely re-write the algorithm behind MachineBlockPlacement based on | Chandler Carruth | 2011-10-23 | 1 | -2/+1 |
| * | Add X86 RORX instruction | Craig Topper | 2011-10-23 | 3 | -0/+50 |
| * | The element insertion code in scalar replacement doesn't handle incorrect | Cameron Zwarich | 2011-10-23 | 1 | -0/+19 |
| * | Add X86 MULX instruction for disassembler. | Craig Topper | 2011-10-23 | 2 | -0/+24 |
| * | Oops! Fix test I forgot to submit as part of r142735. | Nick Lewycky | 2011-10-22 | 1 | -2/+2 |
| * | A non-escaping malloc in the entry block is not unlike an alloca. Do dead-store | Nick Lewycky | 2011-10-22 | 1 | -0/+8 |
| * | Make SCEV's brute force analysis stronger in two ways. Firstly, we should be | Nick Lewycky | 2011-10-22 | 1 | -0/+33 |
| * | Fix pr11193. | Nadav Rotem | 2011-10-22 | 1 | -0/+15 |
| * | Assembly parsing for 4-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 | 1 | -6/+6 |
| * | Assembly parsing for 2-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 | 1 | -7/+7 |
| * | Remap blockaddress correctly when inlining a function. Fixes PR10162. | Eli Friedman | 2011-10-21 | 1 | -0/+27 |
| * | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -0/+9 |
| * | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -1/+8 |
| * | Extend instcombine's shufflevector simplification to handle more cases where ... | Eli Friedman | 2011-10-21 | 1 | -0/+46 |
| * | ARM VLD parsing and encoding. | Jim Grosbach | 2011-10-21 | 1 | -8/+8 |
| * | Fix pr11194. When promoting and splitting integers we need to use | Nadav Rotem | 2011-10-21 | 1 | -0/+19 |
| * | Don't hard code the desired alignment for loops -- it isn't 16-bytes on | Chandler Carruth | 2011-10-21 | 1 | -3/+3 |
| * | 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC t... | Nadav Rotem | 2011-10-21 | 1 | -0/+30 |
| * | Add loop aligning to MachineBlockPlacement based on review discussion so | Chandler Carruth | 2011-10-21 | 1 | -2/+69 |
| * | Add a very basic test for MachineBlockPlacement. This is essentially the | Chandler Carruth | 2011-10-21 | 1 | -0/+75 |
| * | Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ... | Craig Topper | 2011-10-21 | 1 | -24/+18 |
| * | Revert r142618, r142622, and r142624, which were based on an incorrect readin... | Owen Anderson | 2011-10-20 | 3 | -23/+73 |
| * | Fix decoding tests for fixed MSR encodings. | Owen Anderson | 2011-10-20 | 2 | -55/+5 |
| * | Fix tests for corrected MSR encodings. | Owen Anderson | 2011-10-20 | 1 | -18/+18 |
| * | ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 | 2 | -224/+222 |
| * | Tidy up formatting. | Jim Grosbach | 2011-10-20 | 1 | -46/+59 |
| * | ARM VTBX (one register) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 | 1 | -13/+12 |
| * | Refactor code from inlining and globalopt that checks whether a function defi... | Eli Friedman | 2011-10-20 | 1 | -0/+27 |
| * | "@string = constant i8 0" is a value i8* string of length zero. Analyze that | Nick Lewycky | 2011-10-20 | 1 | -0/+6 |
| * | Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :( | Chad Rosier | 2011-10-20 | 1 | -40/+0 |
| * | Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10... | Evan Cheng | 2011-10-19 | 1 | -0/+17 |
| * | Improve code generation for vselect on SSE2: | Nadav Rotem | 2011-10-19 | 1 | -6/+11 |
| * | Fix parsing of a line with only a # in it. | Rafael Espindola | 2011-10-19 | 1 | -0/+15 |
| * | Use literal pool loads instead of MOVW/MOVT for materializing global addresse... | James Molloy | 2011-10-19 | 1 | -0/+27 |
| * | Add Paste Test | David Greene | 2011-10-19 | 1 | -0/+35 |
| * | Add NAME Member | David Greene | 2011-10-19 | 2 | -1/+3 |
| * | Generalize the reading of probability metadata to work for both branches | Chandler Carruth | 2011-10-19 | 1 | -0/+43 |
| * | Teach the BranchProbabilityInfo analysis pass to read any metadata | Chandler Carruth | 2011-10-19 | 1 | -0/+25 |
| * | Add pass printing support to BlockFrequencyInfo pass. The implementation | Chandler Carruth | 2011-10-19 | 2 | -0/+27 |
| * | Add support for the vector-widening of vselect and vector-setcc | Nadav Rotem | 2011-10-19 | 1 | -0/+68 |
| * | Rename PEXTR to PEXT. Add intrinsics for BMI instructions. | Craig Topper | 2011-10-19 | 4 | -15/+142 |
| * | Added testcase for <rdar://problem/10215997> | Lang Hames | 2011-10-18 | 1 | -0/+29 |
| * | Add additional element-promotion tests. | Nadav Rotem | 2011-10-18 | 1 | -0/+31 |
| * | Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Inde... | Nadav Rotem | 2011-10-18 | 1 | -0/+28 |
| * | Tidy up formatting. | Jim Grosbach | 2011-10-18 | 1 | -8/+12 |
| * | Tidy up formatting. | Jim Grosbach | 2011-10-18 | 1 | -8/+12 |
