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* X86: enable CSE between CMP and SUBManman Ren2012-08-081-0/+23
| | | | | | | | | | | | | | | We perform the following: 1> Use SUB instead of CMP for i8,i16,i32 and i64 in ISel lowering. 2> Modify MachineCSE to correctly handle implicit defs. 3> Convert SUB back to CMP if possible at peephole. Removed pattern matching of (a>b) ? (a-b):0 and like, since they are handled by peephole now. rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161462 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid recomputing the unique exit blocks and their insert points when doingDan Gohman2012-08-081-0/+41
| | | | | | | | | | multiple scalar promotions on a single loop. This also has the effect of preserving the order of stores sunk out of loops, which is aesthetically pleasing, and it happens to fix the testcase in PR13542, though it doesn't fix the underlying problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161459 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a serious typo in InstCombine's optimization of comparisons.Bob Wilson2012-08-071-0/+9
| | | | | | | | | An unsigned value converted to floating-point will always be greater than a negative constant. Unfortunately InstCombine reversed the check so that unsigned values were being optimized to always be greater than all positive floating-point constants. <rdar://problem/12029145> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161452 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 cmp lowering is looking past truncate on the condition node. It should onlyEvan Cheng2012-08-071-0/+36
| | | | | | | | | do so when the high bits are known zero. This caused a subtle miscompilation. rdar://12027825 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161451 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the representation of debug line table in DebugInfo LLVM library,Alexey Samsonov2012-08-072-0/+6
| | | | | | | | | | | | | | and "instruction address -> file/line" lookup. Instead of plain collection of rows, debug line table for compilation unit is now treated as the number of row ranges, describing sequences (series of contiguous machine instructions). The sequences are not always listed in the order of increasing address, so previously used std::lower_bound() sometimes produced wrong results. Now the instruction address lookup consists of two stages: finding the correct sequence, and searching for address in range of rows for this sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161414 91177308-0d34-0410-b5e6-96231b3b80d8
* PR13095: Give an inline cost bonus to functions using byval arguments.Benjamin Kramer2012-08-071-0/+193
| | | | | | | | | | | | | | | | | | | | | | | | | | | We give a bonus for every argument because the argument setup is not needed anymore when the function is inlined. With this patch we interpret byval arguments as a compact representation of many arguments. The byval argument setup is implemented in the backend as an inline memcpy, so to model the cost as accurately as possible we take the number of pointer-sized elements in the byval argument and give a bonus of 2 instructions for every one of those. The bonus is capped at 8 elements, which is the number of stores at which the x86 backend switches from an expanded inline memcpy to a real memcpy. It would be better to use the real memcpy threshold from the backend, but it's not available via TargetData. This change brings the performance of c-ray in line with gcc 4.7. The included test case tries to reproduce the c-ray problem to catch regressions for this benchmark early, its performance is dominated by the inline decision of a specific call. This only has a small impact on most code, more on x86 and arm than on x86_64 due to the way the ABI works. When building LLVM for x86 it gives a small inline cost boost to virtually any function using StringRef or STL allocators, but only a 0.01% increase in overall binary size. The size of gcc compiled by clang actually shrunk by a couple bytes with this patch applied, but not significantly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161413 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR13412, a nasty miscompile due to the interleavedChandler Carruth2012-08-071-0/+62
| | | | | | | | | | | | | | | | | | instsimplify+inline strategy. The crux of the problem is that instsimplify was reasonably relying on an invariant that is true within any single function, but is no longer true mid-inline the way we use it. This invariant is that an argument pointer != a local (alloca) pointer. The fix is really light weight though, and allows instsimplify to be resiliant to these situations: when checking the relation ships to function arguments, ensure that the argumets come from the same function. If they come from different functions, then none of these assumptions hold. All credit to Benjamin Kramer for coming up with this clever solution to the problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161410 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a much more conservative strategy for aligning branch targets.Chandler Carruth2012-08-074-6/+10
| | | | | | | | | | | | | Previously, MBP essentially aligned every branch target it could. This bloats code quite a bit, especially non-looping code which has no real reason to prefer aligned branch targets so heavily. As Andy said in review, it's still a bit odd to do this without a real cost model, but this at least has much more plausible heuristics. Fixes PR13265. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161409 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineCSE: Update the heuristics for isProfitableToCSE.Manman Ren2012-08-072-1/+36
| | | | | | | | | | If the result of a common subexpression is used at all uses of the candidate expression, CSE should not increase the live range of the common subexpression. rdar://11393714 and rdar://11819721 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161396 91177308-0d34-0410-b5e6-96231b3b80d8
* The define for 64 bit sign extension neglected to Jack Carter2012-08-071-0/+15
| | | | | | | | | | | | | | | | | | | | | initialize fields of the class that it used. The result was nonsense code. Before: 0000000000000000 <foo>: 0: 00441100 0x441100 4: 03e00008 jr ra 8: 00000000 nop After: 0000000000000000 <foo>: 0: 00041000 sll v0,a0,0x0 4: 03e00008 jr ra 8: 00000000 nop git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161377 91177308-0d34-0410-b5e6-96231b3b80d8
* The Mips64InstrInfo.td definitions DynAlloc64 LEA_ADDiu64 Jack Carter2012-08-061-0/+18
| | | | | | | | | | | were using a class defined for 32 bit instructions and thus the instruction was for addiu instead of daddiu. This was corrected by adding the instruction opcode as a field in the base class to be filled in by the defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161359 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.Jack Carter2012-08-061-0/+27
| | | | | | | | | | | | | | | These 2 relocations gain access to the highest and the second highest 16 bits of a 64 bit object. R_MIPS_HIGHER %higher(A+S) The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ]. R_MIPS_HIGHEST %highest(A+S) The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ]. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161348 91177308-0d34-0410-b5e6-96231b3b80d8
* MFTB on PPC64 should really be encoded using MFSPR.Hal Finkel2012-08-061-1/+1
| | | | | | | | | | | The MFTB instruction itself is being phased out, and its functionality is provided by MFSPR. According to the ISA docs, using MFSPR works on all known chips except for the 601 (which did not have a timebase register anyway) and the POWER3. Thanks to Adhemerval Zanella for pointing this out! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161346 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement proper handling for pcmpistri/pcmpestri intrinsics. Requires ↵Craig Topper2012-08-061-10/+10
| | | | | | custom handling in DAGISelToDAG due to limitations in TableGen's implicit def handling. Fixes PR11305. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161318 91177308-0d34-0410-b5e6-96231b3b80d8
* Update test to check for r161305Craig Topper2012-08-051-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161307 91177308-0d34-0410-b5e6-96231b3b80d8
* Add readcyclecounter lowering on PPC64.Hal Finkel2012-08-041-0/+15
| | | | | | | | On PPC64, this can be done with a simple TableGen pattern. To enable this, I've added the (otherwise missing) readcyclecounter SDNode definition to TargetSelectionDAG.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161302 91177308-0d34-0410-b5e6-96231b3b80d8
* Add stack spill / reload instructions for DTriple and DQuad register ↵Anton Korobeynikov2012-08-041-0/+174
| | | | | | | | | classes, which were missed for no reason. This fixes PR13377 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161299 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor and check "onlyReadsMemory" before optimizing builtins.Bob Wilson2012-08-0311-19/+19
| | | | | | | | | This patch is mostly just refactoring a bunch of copy-and-pasted code, but it also adds a check that the call instructions are readnone or readonly. That check was already present for sin, cos, sqrt, log2, and exp2 calls, but it was missing for the rest of the builtins being handled in this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161282 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Redo mips16 instructions to avoid multiple opcodes for same instruction.Akira Hatanaka2012-08-0319-0/+336
| | | | | | | | | | | Change these to patterns. 2. Add another 16 instructions. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161272 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix memcmp code-gen to honor -fno-builtin.Bob Wilson2012-08-031-0/+3
| | | | | | | | | I noticed that SelectionDAGBuilder::visitCall was missing a check for memcmp in TargetLibraryInfo, so that it would use custom code for memcmp calls even with -fno-builtin. I also had to add a new -disable-simplify-libcalls option to llc so that I could write a test for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161262 91177308-0d34-0410-b5e6-96231b3b80d8
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-0/+8
| | | | | | | | | | Fast isel doesn't currently have support for translating builtin function calls to target instructions. For embedded environments where the library functions are not available, this is a matter of correctness and not just optimization. Most of this patch is just arranging to make the TargetLibraryInfo available in fast isel. <rdar://problem/12008746> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161232 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm-fast-isel] Add support for shl, lshr, and ashr.Jush Lu2012-08-031-0/+50
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161230 91177308-0d34-0410-b5e6-96231b3b80d8
* [CMake] Add yaml2obj to check-llvm.NAKAMURA Takumi2012-08-031-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161229 91177308-0d34-0410-b5e6-96231b3b80d8
* Move test yaml files under Inputs until they are converted to be the actualMatt Beaumont-Gay2012-08-026-6/+8
| | | | | | test files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161219 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-022-22/+42
| | | | | | | | | | | Add more comments and use early returns to reduce nesting in isLoadFoldable. Also disable folding for V_SET0 to avoid introducing a const pool entry and a const pool load. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161207 91177308-0d34-0410-b5e6-96231b3b80d8
* Add yaml2obj. A utility to convert YAML to binaries.Michael J. Spencer2012-08-027-13/+175
| | | | | | | | yaml2obj takes a textual description of an object file in YAML format and outputs the binary equivalent. This greatly simplifies writing tests that take binary object files as input. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161205 91177308-0d34-0410-b5e6-96231b3b80d8
* Set transient stack alignment in constructor of MipsFrameLowering and re-enableAkira Hatanaka2012-08-021-4/+1
| | | | | | | | test o32_cc_vararg.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161189 91177308-0d34-0410-b5e6-96231b3b80d8
* Support fpv4 for ARM Cortex-M4.Jiangning Liu2012-08-021-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161163 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ↵Jiangning Liu2012-08-022-1/+23
| | | | | | index issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161162 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu2012-08-024-33/+235
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161161 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-024-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll: Make sure this is testing without +avx.NAKAMURA Takumi2012-08-021-1/+1
| | | | | | FIXME: Could +avx be checked here too? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161156 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll: Rewrite expressions to pass ↵NAKAMURA Takumi2012-08-021-4/+6
| | | | | | | | | regardless of PR11031. - Relax to match even if epilogue (pop %ebp) were emitted. - Assume the return value is stored to %xmm0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161155 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-026-54/+61
| | | | | | | | | | | | | Machine CSE and other optimizations can remove instructions so folding is possible at peephole while not possible at ISel. This patch is a rework of r160919 and was tested on clang self-host on my local machine. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161152 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert c23b933d5f8be9b51a1d22e717c0311f65f87dcd. It's causingEric Christopher2012-08-0110-47/+23
| | | | | | failures in the debug testsuite and possibly PR13486. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161121 91177308-0d34-0410-b5e6-96231b3b80d8
* Line endings.Matt Beaumont-Gay2012-08-011-139/+139
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161117 91177308-0d34-0410-b5e6-96231b3b80d8
* fix 'make check' when ocamlopt returns the compiler path with CFLAGS (and ↵Nuno Lopes2012-08-011-1/+1
| | | | | | there's a cflag with a = char) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161114 91177308-0d34-0410-b5e6-96231b3b80d8
* Added FMA functionality to X86 target.Elena Demikhovsky2012-08-013-22/+165
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161110 91177308-0d34-0410-b5e6-96231b3b80d8
* Stay rational; don't assert trying to take the square root of a negative value.Nick Lewycky2012-08-011-0/+21
| | | | | | | If it's negative, the loop is already proven to be infinite. Fixes PR13489! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161107 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering andAkira Hatanaka2012-07-311-1/+1
| | | | | | | | | | | | MipsSEFrameLowering. Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be reserved if there is a call with a large call frame or there are variable sized objects on the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161090 91177308-0d34-0410-b5e6-96231b3b80d8
* Let PEI::calculateFrameObjectOffsets compute the final stack size rather thanAkira Hatanaka2012-07-311-2/+4
| | | | | | | | computing it in MipsFrameLowering::emitPrologue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161078 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka2012-07-311-10/+5
| | | | | | | | | The frame object which points to the dynamically allocated area will not be needed after changes are made to cease reserving call frames. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161076 91177308-0d34-0410-b5e6-96231b3b80d8
* When store nodes or memcpy nodes are created to copy the function callAkira Hatanaka2012-07-311-1/+3
| | | | | | | | | arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and integer offset operands rather than frame object operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161068 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.Chad Rosier2012-07-311-2/+2
| | | | | | | Previously, we were using EBX, but PIC requires the GOT to be in EBX before function calls via PLT GOT pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161066 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined asAkira Hatanaka2012-07-312-12/+12
| | | | | | | | | | | single-precision load and store. Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect to map unaligned floating point load/store nodes to these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineSink: Sort the successors before trying to find SuccToSinkTo.Manman Ren2012-07-311-0/+54
| | | | | | | | | | | One motivating example is to sink an instruction from a basic block which has two successors: one outside the loop, the other inside the loop. We should try to sink the instruction outside the loop. rdar://11980766 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161062 91177308-0d34-0410-b5e6-96231b3b80d8
* Clear kill flags in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-07-311-0/+46
| | | | | | | | | We are extending live ranges, so kill flags are not accurate. They aren't needed until they are recomputed after RA anyway. <rdar://problem/11950722> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161023 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverse order of the two branches at end of a basic block if it is profitable.Manman Ren2012-07-311-0/+104
| | | | | | | | | | | | | | | | We branch to the successor with higher edge weight first. Convert from je LBB4_8 --> to outer loop jmp LBB4_14 --> to inner loop to jne LBB4_14 jmp LBB4_8 PR12750 rdar: 11393714 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161018 91177308-0d34-0410-b5e6-96231b3b80d8
* Keep empty assembly macro argument values in the middle of the list.Jim Grosbach2012-07-301-0/+12
| | | | | | | | | | | | | | | | | | | Empty macro arguments at the end of the list should be as-if not specified at all, but those in the middle of the list need to be kept so as not to screw up the positional numbering. E.g.: .macro foo foo_-bash___: nop .endm foo 1, 2, 3, 4 foo 1, , 3, 4 Should create two labels, "foo_1_2_3_4" and "foo_1__3_4". rdar://11948769 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161002 91177308-0d34-0410-b5e6-96231b3b80d8
* Consider address spaces for hashing and CSEing DAG nodes. Otherwise two ↵Pete Cooper2012-07-301-0/+16
| | | | | | loads from different x86 segments but the same address would get CSEd git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160987 91177308-0d34-0410-b5e6-96231b3b80d8