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* Beginning of the Great Exception Handling Rewrite.Bill Wendling2011-04-101-0/+29
* fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,Chris Lattner2011-04-091-0/+4
* look for the verboten argument slot access in any order, thanks to FritsChris Lattner2011-04-091-0/+1
* Don't store Twine temporaries, it's not safe.Benjamin Kramer2011-04-091-1/+5
* Add back a couple checks removed by r129128; the fact that an intitializerEli Friedman2011-04-091-0/+5
* fix PR9523, a crash in looprotate on a non-canonical loop made out of indirec...Chris Lattner2011-04-091-0/+16
* Fix a bug where RecursivelyDeleteTriviallyDeadInstructions couldChris Lattner2011-04-091-0/+28
* PR9604; try to deal with RAUW updates correctly in the AST. I'm not convincedEli Friedman2011-04-091-0/+49
* Test for r129190.Eli Friedman2011-04-091-0/+32
* fix two completely broken tests, which were matching due to PR9629.Chris Lattner2011-04-092-4/+4
* remove a bunch of CHECK lines that aren't checking whatChris Lattner2011-04-091-5/+0
* have dag combine zap "store undef", which can be formed during call loweringChris Lattner2011-04-091-0/+15
* don't test for codegen of 'store undef'Chris Lattner2011-04-092-7/+11
* Add radar number for future reference.Devang Patel2011-04-081-1/+1
* Do not emit DW_AT_upper_bound and DW_AT_lower_bound for unbouded array.Devang Patel2011-04-081-0/+34
* Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is...Evan Cheng2011-04-081-1/+1
* Hanlde the checking of bad regs for SMMLAR properly, instead of asserting.Johnny Chen2011-04-081-0/+3
* Sanity check the option operand for DMB/DSB.Johnny Chen2011-04-083-0/+38
* MOVi16 and MOVTi16 does not allow pc as the dest register, while MOVi allows it.Johnny Chen2011-04-082-0/+16
* Add sanity checking for bad register specifier(s) for the DPFrm instructions.Johnny Chen2011-04-084-0/+50
* Update testsRafael Espindola2011-04-0730-71/+71
* Do not let debug info interfer with branch folding.Devang Patel2011-04-071-0/+58
* Add a VEXT test.Johnny Chen2011-04-071-0/+3
* Add option to emit @llvm.trap as a function call instead of a trap instructio...Evan Cheng2011-04-071-3/+8
* Add support for .skip.Rafael Espindola2011-04-071-0/+5
* Added a check in the preRA scheduler for potential interference on aAndrew Trick2011-04-071-0/+31
* Fix handling of functions with internal linkage.Akira Hatanaka2011-04-071-0/+52
* Add sanity checking for invalid register encodings for signed/unsigned extend...Johnny Chen2011-04-072-0/+17
* Add sanity checking for invalid register encodings for saturating instructions.Johnny Chen2011-04-071-0/+11
* Add some more comments about checkings of invalid register numbers.Johnny Chen2011-04-072-0/+14
* While hoisting common code from if/else, hoist debug info intrinsics if they ...Devang Patel2011-04-071-0/+53
* Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector...Tanya Lattner2011-04-071-0/+18
* Sanity check MSRi for invalid mask values and reject it as invalid.Johnny Chen2011-04-071-0/+12
* PR9634: Don't unconditionally tell the AliasSetTracker that the PreheaderLoadEli Friedman2011-04-073-2/+41
* The ARM disassembler was not recognizing USADA8 instruction. Need to add che...Johnny Chen2011-04-071-0/+3
* Change -arm-divmod-libcall to a target neutral option.Evan Cheng2011-04-071-1/+1
* Should also check SMLAD for invalid register values.Johnny Chen2011-04-071-0/+11
* Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for ...Owen Anderson2011-04-061-0/+9
* A8.6.393Johnny Chen2011-04-061-0/+11
* A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP"Johnny Chen2011-04-063-0/+16
* Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong.Johnny Chen2011-04-061-0/+3
* This testcase passed even without the fix. Added the target info to make theNadav Rotem2011-04-061-0/+3
* Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function.Johnny Chen2011-04-061-1/+4
* Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal...Johnny Chen2011-04-051-3/+6
* A7.3 register encodingJohnny Chen2011-04-052-1/+11
* ARM disassembler was erroneously accepting an invalid RSC instruction.Johnny Chen2011-04-051-0/+9
* remove postdom frontiers, because it is dead. Forward dom frontiers areChris Lattner2011-04-053-817/+0
* ARM disassembler was erroneously accepting an invalid LSL instruction.Johnny Chen2011-04-051-0/+9
* These tests no longer require linear scan because reserved register coalescin...Jakob Stoklund Olesen2011-04-055-19/+14
* Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy.Jakob Stoklund Olesen2011-04-059-1/+10