| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix a couple of things: | Bruno Cardoso Lopes | 2011-07-15 | 1 | -0/+0 |
| * | PR10370: Make sure we know how to relax push correctly on x86-64. | Eli Friedman | 2011-07-15 | 1 | -5/+5 |
| * | A real testcase for r135286. | Chad Rosier | 2011-07-15 | 1 | -36/+19 |
| * | Update these tests, no longer outputting names for the variables. | Eric Christopher | 2011-07-15 | 2 | -6/+6 |
| * | Add testcase for r135286. | Chad Rosier | 2011-07-15 | 1 | -0/+47 |
| * | Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues ... | Owen Anderson | 2011-07-15 | 3 | -7/+7 |
| * | ARM diagnostic when 's' suffix on mnemonic that can't set flags. | Jim Grosbach | 2011-07-14 | 1 | -0/+6 |
| * | Add some testcases for ARM MLA/MLS instructions. | Jim Grosbach | 2011-07-14 | 2 | -3/+23 |
| * | ARM MCRR/MCRR2 immediate operand range checking. | Jim Grosbach | 2011-07-14 | 3 | -5/+14 |
| * | ARM MCR/MCR2 assembly parsing operand constraints. | Jim Grosbach | 2011-07-14 | 3 | -4/+28 |
| * | Enable some tests we now handle correctly. | Jim Grosbach | 2011-07-14 | 1 | -18/+9 |
| * | Check register class matching instead of width of type matching | Eric Christopher | 2011-07-14 | 1 | -0/+13 |
| * | Add 256-bit load/store recognition and matching in several places. | Bruno Cardoso Lopes | 2011-07-14 | 1 | -0/+24 |
| * | Update ARM Assembly of LDM/STM. | Jim Grosbach | 2011-07-14 | 2 | -44/+58 |
| * | ARM ISB assembly parsing tests. | Jim Grosbach | 2011-07-14 | 2 | -2/+10 |
| * | ARM ISB instruction assembly parsing. | Jim Grosbach | 2011-07-14 | 1 | -1/+1 |
| * | Add a testcase for r135123. | Eric Christopher | 2011-07-14 | 1 | -0/+14 |
| * | Don't emit a bit test if there is only one case the test can yield false. A s... | Benjamin Kramer | 2011-07-14 | 1 | -0/+20 |
| * | ARM tests for EOR instruction parsing and encoding. | Jim Grosbach | 2011-07-14 | 1 | -0/+57 |
| * | Remove duplicate tests. | Jim Grosbach | 2011-07-14 | 1 | -24/+0 |
| * | ARM Assembler support for DSB instruction. | Jim Grosbach | 2011-07-14 | 1 | -0/+31 |
| * | ARM Assembler support for DMB instruction. | Jim Grosbach | 2011-07-13 | 2 | -24/+32 |
| * | ARM Assembler support for DBG instruction. | Jim Grosbach | 2011-07-13 | 2 | -0/+19 |
| * | We already support 256-bit packed ADD, SUB, DIV, MUL. Add testcases. | Bruno Cardoso Lopes | 2011-07-13 | 1 | -0/+116 |
| * | ARM parsing and encoding tests for CMN/CMP. | Jim Grosbach | 2011-07-13 | 1 | -0/+59 |
| * | Shuffle ARM assembly tests a bit. | Jim Grosbach | 2011-07-13 | 2 | -10/+22 |
| * | Range checking for CDP[2] immediates. | Jim Grosbach | 2011-07-13 | 2 | -0/+27 |
| * | Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A more | Bruno Cardoso Lopes | 2011-07-13 | 1 | -0/+45 |
| * | Make sure we don't combine a large displacement and a frame index in the same... | Eli Friedman | 2011-07-13 | 1 | -0/+20 |
| * | Fix predicates for Thumb co-processor instructions. | Jim Grosbach | 2011-07-13 | 2 | -15/+15 |
| * | Testcases for ARM assembly BX/BXJ instructions. | Jim Grosbach | 2011-07-13 | 1 | -2/+24 |
| * | Testcases for ARM assembly BLX/BL instructions. | Jim Grosbach | 2011-07-13 | 1 | -0/+17 |
| * | Range checking for 16-bit immediates in ARM assembly. | Jim Grosbach | 2011-07-13 | 2 | -4/+8 |
| * | Change test case, one that actually failed before my commit. | Evan Cheng | 2011-07-13 | 1 | -1/+6 |
| * | Add tests for ARM parsing of 'BKPT' instruction. | Jim Grosbach | 2011-07-13 | 1 | -0/+9 |
| * | Fix copy-pasto. | Jim Grosbach | 2011-07-13 | 1 | -1/+1 |
| * | Add tests for ARM parsing of 'BIC' instruction. | Jim Grosbach | 2011-07-13 | 1 | -0/+58 |
| * | Add some FIXMEs. | Jim Grosbach | 2011-07-13 | 1 | -0/+16 |
| * | It's not safe to fold (fptrunc (sqrt (fpext x))) to (sqrtf x) if there is ano... | Evan Cheng | 2011-07-13 | 1 | -2/+19 |
| * | Add tests for ARM parsing of 'AND' instruction. | Jim Grosbach | 2011-07-13 | 1 | -0/+58 |
| * | Improve ARM assembly parsing diagnostics a bit. | Jim Grosbach | 2011-07-13 | 1 | -0/+43 |
| * | Add tests for ARM parsing of 'ADD' instruction | Jim Grosbach | 2011-07-13 | 1 | -0/+63 |
| * | Destination register operand is optional for ADC and SBC ARM. | Jim Grosbach | 2011-07-13 | 1 | -0/+36 |
| * | Flesh out ARM Parser support for shifted-register operands. | Jim Grosbach | 2011-07-13 | 1 | -0/+48 |
| * | AVX Codegen support for 256-bit versions of vandps, vandpd, vorps, vorpd, vxo... | Bruno Cardoso Lopes | 2011-07-13 | 1 | -0/+116 |
| * | Improve codegen for select's: | Evan Cheng | 2011-07-13 | 5 | -115/+36 |
| * | Add check for predicate w/o S bit. | Jim Grosbach | 2011-07-12 | 1 | -0/+2 |
| * | Improve test cases from r134746. | Jim Grosbach | 2011-07-12 | 2 | -5/+21 |
| * | Comment correction. | Andrew Trick | 2011-07-12 | 1 | -2/+3 |
| * | Fix recognition of ARM 'adcs' mnemonic. | Jim Grosbach | 2011-07-11 | 1 | -0/+31 |
