| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Preserve MachineMemOperands in ARMLoadStoreOptimizer. | Andrew Trick | 2011-11-11 | 1 | -0/+15 |
| * | ARM allow Q registers in vldm/vstm register lists. | Jim Grosbach | 2011-11-11 | 1 | -0/+2 |
| * | Move X86 specific test in X86 directory. | Devang Patel | 2011-11-11 | 1 | -0/+0 |
| * | Move X86 specific test in X86 directory. | Devang Patel | 2011-11-11 | 1 | -0/+0 |
| * | allow non-device function calls in PTX when natively handling device-side printf | Dan Bailey | 2011-11-11 | 1 | -0/+25 |
| * | Add lowering for AVX2 shift instructions. | Craig Topper | 2011-11-11 | 2 | -73/+210 |
| * | Add support for using immediates with select instructions. | Chad Rosier | 2011-11-11 | 1 | -0/+99 |
| * | Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3. | Eli Friedman | 2011-11-11 | 1 | -0/+9 |
| * | Get rid of an optimization in SCCP which appears to have many issues. Specif... | Eli Friedman | 2011-11-11 | 1 | -20/+0 |
| * | Add support for using MVN to materialize negative constants. | Chad Rosier | 2011-11-11 | 2 | -6/+113 |
| * | Thumb2 parsing for push/pop w/ hi registers in the reglist. | Jim Grosbach | 2011-11-10 | 1 | -0/+15 |
| * | Check in getOrCreateSubprogramDIE if a declaration exists and if so output | Rafael Espindola | 2011-11-10 | 1 | -0/+43 |
| * | Thumb MUL assembly parsing for 3-operand form. | Jim Grosbach | 2011-11-10 | 1 | -0/+2 |
| * | When in ARM mode, LDRH/STRH require special handling of negative offsets. | Chad Rosier | 2011-11-10 | 1 | -0/+138 |
| * | ARM assembly parsing for LSR/LSL/ROR(immediate). | Jim Grosbach | 2011-11-10 | 2 | -6/+33 |
| * | ARM assembly parsing for ASR(immediate). | Jim Grosbach | 2011-11-10 | 1 | -1/+8 |
| * | test/CodeGen/X86/lsr-loop-exit-cond.ll: Try to appease linux and freebsd bots... | NAKAMURA Takumi | 2011-11-10 | 1 | -1/+1 |
| * | Use a bigger hammer to fix PR11314 by disabling the "forcing two-address | Evan Cheng | 2011-11-10 | 11 | -20/+31 |
| * | For immediate encodings of icmp, zero or sign extend first. Then | Chad Rosier | 2011-11-10 | 1 | -0/+17 |
| * | Strip old implicit operands after foldMemoryOperand. | Jakob Stoklund Olesen | 2011-11-10 | 1 | -0/+105 |
| * | Thumb2 assembly parsing STMDB w/ optional .w suffix. | Jim Grosbach | 2011-11-09 | 1 | -0/+2 |
| * | Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM. | Eli Friedman | 2011-11-09 | 1 | -0/+37 |
| * | DeadStoreElimination can now trim the size of a store if the end of the store... | Pete Cooper | 2011-11-09 | 1 | -0/+78 |
| * | Add check so we don't try to perform an impossible transformation. Fixes issu... | Eli Friedman | 2011-11-09 | 1 | -0/+15 |
| * | AVX2: Add patterns for variable shift operations | Nadav Rotem | 2011-11-09 | 1 | -2/+73 |
| * | Use REs to remove dependencies on the register allocation order. | Chad Rosier | 2011-11-09 | 1 | -24/+24 |
| * | Speculatively revert commit 144124 (djg) in the hope that the 32 bit | Duncan Sands | 2011-11-09 | 2 | -17/+7 |
| * | Add AVX2 support for vselect of v32i8 | Nadav Rotem | 2011-11-09 | 1 | -0/+19 |
| * | Enable execution dependency fix pass for YMM registers when AVX2 is enabled. ... | Craig Topper | 2011-11-09 | 1 | -0/+38 |
| * | Add instruction selection for AVX2 integer comparisons. | Craig Topper | 2011-11-09 | 1 | -0/+58 |
| * | Add AVX2 instruction lowering for add, sub, and mul. | Craig Topper | 2011-11-09 | 1 | -0/+76 |
| * | Don't forget to check FlagNW when determining whether an AddRecExpr will wrap | Nick Lewycky | 2011-11-09 | 1 | -0/+35 |
| * | Add support for encoding immediates in icmp and fcmp. Hopefully, this will | Chad Rosier | 2011-11-09 | 1 | -0/+214 |
| * | Collapse DomainValues across loop back-edges. | Jakob Stoklund Olesen | 2011-11-09 | 1 | -0/+45 |
| * | Add a hack to the scheduler to disable pseudo-two-address dependencies in | Dan Gohman | 2011-11-08 | 2 | -7/+17 |
| * | Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with l... | Evan Cheng | 2011-11-08 | 1 | -11/+12 |
| * | Fix code to match comment. Fixes PR11340, a regression from r143209. | Eli Friedman | 2011-11-08 | 1 | -0/+10 |
| * | LICM pass now understands invariant load metadata. Nothing generates this ye... | Pete Cooper | 2011-11-08 | 1 | -0/+39 |
| * | Adding test for machine-licm operating on invariant load instructions | Pete Cooper | 2011-11-08 | 1 | -0/+29 |
| * | Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported. | Lang Hames | 2011-11-08 | 1 | -6/+9 |
| * | test/CodeGen/X86/vec_shuffle-39.ll: Add explicit -mtriple=x86_64-linux. Passi... | NAKAMURA Takumi | 2011-11-08 | 1 | -1/+1 |
| * | test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64. | NAKAMURA Takumi | 2011-11-08 | 1 | -1/+1 |
| * | test/CodeGen/X86/vec_shuffle.ll: Add explicit -mtriple=i686-linux. We may see... | NAKAMURA Takumi | 2011-11-08 | 1 | -1/+1 |
| * | Make sure to mark vector extload's as expand on ARM. Fixes PR11319. | Eli Friedman | 2011-11-08 | 1 | -0/+15 |
| * | Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn'... | Eli Friedman | 2011-11-08 | 1 | -0/+14 |
| * | Add x86 isel logic and patterns to match movlps from clang generated IR for _... | Evan Cheng | 2011-11-08 | 2 | -2/+52 |
| * | Convert to the new EH model. | Bill Wendling | 2011-11-08 | 2 | -20/+15 |
| * | Convert to the new EH model. | Bill Wendling | 2011-11-08 | 3 | -28/+20 |
| * | Convert tests to the new EH model. | Bill Wendling | 2011-11-08 | 6 | -51/+29 |
| * | Enable support for returning i1, i8, and i16. Nothing special todo as it's the | Chad Rosier | 2011-11-08 | 1 | -0/+15 |
