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* fix PR9856, an incorrectly conservative assertion: a global can beChris Lattner2011-05-221-0/+14
* fix PR9841 by having GVN not process dead loads. This wasChris Lattner2011-05-221-0/+12
* remove a trivial test, make some other tests less trivial.Chris Lattner2011-05-224-14/+11
* make this test less trivial.Chris Lattner2011-05-221-4/+6
* Commit test change, forgotten as part of r131838.Nick Lewycky2011-05-221-1/+1
* Teach the inliner to emit llvm.lifetime.start/end, to scope the local variablesNick Lewycky2011-05-221-0/+78
* Fix grammar in test.Nick Lewycky2011-05-221-1/+1
* Revert commit 131781, to see if it fixes the x86-64 dragonegg buildbot.Duncan Sands2011-05-212-132/+1
* Implement mulo x, 2 -> addo x, x in DAGCombiner.Benjamin Kramer2011-05-211-0/+24
* Merge and FileCheckize test cases.Benjamin Kramer2011-05-213-45/+48
* Revert "InstCombine: Turn mul.with.overflow(X, 2) into the cheaper add.with.o...Benjamin Kramer2011-05-211-21/+0
* InstCombine: Turn mul.with.overflow(X, 2) into the cheaper add.with.overflow(...Benjamin Kramer2011-05-211-0/+21
* When BasicAA can determine that two pointers have the same base butDan Gohman2011-05-212-1/+132
* Add fast-isel support for byval calls on x86.Eli Friedman2011-05-201-3/+19
* adds some attributes to attribute section when cpu is "xscale"Rafael Espindola2011-05-201-0/+31
* fixes target address tBL and tBLX and sets relocation typeRafael Espindola2011-05-201-0/+37
* Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.Stuart Hastings2011-05-201-0/+22
* Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka2011-05-201-2/+2
* Fixed regression due to commit 131709, which disables vararg tail call optimi...Chad Rosier2011-05-201-12/+24
* Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.Benjamin Kramer2011-05-201-1/+1
* Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to pr...Cameron Zwarich2011-05-201-0/+31
* Fix bug in which nodes that write to argument registers do not get glued with...Akira Hatanaka2011-05-201-5/+5
* Don't attempt to tail call optimize for Win64.Chad Rosier2011-05-201-2/+2
* Revert r131664 and fix it in instcombine instead. rdar://9467055Evan Cheng2011-05-202-19/+17
* Add fast-isel support for zeroext and signext ret instructions on x86.Eli Friedman2011-05-191-0/+38
* Looks like OS X assemblers (including MC) don't likeRafael Espindola2011-05-191-0/+23
* Oddly people want to use the 'r' constraint for fp constants on x86.Eric Christopher2011-05-191-0/+12
* Fix up this test to use explicit triples (Win64 passes a different number of ...Eli Friedman2011-05-191-13/+26
* This fixes one divergence between LLVM and binutils for ARM in theJason W Kim2011-05-191-3/+3
* ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.Rafael Espindola2011-05-191-0/+7
* Align i64 arguments to 64 bit boundaries.Akira Hatanaka2011-05-191-0/+34
* crc32 with 64-bit output zeros upper 32-bits. rdar://9467055Evan Cheng2011-05-191-0/+19
* Move test to Transforms/InstCombine.Stuart Hastings2011-05-192-19/+16
* Add test for PR9946.Rafael Espindola2011-05-191-0/+18
* More instcombine cleanup, towards improving debug line info.Eli Friedman2011-05-181-2/+2
* Handle perfect shuffle case that generates a vrev for vectors of floats.Tanya Lattner2011-05-181-0/+15
* When forming an ICmpZero LSRUse, normalize the non-IV operandDan Gohman2011-05-181-0/+91
* Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immedi...Johnny Chen2011-05-181-0/+3
* Enables vararg functions that pass all arguments via registers to be optimize...Chad Rosier2011-05-182-2/+87
* More instcombine cleanup aimed towards improving debug line info.Eli Friedman2011-05-181-4/+4
* An imminent fix to the x86_64 byval logic will expose a flaw in theStuart Hastings2011-05-181-1/+1
* Force a triple on a couple of tests; we don't support fast-isel of ret on Win64.Eli Friedman2011-05-182-2/+2
* Merge pmovzx test case into existing file.Stuart Hastings2011-05-182-15/+19
* PTX: add flag to disable mad/fma selectionJustin Holewinski2011-05-181-0/+16
* Tighten up checking of the validity of casts. (1) The IR parser wouldDuncan Sands2011-05-182-0/+12
* In r131488 I misunderstood how VREV works. It splits the vector in half and s...Tanya Lattner2011-05-181-3/+2
* Start trying to make InstCombine preserve more debug info. The idea here is ...Eli Friedman2011-05-181-4/+4
* Make some of the fast-isel tests actually test fast-isel (and fix test failur...Eli Friedman2011-05-181-12/+17
* X86 pmovsx/pmovzx ignore the upper half of their inputs.Stuart Hastings2011-05-171-0/+15
* vrev is incorrectly defined in the perfect shuffle table. The ordering is bac...Tanya Lattner2011-05-171-0/+17