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* Fix a typo (the the => the)Sylvestre Ledru2012-07-232-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160621 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed DAGCombine optimizations which generate select_cc for targetsNadav Rotem2012-07-231-0/+19
| | | | | | | | | | | | that do not support it (X86 does not lower select_cc). PR: 13428 Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160619 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r160602.Nick Lewycky2012-07-212-21/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160603 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach globalopt to play nice with leak checkers. This is a reapplication ofNick Lewycky2012-07-212-1/+21
| | | | | | | | | r160529 that was subsequently reverted. The fix was to not call GV->eraseFromParent() right before the caller does the same. The existing testcases already caught this bug if run under valgrind. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160602 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Mips long branch pass.Akira Hatanaka2012-07-211-4/+6
| | | | | | | | | This pass no longer requires that the global pointer value be saved to the stack or register since it uses bal instruction to compute branch distance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160601 91177308-0d34-0410-b5e6-96231b3b80d8
* baby steps toward fixing some problems with inbound GEPs that overflow, as ↵Nuno Lopes2012-07-201-0/+10
| | | | | | | | discussed 2 months ago or so. Make sure we do not emit index computations with NSW flags so that we dont get an undef value if the GEP overflows git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160589 91177308-0d34-0410-b5e6-96231b3b80d8
* move the bounds checking pass to the instrumentation folder, where it ↵Nuno Lopes2012-07-204-0/+0
| | | | | | | | belongs. I dunno why in the world I dropped it in the Scalar folder in the first place. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160587 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid folding loads that are unsafe to move.Jakob Stoklund Olesen2012-07-201-0/+143
| | | | | | | | | | LiveRangeEdit::foldAsLoad() can eliminate a register by folding a load into its only use. Only do that when the load is safe to move, and it won't extend any live ranges. This fixes PR13414. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160575 91177308-0d34-0410-b5e6-96231b3b80d8
* Split loop exiting edges more aggressively.Jakob Stoklund Olesen2012-07-201-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PHIElimination splits critical edges when it predicts it can resolve interference and eliminate copies. It doesn't split the edge if the interference wouldn't be resolved anyway because the phi-use register is live in the critical edge anyway. Teach PHIElimination to split loop exiting edges with interference, even if it wouldn't resolve the interference. This removes the necessary copies from the loop, which is still an improvement from injecting the copies into the loop. The test case demonstrates the improvement. Before: LBB0_1: cmpb $0, (%rdx) leaq 1(%rdx), %rdx movl %esi, %eax je LBB0_1 After: LBB0_1: cmpb $0, (%rdx) leaq 1(%rdx), %rdx je LBB0_1 movl %esi, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160571 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assertion in jump threading (PR13405).Richard Osborne2012-07-201-0/+8
| | | | | | | | | | GetBestDestForJumpOnUndef() assumes there is at least 1 successor, which isn't true if the block ends in an indirect branch with no successors. Fix this by bailing out earlier in this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160546 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] make sure that the crash callbacks do not get merged (Chandler's ↵Kostya Serebryany2012-07-201-18/+19
| | | | | | idea: insert an empty InlineAsm). Change the order in which the new BBs are inserted: the slow path BB is insert between old BBs, the crash BB is inserted at the end. Don't create an empty BB (introduced by recent commits). Update the test. The experimental code that does manual crash callback merge will most likely be deleted later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160544 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r160529 due to crashes.Nick Lewycky2012-07-192-21/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160532 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't wipe out global variables that are probably storing pointers to heapNick Lewycky2012-07-192-1/+21
| | | | | | | memory. This makes clang play nice with leak checkers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160529 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix remaining lit tests which were failing when run on an AtomPreston Gurd2012-07-1912-16/+51
| | | | | | | | | | processor. Patches by Tyler Nowicki, Andy Zhang, and Preston Gurd! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160520 91177308-0d34-0410-b5e6-96231b3b80d8
* test/DebugInfo/dwarfdump-test.test: Tweak expressions for Win32 to match ↵NAKAMURA Takumi2012-07-191-8/+8
| | | | | | | | | | | | backslashes. They are still odd, though. For example, Paths are printed on Win32 as below; /tmp/dbginfo\def2.cc:4:0 /tmp/dbginfo\include\decl2.h:1:0 /tmp/include\decl.h:5:0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160505 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm-fast-isel] Add support for vararg function calls.Jush Lu2012-07-192-4/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160500 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo library: add support for fetching absolute paths to source filesAlexey Samsonov2012-07-194-7/+17
| | | | | | | | | (instead of basenames) from DWARF. Use this behavior in llvm-dwarfdump tool. Reviewed by Benjamin Kramer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160496 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: remove redundant cmp against zero.Manman Ren2012-07-181-0/+11
| | | | | | | | | | Updated OptimizeCompare in peephole to remove redundant cmp against zero. We only remove Compare if CF and OF are not used. rdar://11855129 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160454 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch fixes 8 out of 20 unexpected failures in "make check"Preston Gurd2012-07-189-33/+69
| | | | | | | | | | | | | | | | | when run on an Intel Atom processor. The failures have arisen due to changes elsewhere in the trunk over the past 8 weeks or so. These failures were not detected by the Atom buildbot because the CPU on the Atom buildbot was not being detected as an Atom CPU. The fix for this problem is in Host.cpp and X86Subtarget.cpp, but shall remain commented out until the current set of Atom test failures are fixed. Patch by Andy Zhang and Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160451 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a somewhat nasty crasher in PR13378. This crashes inside ofChandler Carruth2012-07-181-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LiveIntervals due to the two-addr pass generating bogus MI code. The crux of the issue was a loop nesting problem. The intent of the code which attempts to transform instructions before converting them to two-addr form is to defer and reprocess any transformed instructions as the second processing is likely to have more opportunities to coalesce copies, etc. Unfortunately, there was one section of processing that was not deferred -- the INSERT_SUBREG rewriting. Due to quirks of how this rewriting proceeded, not only did it occur early, it removed the bits of information needed for the deferred processing to correctly generate the necessary two address form (specifically inserting a copy), but didn't trigger any immediate assertions and produced what appeared to be already valid two-address from code. Thus, the assertion only fired much later in the pipeline. The fix is to hoist the transformation logic up layer to where it can more firmly defer all further processing, and to teach the normal processing to handle an edge case previously handled as part of the transformation logic. This edge case (already matched tied register operands) needs to *not* defer any steps. As has been brought up repeatedly in the process: wow does this code need refactoring. I *may* squeeze in some time to at least bring sanity to this loop... but wow... =] Thanks to Jakob for helpful hints on the way here, and the review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160443 91177308-0d34-0410-b5e6-96231b3b80d8
* Added unit test for PR13361: LSR + SCEV "hangs" on reasonably sized test.Andrew Trick2012-07-181-0/+517
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160439 91177308-0d34-0410-b5e6-96231b3b80d8
* test commitVictor Oliveira2012-07-181-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160438 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips specific inline asm operand modifier 'M':Jack Carter2012-07-181-62/+123
| | | | | | | | | | | | | | | | | | | | | | | Print the high order register of a double word register operand. In 32 bit mode, a 64 bit double word integer will be represented by 2 32 bit registers. This modifier causes the high order register to be used in the asm expression. It is useful if you are using doubles in assembler and continue to control register to variable relationships. This patch also fixes a related bug in a previous patch: case 'D': // Second part of a double word register operand case 'L': // Low order register of a double word register operand case 'M': // High order register of a double word register operand I got 'D' and 'M' confused. The second part of a double word operand will only match 'M' for one of the endianesses. I had 'L' and 'D' be the opposite twins when 'L' and 'M' are. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160429 91177308-0d34-0410-b5e6-96231b3b80d8
* indvars: Linear function test replace should avoid reusing undef.Andrew Trick2012-07-182-4/+29
| | | | | | | | | | | | | | | | | | | | | | | Fixes PR13371: indvars pass incorrectly substitutes 'undef' values. I do not like this fix. It's needed until/unless the meaning of undef changes. It attempts to be complete according to the IR spec, but I don't have much confidence in the implementation given the difficulty testing undefined behavior. Worse, this invalidates some of my hard-fought work on indvars and LSR to optimize pointer induction variables. It results benchmark regressions, which I'll track internally. On x86_64 no LTO I see: -3% huffbench -3% 400.perlbench -8% fhourstones My only suggestion for recovering is to change the meaning of undef. If we could trust an arbitrary instruction to produce a some real value that can be manipulated (e.g. incremented) according to non-undef rules, then this case could be easily handled with SCEV. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160421 91177308-0d34-0410-b5e6-96231b3b80d8
* Make x86 asm parser to check for xmm vs ymm for index register in gather ↵Craig Topper2012-07-183-0/+39
| | | | | | instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160420 91177308-0d34-0410-b5e6-96231b3b80d8
* More replacing of target-dependent intrinsics with target-indepdent Joel Jones2012-07-182-7/+16
| | | | | | | | | | | | | | | | | | | | | | intrinsics. The second instruction(s) to be handled are the vector versions of count set bits (ctpop). The changes here are to clang so that it generates a target independent vector ctpop when it sees an ARM dependent vector bits set count. The changes in llvm are to match the target independent vector ctpop and in VMCore/AutoUpgrade.cpp to update any existing bc files containing ARM dependent vector pop counts with target-independent ctpops. There are also changes to an existing test case in llvm for ARM vector count instructions and to a test for the bitcode upgrade. <rdar://problem/11892519> There is deliberately no test for the change to clang, as so far as I know, no consensus has been reached regarding how to test neon instructions in clang; q.v. <rdar://problem/8762292> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160410 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case for r160387Evan Cheng2012-07-171-2/+44
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160389 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out r160101 and instead implement a dag combine to recover from ↵Evan Cheng2012-07-171-18/+0
| | | | | | instcombine transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160387 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/Transforms/LoopRotate/PhiRename-1.ll: FileCheck-ize. It fixes PR13301.NAKAMURA Takumi2012-07-171-2/+3
| | | | | | It began choking since Chandler's r159547, possibly due to improper expression on grep from TclParser to ShParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160367 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve behavior of DebugInfoEntryMinimal::getSubprogramName() introduced in ↵Alexey Samsonov2012-07-173-1/+6
| | | | | | | | | | | | r159512. To fetch a subprogram name we should not only inspect the DIE for this subprogram, but optionally inspect its specification, or its abstract origin (even if there is no inlining), or even specification of an abstract origin. Reviewed by Benjamin Kramer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160365 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash in the legalization of large vectors.Nadav Rotem2012-07-171-0/+16
| | | | | | | | | When truncating a result of a vector that is split we need to use the result of the split vector, and not re-split the dead node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160357 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement r160312 as target indepedenet dag combine.Evan Cheng2012-07-172-9/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160354 91177308-0d34-0410-b5e6-96231b3b80d8
* This is another case where instcombine demanded bits optimization createdEvan Cheng2012-07-171-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | large immediates. Add dag combine logic to recover in case the large immediates doesn't fit in cmp immediate operand field. int foo(unsigned long l) { return (l>> 47) == 1; } we produce %shr.mask = and i64 %l, -140737488355328 %cmp = icmp eq i64 %shr.mask, 140737488355328 %conv = zext i1 %cmp to i32 ret i32 %conv which codegens to movq $0xffff800000000000,%rax andq %rdi,%rax movq $0x0000800000000000,%rcx cmpq %rcx,%rax sete %al movzbl %al,%eax ret TargetLowering::SimplifySetCC would transform (X & -256) == 256 -> (X >> 8) == 1 if the immediate fails the isLegalICmpImmediate() test. For x86, that's immediates which are not a signed 32-bit immediate. Based on a patch by Eli Friedman. PR10328 rdar://9758774 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160346 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix function select_cc_f32 in test/CodeGen/Mips/selectcc.ll.Akira Hatanaka2012-07-161-6/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160329 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR13339 (remove the predecessor from the unwind BB when removing an invoke)Nuno Lopes2012-07-161-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160325 91177308-0d34-0410-b5e6-96231b3b80d8
* For something likeEvan Cheng2012-07-162-2/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | uint32_t hi(uint64_t res) { uint_32t hi = res >> 32; return !hi; } llvm IR looks like this: define i32 @hi(i64 %res) nounwind uwtable ssp { entry: %lnot = icmp ult i64 %res, 4294967296 %lnot.ext = zext i1 %lnot to i32 ret i32 %lnot.ext } The optimizer has optimize away the right shift and truncate but the resulting constant is too large to fit in the 32-bit immediate field. The resulting x86 code is worse as a result: movabsq $4294967296, %rax ## imm = 0x100000000 cmpq %rax, %rdi sbbl %eax, %eax andl $1, %eax This patch teaches the x86 lowering code to handle ult against a large immediate with trailing zeros. It will issue a right shift and a truncate followed by a comparison against a shifted immediate. shrq $32, %rdi testl %edi, %edi sete %al movzbl %al, %eax It also handles a ugt comparison against a large immediate with trailing bits set. i.e. X > 0x0ffffffff -> (X >> 32) >= 1 rdar://11866926 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160312 91177308-0d34-0410-b5e6-96231b3b80d8
* Make ComputeDemandedBits return a deterministic result when computing an ↵Nadav Rotem2012-07-161-0/+12
| | | | | | | | | | | | | AssertZext value. In the added testcase the constant 55 was behind an AssertZext of type i1, and ComputeDemandedBits reported that some of the bits were both known to be one and known to be zero. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160305 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "test/CodeGen/R600: Add some basic tests v6"Tom Stellard2012-07-1627-212/+0
| | | | | | This reverts commit 11d3457afcda7848448dd7f11b2ede6552ffb9ea. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160300 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] refactor instrumentation to allow merging the crash callbacks (not ↵Kostya Serebryany2012-07-161-6/+8
| | | | | | fully implemented yet, no functionality change except the BB order) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160284 91177308-0d34-0410-b5e6-96231b3b80d8
* Doubleword Shift Left Logical Plus 32Jack Carter2012-07-161-0/+45
| | | | | | | | | | | | | | | | | | | | | | Mips shift instructions DSLL, DSRL and DSRA are transformed into DSLL32, DSRL32 and DSRA32 respectively if the shift amount is between 32 and 63 Here is a description of DSLL: Purpose: Doubleword Shift Left Logical Plus 32 To execute a left-shift of a doubleword by a fixed amount--32 to 63 bits Description: GPR[rd] <- GPR[rt] << (sa+32) The 64-bit doubleword contents of GPR rt are shifted left, inserting zeros into the emptied bits; the result is placed in GPR rd. The bit-shift amount in the range 0 to 31 is specified by sa. This patch implements the direct object output of these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160277 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix tests that failed on i686-win32 after r160248:Alexey Samsonov2012-07-162-3/+4
| | | | | | | | | 1. FileCheck-ize epilogue.ll and allow another asm instruction to restore %rsp. 2. Remove check in widen_arith-3.ll that was hitting instruction in epilogue instead of vector add. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160274 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/R600: Add some basic tests v6Tom Stellard2012-07-1627-0/+212
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160273 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the 3-address conversion of LEA when one of the operands is anNadav Rotem2012-07-161-0/+16
| | | | | | | | | | | | | | undef virtual register. The problem is that ProcessImplicitDefs removes the definition of the register and marks all uses as undef. If we lose the undef marker then we get a register which has no def, is not marked as undef. The live interval analysis does not collect information for these virtual registers and we crash in later passes. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160260 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r160254 temporarily.Chandler Carruth2012-07-161-10/+12
| | | | | | | | | | | | It turns out that ASan relied on the at-the-end block insertion order to (purely by happenstance) disable some LLVM optimizations, which in turn start firing when the ordering is made more "normal". These optimizations in turn merge many of the instrumentation reporting calls which breaks the return address based error reporting in ASan. We're looking at several different options for fixing this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160256 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach AddressSanitizer to create basic blocks in a more natural order.Chandler Carruth2012-07-161-12/+10
| | | | | | | | | This is particularly useful to the backend code generators which try to process things in the incoming function order. Also, cleanup some uses of IRBuilder to be a bit simpler and more clear. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160254 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a basic test for AddressSanitizer. This is just a bare-bonesChandler Carruth2012-07-161-0/+70
| | | | | | | | | | | functionality test. In general, unless the functionality is substantially separated, we should lump more basic testing into this file. The test running infrastructure likes having a few test files with more comprehensive testing within them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160253 91177308-0d34-0410-b5e6-96231b3b80d8
* This CL changes the function prologue and epilogue emitted on X86 when stack ↵Alexey Samsonov2012-07-163-24/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | needs realignment. It is intended to fix PR11468. Old prologue and epilogue looked like this: push %rbp mov %rsp, %rbp and $alignment, %rsp push %r14 push %r15 ... pop %r15 pop %r14 mov %rbp, %rsp pop %rbp The problem was to reference the locations of callee-saved registers in exception handling: locations of callee-saved had to be re-calculated regarding the stack alignment operation. It would take some effort to implement this in LLVM, as currently MachineLocation can only have the form "Register + Offset". Funciton prologue and epilogue are now changed to: push %rbp mov %rsp, %rbp push %14 push %15 and $alignment, %rsp ... lea -$size_of_saved_registers(%rbp), %rsp pop %r15 pop %r14 pop %rbp Reviewed by Chad Rosier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160248 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be ↵Nadav Rotem2012-07-151-0/+8
| | | | | | | | | | wider than the output element type. Make sure to trunc them if needed. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160235 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach getTargetVShiftNode about TargetConstant nodes.Nadav Rotem2012-07-151-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160234 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll: Rewrite expressions to ↵NAKAMURA Takumi2012-07-151-1/+3
| | | | | | | | | fit various targets. - Make sure existence of "barrier". - Confirm reload corresponding to spill. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160232 91177308-0d34-0410-b5e6-96231b3b80d8
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