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* Fix typoEli Bendersky2013-02-191-1/+1
* Fix GCMetadaPrinter::finishAssembly not executed, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-191-0/+31
* ARM NEON: Merge a f32 bitcast of a v2i32 extracteltArnold Schwaighofer2013-02-191-0/+25
* [asan] instrument memory accesses with unusual sizesKostya Serebryany2013-02-191-1/+31
* Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,Reed Kotler2013-02-192-0/+184
* Temporarily revert r175470 for more review.Bill Wendling2013-02-191-23/+0
* Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.Reed Kotler2013-02-192-0/+198
* Check to see if the 'no-builtin' attribute is set before simplifying a librar...Bill Wendling2013-02-181-0/+23
* Comment out the rdar number.Chad Rosier2013-02-181-1/+1
* [fast-isel] Remove an invalid assert.Chad Rosier2013-02-181-0/+7
* Support for HiPE-compatible code emission, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-181-0/+67
* R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad patternVincent Lejeune2013-02-181-0/+19
* [asan] revert r175266 as it breaks code with packed structures. supporting lo...Kostya Serebryany2013-02-181-1/+1
* AArch64: adjust tests which rely on a default JITTim Northover2013-02-183-2/+14
* Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16.Reed Kotler2013-02-181-0/+96
* Expand pseudo/macro BteqzT8SltX16.Reed Kotler2013-02-181-0/+98
* Expand macro/pseudo BteqzT8CmpX16.Reed Kotler2013-02-181-0/+96
* Beginning of expanding all current mips16 macro/pseudo instruction sequences.Reed Kotler2013-02-181-0/+95
* [XCore] Add missing 2r instructions.Richard Osborne2013-02-171-0/+9
* [XCore] Add TSETR instruction.Richard Osborne2013-02-171-0/+3
* [XCore] Add missing u10 / lu10 instructions.Richard Osborne2013-02-171-0/+12
* [XCore] Add missing u6 / lu6 instructions.Richard Osborne2013-02-171-0/+36
* Force a cpu for test. It failed on atom due to different scheduling decisions.Benjamin Kramer2013-02-171-1/+1
* BBVectorize: Fix an invalid reference bugHal Finkel2013-02-171-0/+98
* The transform is:Bill Wendling2013-02-162-23/+12
* MCParser: Reject .balign with non-pow2 alignments.Benjamin Kramer2013-02-161-0/+10
* Replace "check:" wth "CHECK:".Jakub Staszak2013-02-161-4/+4
* Reinitialize the ivars in the subtarget so that they can be reset with the ne...Bill Wendling2013-02-161-1/+0
* [ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier2013-02-161-2/+8
* Derive ELF section type from the name in some cases where GNU as doesJoerg Sonnenberger2013-02-161-0/+62
* Temporary revert of 175320.Bill Wendling2013-02-151-0/+1
* Reinitialize the ivars in the subtarget.Bill Wendling2013-02-151-0/+66
* If bundle alignment is enabled, do not add data to a fragment with instructionsDerek Schuff2013-02-151-2/+13
* Forgot to 'svn add' the LoopVectorizer tests for the new parallel loop metada...Pekka Jaaskelainen2013-02-152-0/+166
* enable SDISel sincos optimization for GNU environmentsPaul Redmond2013-02-151-14/+40
* Teach InstCombine to work with smaller legal types in icmp (shl %v, C1), C2Arnaud A. de Grandmaison2013-02-152-3/+42
* [asan] support long double on 64-bit. See https://code.google.com/p/address-s...Kostya Serebryany2013-02-151-0/+9
* AArch64: remove ConstantIsland pass & put literals in separate section.Tim Northover2013-02-159-31/+38
* AArch64: refactor frame handling to use movz/movk for overlarge offsets.Tim Northover2013-02-151-18/+15
* Simplify the 'operator<' for the attribute object.Bill Wendling2013-02-151-2/+2
* Revert "Fix testcase for attribute ordering."Anna Zaks2013-02-151-1/+1
* Revert "Fix testcase for attribute ordering."Anna Zaks2013-02-151-1/+1
* Fix testcase for attribute ordering.Bill Wendling2013-02-151-1/+1
* Fix minor mips16 issues in directives for function prologue. Probably this doesReed Kotler2013-02-151-4/+20
* Fix testcase for attribute ordering.Bill Wendling2013-02-151-1/+1
* The ARM NEON vector compare instructions take three arguments. However, the Joel Jones2013-02-141-1/+67
* death to extra whitespaceKay Tiong Khoo2013-02-141-20/+20
* added basic support for Intel ADX instructionsKay Tiong Khoo2013-02-142-0/+36
* Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.Nadav Rotem2013-02-141-0/+34
* Re-apply r175088 for bug fix 13622: Add paired register support forWeiming Zhao2013-02-142-2/+55
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