| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | ARM assembler should accept shift-by-zero for any shifted-immediate operand. | Jim Grosbach | 2011-12-22 | 1 | -0/+17 |
| * | Give string constants generated by IRBuilder private linkage. | Benjamin Kramer | 2011-12-22 | 1 | -1/+1 |
| * | Make the unreachable probability much much heavier. The previous | Chandler Carruth | 2011-12-22 | 1 | -9/+9 |
| * | Speculatively revert r146578 to determine if it is the cause of a number of | Chad Rosier | 2011-12-22 | 3 | -313/+0 |
| * | Local dynamic TLS model for direct object output. Create the correct TLS MIPS | Akira Hatanaka | 2011-12-22 | 1 | -0/+36 |
| * | ARM VFP optional data type on VMOV GPR<-->SPR. | Jim Grosbach | 2011-12-21 | 1 | -0/+28 |
| * | Thumb2 assembly parsing of 'mov rd, rn, rrx'. | Jim Grosbach | 2011-12-21 | 1 | -1/+2 |
| * | Thumb2 assembly parsing of 'mov(register shifted register)' aliases. | Jim Grosbach | 2011-12-21 | 1 | -0/+25 |
| * | ARM NEON assmebly parsing for VLD2 to all lanes instructions. | Jim Grosbach | 2011-12-21 | 1 | -0/+8 |
| * | Fix a couple of copy-n-paste bugs. Noticed by George Russell! | Chad Rosier | 2011-12-21 | 1 | -0/+58 |
| * | Make some intrinsics safe to speculatively execute. | Nick Lewycky | 2011-12-21 | 1 | -3/+28 |
| * | Fix a couple of copy-n-paste bugs. Noticed by George Russell. | Evan Cheng | 2011-12-21 | 1 | -4/+26 |
| * | ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback. | Jim Grosbach | 2011-12-21 | 1 | -1/+4 |
| * | Fix bug in zero-store peephole pattern reported in pr11615. | Akira Hatanaka | 2011-12-21 | 1 | -0/+19 |
| * | Expand 64-bit CTLZ nodes if target architecture does not support it. Add test | Akira Hatanaka | 2011-12-21 | 1 | -0/+19 |
| * | Test case for r147017. | Akira Hatanaka | 2011-12-20 | 1 | -0/+25 |
| * | Enable and fix a test. | Jim Grosbach | 2011-12-20 | 1 | -2/+2 |
| * | Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates | Akira Hatanaka | 2011-12-20 | 1 | -0/+8 |
| * | 64-bit data directive. | Akira Hatanaka | 2011-12-20 | 1 | -0/+11 |
| * | 32-to-64-bit sext_inreg pattern. | Akira Hatanaka | 2011-12-20 | 1 | -0/+8 |
| * | Add code in MipsDAGToDAGISel for selecting constant +0.0. | Akira Hatanaka | 2011-12-20 | 1 | -0/+7 |
| * | Heed spill slot alignment on ARM. | Jakob Stoklund Olesen | 2011-12-20 | 2 | -2/+23 |
| * | ARM assembly parsing and encoding for VST2 single-element, double spaced. | Jim Grosbach | 2011-12-20 | 1 | -4/+18 |
| * | ARM enable a few more tests. | Jim Grosbach | 2011-12-20 | 1 | -4/+4 |
| * | ARM assembly parsing and encoding for VLD2 single-element, double spaced. | Jim Grosbach | 2011-12-20 | 1 | -4/+6 |
| * | ARM target code clean up. Check for iOS, not Darwin where it makes sense. | Evan Cheng | 2011-12-20 | 18 | -31/+31 |
| * | This is the second fix related to VZEXT_MOVL node. | Elena Demikhovsky | 2011-12-20 | 1 | -0/+9 |
| * | Begin teaching the X86 target how to efficiently codegen patterns that | Chandler Carruth | 2011-12-20 | 1 | -15/+32 |
| * | Unit test for r146950: LSR postinc expansion, PR11571. | Andrew Trick | 2011-12-20 | 1 | -0/+39 |
| * | Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930. | Bob Wilson | 2011-12-20 | 1 | -0/+55 |
| * | ARM assembly shifts by zero should be plain 'mov' instructions. | Jim Grosbach | 2011-12-20 | 1 | -0/+17 |
| * | Now that PR11464 is fixed, reapply the patch to fix PR11464, | Chris Lattner | 2011-12-20 | 1 | -0/+10 |
| * | fix PR11464 by preventing the linker from mapping two different struct types ... | Chris Lattner | 2011-12-20 | 1 | -0/+19 |
| * | Move tests to FileCheck. | Evan Cheng | 2011-12-19 | 2 | -3/+10 |
| * | ARM assembly parsing and encoding support for LDRD(label). | Jim Grosbach | 2011-12-19 | 1 | -1/+6 |
| * | Add a test case for r146900. | Akira Hatanaka | 2011-12-19 | 1 | -0/+38 |
| * | Add patterns for matching immediates whose lower 16-bit is cleared. These | Akira Hatanaka | 2011-12-19 | 2 | -6/+11 |
| * | ARM NEON two-operand aliases for VPADD. | Jim Grosbach | 2011-12-19 | 1 | -0/+10 |
| * | Remove definitions of double word shift plus 32 instructions. Assembler or | Akira Hatanaka | 2011-12-19 | 2 | -6/+6 |
| * | Remove the restriction on the first operand of the add node in SelectAddr. | Akira Hatanaka | 2011-12-19 | 1 | -1/+1 |
| * | ARM NEON implied destination aliases for VMAX/VMIN. | Jim Grosbach | 2011-12-19 | 2 | -110/+242 |
| * | ARM NEON relax parse time diagnostics for alignment specifiers. | Jim Grosbach | 2011-12-19 | 1 | -8/+8 |
| * | Allow inlining of functions with returns_twice calls, if they have the | Joerg Sonnenberger | 2011-12-18 | 1 | -0/+41 |
| * | Revert 146728 as it's causing failures on some of the external bots as well as | Chad Rosier | 2011-12-17 | 1 | -9/+0 |
| * | Revert r146822 at Pete Cooper's request as it broke clang self hosting. | Kevin Enderby | 2011-12-17 | 1 | -152/+0 |
| * | SimplifyCFG now predicts some conditional branches to true or false depending... | Pete Cooper | 2011-12-17 | 1 | -0/+152 |
| * | Deleting the json-bench-test until I understand why it is flaky. | Manuel Klimek | 2011-12-17 | 1 | -5/+0 |
| * | Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle. | Evan Cheng | 2011-12-17 | 1 | -0/+28 |
| * | Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added the | Rafael Espindola | 2011-12-17 | 1 | -0/+14 |
| * | Make sure that the lower bits on the VSELECT condition are properly set. | Lang Hames | 2011-12-17 | 1 | -4/+11 |
