| Commit message (Expand) | Author | Age | Files | Lines |
* | Delete dead code. Nothing ever instantiates this. | Jim Grosbach | 2011-10-27 | 1 | -4/+0 |
* | Move various generated tables into read-only memory, fixing up const correctn... | Benjamin Kramer | 2011-10-22 | 1 | -6/+8 |
* | Remove the TRI::getSubRegisterRegClass() hook. | Jakob Stoklund Olesen | 2011-10-06 | 1 | -27/+2 |
* | Add TRI::getSubClassWithSubReg(RC, Idx) function. | Jakob Stoklund Olesen | 2011-10-05 | 1 | -0/+40 |
* | TableGen: Privatize CodeGenRegisterClass::TheDef and Name. | Jakob Stoklund Olesen | 2011-10-04 | 1 | -21/+11 |
* | Move TableGen's parser and entry point into a library | Peter Collingbourne | 2011-10-01 | 1 | -1/+1 |
* | Store sub-class lists as a bit vector. | Jakob Stoklund Olesen | 2011-09-30 | 1 | -21/+4 |
* | Extract a slightly more general BitVector printer. | Jakob Stoklund Olesen | 2011-09-30 | 1 | -7/+16 |
* | Compute lists of super-classes in CodeGenRegisterClass. | Jakob Stoklund Olesen | 2011-09-30 | 1 | -39/+19 |
* | Switch to ArrayRef<CodeGenRegisterClass*>. | Jakob Stoklund Olesen | 2011-09-29 | 1 | -28/+24 |
* | Unconstify Inits | David Greene | 2011-07-29 | 1 | -1/+1 |
* | [AVX] Constify Inits | David Greene | 2011-07-29 | 1 | -1/+1 |
* | Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. | Evan Cheng | 2011-07-27 | 1 | -0/+3 |
* | We always bounds check the bit set, there is no need to emit zero bytes at th... | Benjamin Kramer | 2011-07-23 | 1 | -13/+10 |
* | Turn the DenseSet in MCRegisterClass into a tblgenerated bit field. This shou... | Benjamin Kramer | 2011-07-23 | 1 | -1/+39 |
* | Give TargetRegisterClass a pointer to the MCRegisterClass and use it to acces... | Benjamin Kramer | 2011-07-23 | 1 | -32/+18 |
* | Use the enum value for RegClassIDs. | Benjamin Kramer | 2011-07-22 | 1 | -2/+4 |
* | Remove unused variables. | Benjamin Kramer | 2011-07-22 | 1 | -4/+0 |
* | Teach tblgen to emit MCRegisterClasses. | Benjamin Kramer | 2011-07-22 | 1 | -2/+54 |
* | Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down | Evan Cheng | 2011-07-18 | 1 | -98/+125 |
* | Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previ... | Frits van Bommel | 2011-07-18 | 1 | -2/+2 |
* | Eliminate "const" from extern const to fix breakeage since r135184 on msvc. | NAKAMURA Takumi | 2011-07-15 | 1 | -1/+1 |
* | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -9/+12 |
* | Revert r134921, 134917, 134908 and 134907. They're causing failures | Eric Christopher | 2011-07-11 | 1 | -1/+1 |
* | [AVX] Make Inits Foldable | David Greene | 2011-07-11 | 1 | -1/+1 |
* | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -5/+3 |
* | Hide more details in tablegen generated MCRegisterInfo ctor function. | Evan Cheng | 2011-06-28 | 1 | -7/+7 |
* | Alternative name enum should go into the enum portion. | Evan Cheng | 2011-06-28 | 1 | -14/+21 |
* | Add support for alternative register names, useful for instructions whose ope... | Owen Anderson | 2011-06-27 | 1 | -0/+12 |
* | More refactoring. MC doesn't need know about subreg indices. | Evan Cheng | 2011-06-27 | 1 | -78/+79 |
* | Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc | Evan Cheng | 2011-06-27 | 1 | -111/+150 |
* | Remove dead typedefs. | Evan Cheng | 2011-06-25 | 1 | -3/+0 |
* | Rename TargetRegisterDesc to MCRegisterDesc | Evan Cheng | 2011-06-24 | 1 | -2/+2 |
* | - Add MCRegisterInfo registration machinery. Also added x86 registration rout... | Evan Cheng | 2011-06-24 | 1 | -2/+2 |
* | Make the generated InitXXXMCRegisterInfo function "static inline", so it does... | Benjamin Kramer | 2011-06-24 | 1 | -1/+1 |
* | Starting to refactor Target to separate out code that's needed to fully describe | Evan Cheng | 2011-06-24 | 1 | -70/+115 |
* | Store CodeGenRegisters as pointers so they won't be reallocated. | Jakob Stoklund Olesen | 2011-06-18 | 1 | -16/+16 |
* | Remove MethodProtos/MethodBodies and allocation_order_begin/end. | Jakob Stoklund Olesen | 2011-06-18 | 1 | -2/+1 |
* | Provide AltOrders for specifying alternative allocation orders. | Jakob Stoklund Olesen | 2011-06-18 | 1 | -4/+29 |
* | Replace the statically generated hashtables for checking register relationshi... | Owen Anderson | 2011-06-15 | 1 | -88/+1 |
* | Give CodeGenRegisterClass a real sorted member set. | Jakob Stoklund Olesen | 2011-06-15 | 1 | -6/+8 |
* | Fix a compile time regression caused by too small hash tables. | Jakob Stoklund Olesen | 2011-06-14 | 1 | -3/+16 |
* | Tweak hash function and compress hash tables. | Jakob Stoklund Olesen | 2011-06-12 | 1 | -19/+24 |
* | Remove now dead code. | Jakob Stoklund Olesen | 2011-06-12 | 1 | -85/+0 |
* | Extract the generateHashTable function. | Jakob Stoklund Olesen | 2011-06-12 | 1 | -144/+61 |
* | Compute lists of sub-regs, super-regs, and overlapping regs. | Jakob Stoklund Olesen | 2011-06-12 | 1 | -54/+31 |
* | Move the list of registers into CodeGenRegBank. | Jakob Stoklund Olesen | 2011-06-11 | 1 | -165/+9 |
* | Move some sub-register index calculations to CodeGenRegisters.cpp | Jakob Stoklund Olesen | 2011-06-10 | 1 | -8/+10 |
* | Make it possible to have unallocatable register classes. | Jakob Stoklund Olesen | 2011-06-02 | 1 | -13/+12 |
* | Use the dwarf->llvm mapping to print register names in the cfi | Rafael Espindola | 2011-05-30 | 1 | -0/+29 |