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authorFrancisco Jerez <currojerez@riseup.net>2015-07-20 17:13:17 +0300
committerFrancisco Jerez <currojerez@riseup.net>2015-08-11 15:07:38 +0300
commit47f9b07e4cf79a8249c6f9f09148a6a0b4fabacc (patch)
tree332d4cd53e50ff15cc9cbdde6e92bf1772bdc016
parent868f1ba0a4e6e3057be5b8c2458db4773cf82034 (diff)
downloadexternal_mesa3d-47f9b07e4cf79a8249c6f9f09148a6a0b4fabacc.zip
external_mesa3d-47f9b07e4cf79a8249c6f9f09148a6a0b4fabacc.tar.gz
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i965: Hook up image state upload.
v2: Add CS support. Move the image_params array back to brw_stage_prog_data. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Acked-by: Jason Ekstrand <jason@jlekstrand.net>
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h10
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs_surface_state.c25
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c12
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_surface_state.c25
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c72
6 files changed, 146 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index b851f38..707cd8f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -201,6 +201,7 @@ enum brw_state_id {
BRW_STATE_STATS_WM,
BRW_STATE_UNIFORM_BUFFER,
BRW_STATE_ATOMIC_BUFFER,
+ BRW_STATE_IMAGE_UNITS,
BRW_STATE_META_IN_PROGRESS,
BRW_STATE_INTERPOLATION_MAP,
BRW_STATE_PUSH_CONSTANT_ALLOCATION,
@@ -282,6 +283,7 @@ enum brw_state_id {
#define BRW_NEW_STATS_WM (1ull << BRW_STATE_STATS_WM)
#define BRW_NEW_UNIFORM_BUFFER (1ull << BRW_STATE_UNIFORM_BUFFER)
#define BRW_NEW_ATOMIC_BUFFER (1ull << BRW_STATE_ATOMIC_BUFFER)
+#define BRW_NEW_IMAGE_UNITS (1ull << BRW_STATE_IMAGE_UNITS)
#define BRW_NEW_META_IN_PROGRESS (1ull << BRW_STATE_META_IN_PROGRESS)
#define BRW_NEW_INTERPOLATION_MAP (1ull << BRW_STATE_INTERPOLATION_MAP)
#define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1ull << BRW_STATE_PUSH_CONSTANT_ALLOCATION)
@@ -1513,8 +1515,8 @@ struct brw_context
} perfmon;
int num_atoms[BRW_NUM_PIPELINES];
- const struct brw_tracked_state render_atoms[57];
- const struct brw_tracked_state compute_atoms[3];
+ const struct brw_tracked_state render_atoms[60];
+ const struct brw_tracked_state compute_atoms[4];
/* If (INTEL_DEBUG & DEBUG_BATCH) */
struct {
@@ -1792,6 +1794,10 @@ void brw_upload_abo_surfaces(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_stage_state *stage_state,
struct brw_stage_prog_data *prog_data);
+void brw_upload_image_surfaces(struct brw_context *brw,
+ struct gl_shader *shader,
+ struct brw_stage_state *stage_state,
+ struct brw_stage_prog_data *prog_data);
/* brw_surface_formats.c */
bool brw_render_target_supported(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
index 0b8bfc3..0bb3074 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
@@ -119,3 +119,28 @@ const struct brw_tracked_state brw_gs_abo_surfaces = {
},
.emit = brw_upload_gs_abo_surfaces,
};
+
+static void
+brw_upload_gs_image_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* BRW_NEW_GEOMETRY_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY];
+
+ if (prog) {
+ /* BRW_NEW_GS_PROG_DATA, BRW_NEW_IMAGE_UNITS */
+ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY],
+ &brw->gs.base, &brw->gs.prog_data->base.base);
+ }
+}
+
+const struct brw_tracked_state brw_gs_image_surfaces = {
+ .dirty = {
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_GEOMETRY_PROGRAM |
+ BRW_NEW_GS_PROG_DATA |
+ BRW_NEW_IMAGE_UNITS,
+ },
+ .emit = brw_upload_gs_image_surfaces,
+};
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index cf3a96c..78a1f87 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -72,8 +72,10 @@ extern const struct brw_tracked_state brw_vs_samplers;
extern const struct brw_tracked_state brw_gs_samplers;
extern const struct brw_tracked_state brw_vs_ubo_surfaces;
extern const struct brw_tracked_state brw_vs_abo_surfaces;
+extern const struct brw_tracked_state brw_vs_image_surfaces;
extern const struct brw_tracked_state brw_gs_ubo_surfaces;
extern const struct brw_tracked_state brw_gs_abo_surfaces;
+extern const struct brw_tracked_state brw_gs_image_surfaces;
extern const struct brw_tracked_state brw_vs_unit;
extern const struct brw_tracked_state brw_gs_prog;
extern const struct brw_tracked_state brw_wm_prog;
@@ -84,7 +86,9 @@ extern const struct brw_tracked_state brw_gs_binding_table;
extern const struct brw_tracked_state brw_vs_binding_table;
extern const struct brw_tracked_state brw_wm_ubo_surfaces;
extern const struct brw_tracked_state brw_wm_abo_surfaces;
+extern const struct brw_tracked_state brw_wm_image_surfaces;
extern const struct brw_tracked_state brw_cs_abo_surfaces;
+extern const struct brw_tracked_state brw_cs_image_surfaces;
extern const struct brw_tracked_state brw_wm_unit;
extern const struct brw_tracked_state brw_interpolation_map;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 6096b49..9de42ce 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -194,6 +194,10 @@ static const struct brw_tracked_state *gen7_render_atoms[] =
&gen7_hw_binding_tables, /* Enable hw-generated binding tables for Haswell */
+ &brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
+ &brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
+ &brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
+
&gen6_vs_push_constants, /* Before vs_state */
&gen6_gs_push_constants, /* Before gs_state */
&gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
@@ -253,6 +257,7 @@ static const struct brw_tracked_state *gen7_render_atoms[] =
static const struct brw_tracked_state *gen7_compute_atoms[] =
{
&brw_state_base_address,
+ &brw_cs_image_surfaces,
&brw_cs_abo_surfaces,
&brw_cs_state,
};
@@ -272,6 +277,10 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
&gen7_hw_binding_tables, /* Enable hw-generated binding tables for Broadwell */
+ &brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
+ &brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
+ &brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
+
&gen6_vs_push_constants, /* Before vs_state */
&gen6_gs_push_constants, /* Before gs_state */
&gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
@@ -338,6 +347,7 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
static const struct brw_tracked_state *gen8_compute_atoms[] =
{
&gen8_state_base_address,
+ &brw_cs_image_surfaces,
&brw_cs_abo_surfaces,
&brw_cs_state,
};
@@ -472,6 +482,7 @@ void brw_init_state( struct brw_context *brw )
ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
ctx->DriverFlags.NewTextureBuffer = BRW_NEW_TEXTURE_BUFFER;
ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
+ ctx->DriverFlags.NewImageUnits = BRW_NEW_IMAGE_UNITS;
}
@@ -585,6 +596,7 @@ static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_STATS_WM),
DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER),
DEFINE_BIT(BRW_NEW_ATOMIC_BUFFER),
+ DEFINE_BIT(BRW_NEW_IMAGE_UNITS),
DEFINE_BIT(BRW_NEW_META_IN_PROGRESS),
DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP),
DEFINE_BIT(BRW_NEW_PUSH_CONSTANT_ALLOCATION),
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index b2f91bd..72e37d4 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -191,3 +191,28 @@ const struct brw_tracked_state brw_vs_abo_surfaces = {
},
.emit = brw_upload_vs_abo_surfaces,
};
+
+static void
+brw_upload_vs_image_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* BRW_NEW_VERTEX_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
+
+ if (prog) {
+ /* BRW_NEW_VS_PROG_DATA, BRW_NEW_IMAGE_UNITS */
+ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX],
+ &brw->vs.base, &brw->vs.prog_data->base.base);
+ }
+}
+
+const struct brw_tracked_state brw_vs_image_surfaces = {
+ .dirty = {
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_IMAGE_UNITS |
+ BRW_NEW_VERTEX_PROGRAM |
+ BRW_NEW_VS_PROG_DATA,
+ },
+ .emit = brw_upload_vs_image_surfaces,
+};
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 35df6f1..f13a97c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1024,6 +1024,31 @@ const struct brw_tracked_state brw_cs_abo_surfaces = {
.emit = brw_upload_cs_abo_surfaces,
};
+static void
+brw_upload_cs_image_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* _NEW_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE];
+
+ if (prog) {
+ /* BRW_NEW_CS_PROG_DATA, BRW_NEW_IMAGE_UNITS */
+ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE],
+ &brw->cs.base, &brw->cs.prog_data->base);
+ }
+}
+
+const struct brw_tracked_state brw_cs_image_surfaces = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_CS_PROG_DATA |
+ BRW_NEW_IMAGE_UNITS
+ },
+ .emit = brw_upload_cs_image_surfaces,
+};
+
static uint32_t
get_image_format(struct brw_context *brw, mesa_format format, GLenum access)
{
@@ -1204,6 +1229,53 @@ update_image_surface(struct brw_context *brw,
}
void
+brw_upload_image_surfaces(struct brw_context *brw,
+ struct gl_shader *shader,
+ struct brw_stage_state *stage_state,
+ struct brw_stage_prog_data *prog_data)
+{
+ struct gl_context *ctx = &brw->ctx;
+
+ if (shader && shader->NumImages) {
+ for (unsigned i = 0; i < shader->NumImages; i++) {
+ struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[i]];
+ const unsigned surf_idx = prog_data->binding_table.image_start + i;
+
+ update_image_surface(brw, u, shader->ImageAccess[i],
+ surf_idx,
+ &stage_state->surf_offset[surf_idx],
+ &prog_data->image_param[i]);
+ }
+
+ brw->ctx.NewDriverState |= BRW_NEW_SURFACES;
+ }
+}
+
+static void
+brw_upload_wm_image_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* BRW_NEW_FRAGMENT_PROGRAM */
+ struct gl_shader_program *prog = ctx->Shader._CurrentFragmentProgram;
+
+ if (prog) {
+ /* BRW_NEW_FS_PROG_DATA, BRW_NEW_IMAGE_UNITS */
+ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_FRAGMENT],
+ &brw->wm.base, &brw->wm.prog_data->base);
+ }
+}
+
+const struct brw_tracked_state brw_wm_image_surfaces = {
+ .dirty = {
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_FRAGMENT_PROGRAM |
+ BRW_NEW_FS_PROG_DATA |
+ BRW_NEW_IMAGE_UNITS
+ },
+ .emit = brw_upload_wm_image_surfaces,
+};
+
+void
gen4_init_vtable_surface_functions(struct brw_context *brw)
{
brw->vtbl.update_texture_surface = brw_update_texture_surface;