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author | Marek Olšák <marek.olsak@amd.com> | 2014-05-06 13:44:27 +0200 |
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committer | Marek Olšák <marek.olsak@amd.com> | 2014-06-02 12:58:22 +0200 |
commit | fe98bfb2615ff6e57cd66f4fc34dc0d45f6dd7e2 (patch) | |
tree | e58c0e3dfe91cfad5d8a6686126f59f2e5b1db2a /src/gallium/drivers/radeonsi | |
parent | 3aed75c8592e76de05f310118134cfc7cddf4360 (diff) | |
download | external_mesa3d-fe98bfb2615ff6e57cd66f4fc34dc0d45f6dd7e2.zip external_mesa3d-fe98bfb2615ff6e57cd66f4fc34dc0d45f6dd7e2.tar.gz external_mesa3d-fe98bfb2615ff6e57cd66f4fc34dc0d45f6dd7e2.tar.bz2 |
radeon: add basic register setup for per-sample shading
Only for Cayman, SI, CIK.
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index e9fa433..769b5e6 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1921,7 +1921,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx, sctx->framebuffer.atom.num_dw = state->nr_cbufs*15 + (8 - state->nr_cbufs)*3; sctx->framebuffer.atom.num_dw += state->zsbuf ? 23 : 4; sctx->framebuffer.atom.num_dw += 3; /* WINDOW_SCISSOR_BR */ - sctx->framebuffer.atom.num_dw += 25; /* MSAA */ + sctx->framebuffer.atom.num_dw += 28; /* MSAA */ sctx->framebuffer.atom.dirty = true; } @@ -2026,7 +2026,7 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom S_028208_BR_X(state->width) | S_028208_BR_Y(state->height)); cayman_emit_msaa_sample_locs(cs, sctx->framebuffer.nr_samples); - cayman_emit_msaa_config(cs, sctx->framebuffer.nr_samples); + cayman_emit_msaa_config(cs, sctx->framebuffer.nr_samples, 1); } /* @@ -3041,8 +3041,6 @@ void si_init_config(struct si_context *sctx) si_cmd_context_control(pm4); - si_pm4_set_reg(pm4, R_028A4C_PA_SC_MODE_CNTL_1, 0x0); - si_pm4_set_reg(pm4, R_028A10_VGT_OUTPUT_PATH_CNTL, 0x0); si_pm4_set_reg(pm4, R_028A14_VGT_HOS_CNTL, 0x0); si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, 0x0); |