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author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-04-21 16:19:51 -0700 |
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committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-04-26 14:55:22 -0700 |
commit | a543f741bf33e4632d4d43b797bdcd0e04c7983f (patch) | |
tree | d369c230a161d29dcc627bd547beff6b0d3f6b42 /src/mesa/drivers/dri/i965/brw_blorp.h | |
parent | 38399364978f5576aae71a70d735b4d1b3a8e4dc (diff) | |
download | external_mesa3d-a543f741bf33e4632d4d43b797bdcd0e04c7983f.zip external_mesa3d-a543f741bf33e4632d4d43b797bdcd0e04c7983f.tar.gz external_mesa3d-a543f741bf33e4632d4d43b797bdcd0e04c7983f.tar.bz2 |
i965/blorp: Roll mip_info into surface_info
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_blorp.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.h | 28 |
1 files changed, 9 insertions, 19 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index 60750d3..191ccbb 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -69,14 +69,17 @@ enum { BRW_BLORP_NUM_BINDING_TABLE_ENTRIES }; - -class brw_blorp_mip_info +class brw_blorp_surface_info { public: - brw_blorp_mip_info(); + brw_blorp_surface_info(); + + void set(struct brw_context *brw, + struct intel_mipmap_tree *mt, + unsigned int level, unsigned int layer, + mesa_format format, bool is_render_target); - void set(struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer); + uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const; struct intel_mipmap_tree *mt; @@ -121,19 +124,6 @@ public: * pixels. */ uint32_t y_offset; -}; - -class brw_blorp_surface_info : public brw_blorp_mip_info -{ -public: - brw_blorp_surface_info(); - - void set(struct brw_context *brw, - struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, - mesa_format format, bool is_render_target); - - uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const; /* Setting this flag indicates that the buffer's contents are W-tiled * stencil data, but the surface state should be set up for Y tiled @@ -238,7 +228,7 @@ public: uint32_t y0; uint32_t x1; uint32_t y1; - brw_blorp_mip_info depth; + brw_blorp_surface_info depth; uint32_t depth_format; brw_blorp_surface_info src; brw_blorp_surface_info dst; |