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| author | Matt Turner <mattst88@gmail.com> | 2016-02-17 11:04:50 -0800 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2016-03-30 19:54:30 -0700 |
| commit | 436bdd7403bfa260ce6dedcbd0ba96df2ae40ce8 (patch) | |
| tree | 172ab1fa922dbf4ac829bb17e52f095a5ade8659 /src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | |
| parent | 0d253ce34a8074a6c880d405c5bf860766afe358 (diff) | |
| download | external_mesa3d-436bdd7403bfa260ce6dedcbd0ba96df2ae40ce8.zip external_mesa3d-436bdd7403bfa260ce6dedcbd0ba96df2ae40ce8.tar.gz external_mesa3d-436bdd7403bfa260ce6dedcbd0ba96df2ae40ce8.tar.bz2 | |
Revert "i965: Don't add barrier deps for FB write messages."
This reverts commit d0e1d6b7e27bf5f05436e47080d326d7daa63af2.
The change in the vec4 code is a mistake -- there's never an
FS_OPCODE_FB_WRITE in vec4 code.
The change in the fs code had the (harmless) effect of not recognizing
an FB_WRITE as a scheduling barrier even if it was marked EOT --
harmless because the scheduler marked the last instruction of a block as
a barrier, something I'm changing in the following patches.
This will be reimplemented later in the series.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index 2153898..66eb07e 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -939,9 +939,8 @@ fs_instruction_scheduler::calculate_deps() foreach_in_list(schedule_node, n, &instructions) { fs_inst *inst = (fs_inst *)n->inst; - if ((inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || - inst->has_side_effects()) && - inst->opcode != FS_OPCODE_FB_WRITE) + if (inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || + inst->has_side_effects()) add_barrier_deps(n); /* read-after-write deps. */ @@ -1183,7 +1182,7 @@ vec4_instruction_scheduler::calculate_deps() foreach_in_list(schedule_node, n, &instructions) { vec4_instruction *inst = (vec4_instruction *)n->inst; - if (inst->has_side_effects() && inst->opcode != FS_OPCODE_FB_WRITE) + if (inst->has_side_effects()) add_barrier_deps(n); /* read-after-write deps. */ |