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| author | Kenneth Graunke <kenneth@whitecape.org> | 2014-07-26 13:12:37 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2014-08-02 05:16:40 -0700 |
| commit | 7679393f561ca4f0e9c9587d4b208b035b7b9098 (patch) | |
| tree | c4251cccc885439e3e3812df28b49b1e212bc408 /src/mesa/drivers/dri/i965/brw_state.h | |
| parent | a50b640dfe3580049e07bfdafb2e69410844359d (diff) | |
| download | external_mesa3d-7679393f561ca4f0e9c9587d4b208b035b7b9098.zip external_mesa3d-7679393f561ca4f0e9c9587d4b208b035b7b9098.tar.gz external_mesa3d-7679393f561ca4f0e9c9587d4b208b035b7b9098.tar.bz2 | |
i965: Make brw_update_sampler_state use 8 bits for LOD fields on Gen7+.
This was the only actual difference between Gen4-6 and Gen7+ in terms of
the values we program. The rest was just mechanical structure
rearrangement.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state.h')
0 files changed, 0 insertions, 0 deletions