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author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-04-05 15:43:48 -0700 |
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committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-04-15 14:04:38 -0700 |
commit | a112391d52a458c588b8770cbf1ca9fce8863b79 (patch) | |
tree | 9635939c0c11617bcc8f4a721d7e3394acddec38 /src/mesa/drivers/dri/i965/brw_vec4.cpp | |
parent | aaac8a18904f44e93a2223c93727086358d6a655 (diff) | |
download | external_mesa3d-a112391d52a458c588b8770cbf1ca9fce8863b79.zip external_mesa3d-a112391d52a458c588b8770cbf1ca9fce8863b79.tar.gz external_mesa3d-a112391d52a458c588b8770cbf1ca9fce8863b79.tar.bz2 |
i965/vec4: Handle MOV_INDIRECT in pack_uniform_registers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index e2aa109..6433fc5 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -574,6 +574,24 @@ vec4_visitor::pack_uniform_registers() BRW_GET_SWZ(inst->src[i].swizzle, c) + 1); } } + + if (inst->opcode == SHADER_OPCODE_MOV_INDIRECT && + inst->src[0].file == UNIFORM) { + assert(inst->src[2].file == BRW_IMMEDIATE_VALUE); + assert(inst->src[0].subnr == 0); + + unsigned bytes_read = inst->src[2].ud; + assert(bytes_read % 4 == 0); + unsigned vec4s_read = DIV_ROUND_UP(bytes_read, 16); + + /* We just mark every register touched by a MOV_INDIRECT as being + * fully used. This ensures that it doesn't broken up piecewise by + * the next part of our packing algorithm. + */ + int reg = inst->src[0].nr; + for (unsigned i = 0; i < vec4s_read; i++) + chans_used[reg + i] = 4; + } } int new_uniform_count = 0; |