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* mesa/SConscript: Use Makefile.sources instead of duplicating the file listsJason Ekstrand2014-08-042-333/+11
| | | | | Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* targets/dri: resolve the scons buildEmil Velikov2014-08-041-0/+1
| | | | | | | | | | | With earlier commit we've conditionally enabled/added the kms_dri target for automake builds. Unfortunately the we forgot to add the appropriate define in the scons build, resulting in a broken library due to the undefined symbol 'kms_swrast_create_screen'. Reported-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Tested-by: Roland Scheidegger <sroland@vmware.com>
* mesa/st: Fix compiler warningsJan Vesely2014-08-041-5/+3
| | | | | | | both array and index are unsigned types Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Brian Paul <brianp@vmware.com>
* gallium: Fix compiler warning.Jan Vesely2014-08-042-2/+2
| | | | | | | warning: type qualifiers ignored on function return type Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Brian Paul <brianp@vmware.com>
* glsl: fix switch statement default case regressionsTapani Pälli2014-08-041-6/+6
| | | | | | | | | | | | This patch fixes regressions caused by commit 48deb4d. Regressions happened because 'run_default' var did not get initialized when default case was the last one. Now all the switch tests in es3conform suite are passing. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81857
* st/dri: Fix driver loading if swrast isn't builtAaron Watry2014-08-031-0/+4
| | | | | | | | | | | | | | | | | | | | If building hardware drivers only, then kms_swrast_create_screen won't be defined in inline_drm_helper.h and hardware drivers will fail to dlopen as a result. Copy the #if guards from inline_drm_helper.h to dri_kms_init_screen to make the definition/use of the function match. Fixes radeonsi_dri.so dlopen with the following configure: ./configure --with-dri-drivers= --with-dri-driverdir=/usr/local/lib/dri/ \ --enable-gbm --enable-gallium-gbm --enable-debug --enable-opencl \ --enable-opencl-icd --with-gallium-drivers=radeonsi \ --with-egl-platforms=drm --enable-glx-tls --enable-texture-float \ --enable-omx Signed-off-by: Aaron Watry <awatry@gmail.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
* mesa/st: only convert AND(a, NOT(b)) into MAD when not using native integersIlia Mirkin2014-08-031-1/+1
| | | | | | | | | | | Native integers imply a somewhat different handling of booleans. Instead of being 1.0/0.0 floats, they are 0 (true) / -1 (false) integers. As such the original optimization no longer applies. Reported-by: Glenn Kennard <glenn.kennard@gmail.com> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Cc: "10.2" <mesa-stable@lists.freedesktop.org>
* Remove XA state tracker support for RadeonMarek Olšák2014-08-032-35/+3
| | | | | | | We don't support this type of X acceleration and we never did. Other drivers might want to do the same thing. Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
* docs: Import 10.2.5 release notes, add news item.Carl Worth2014-08-023-0/+195
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* mesa/st: add support for dynamic ubo selectionIlia Mirkin2014-08-021-28/+34
| | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Brian Paul <brianp@vmware.com> (v1) v2: fix src register, use index2D for base of 1 Acked-by: Marek Olšák <marek.olsak@amd.com>
* i965: Delete stale "pre-gen4" comment in texture validation code.Kenneth Graunke2014-08-021-5/+0
| | | | | | | | | | | In commit 16060c5adcd4d809f97e874fcde763260c17ac18, Eric changed the code to not relayout just for baselevel changes - only if the range of miplevels actually increases. So this comment is now wrong. Notably, the i915 version of the code actually does what the comment says. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Delete sampler state structures.Kenneth Graunke2014-08-021-99/+0
| | | | | | | | We've moved to using bitshifts (like we did for surface state); nothing uses the structures anymore. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Replace sizeof(struct gen7_sampler_state) with the size itself.Kenneth Graunke2014-08-024-8/+8
| | | | | | | | | | These are the last users of struct gen7_sampler_state. v2: Use a local sampler_state_size variable, to help distinguish the various 16s (suggested by Topi Pohjolainen). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Drop sizeof(struct brw_sampler_state) from estimated prim size.Kenneth Graunke2014-08-021-3/+3
| | | | | | | | | | This is the last user of the structure. v2: Use a local variable with a sensible name so people know what 16 is. (Suggested by Topi Pohjolainen). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make BLORP use brw_emit_sampler_state().Kenneth Graunke2014-08-023-95/+33
| | | | | | | | This simplifies the code, removes use of the old structures, and also allows us to combine the Gen6 and Gen7+ code. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Delete redundant sampler state dumping code.Kenneth Graunke2014-08-021-34/+5
| | | | | | | | | | | Although the Gen4-6 and Gen7+ variants used different structure types, they didn't use any of the fields - only the size, which is identical. So both decoders did exactly the same thing. Someday we should implement useful decoders for SAMPLER_STATE. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make some brw_sampler_state.c functions static again.Kenneth Graunke2014-08-022-8/+2
| | | | | | | | Now that gen7_sampler_state.c is gone, everything is once again in a single file. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Stop using gen7_update_sampler_state; rm gen7_sampler_state.c.Kenneth Graunke2014-08-024-194/+2
| | | | | | | | The code in brw_sampler_state.c now handles all generations; we don't need the extra Gen7+ only code anymore. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make brw_update_sampler_state use 8 bits for LOD fields on Gen7+.Kenneth Graunke2014-08-021-3/+4
| | | | | | | | | This was the only actual difference between Gen4-6 and Gen7+ in terms of the values we program. The rest was just mechanical structure rearrangement. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make brw_update_sampler_state() use brw_emit_sampler_state().Kenneth Graunke2014-08-021-119/+92
| | | | | | | | | | | | | | Instead of stuffing bits directly into the brw_sampler_state structure, we now store them in local variables, then use brw_emit_sampler_state() to assemble the packet. This separates the decision about what values to use from the actual packet emission, which makes the code more reusable across generations. v2: Put const on a bunch of local variables and move declarations, as suggested by Topi Pohjolainen. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Introduce a function to emit a SAMPLER_STATE structure.Kenneth Graunke2014-08-022-0/+93
| | | | | | | | | | | | This simply assembles all the SAMPLER_STATE fields into their proper bit locations. Making it work on all generations was easy enough; some of the fields are even in the same place. Not used by anything yet, but will be soon. I made it non-static so BLORP can use it too. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Add const to upload_default_color's sampler parameter.Kenneth Graunke2014-08-022-2/+2
| | | | | | | | It doesn't edit the value, and this lets us use const in more places. Needed to implement Topi's review comments for the next patch. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add #defines for SAMPLER_STATE fields.Kenneth Graunke2014-08-021-0/+54
| | | | | | | | | | | We'll use these to replace the existing structures. I've adopted the convention that "BRW" applies to all hardware, and "GENX" applies starting with generation X, but might be replaced by some later generation. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Convert wrap mode #defines to an enum.Kenneth Graunke2014-08-021-7/+9
| | | | | | | | This makes it easy to tell that they're grouped together, and also improves gdb printing. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Delete gen7_upload_sampler_state_table and vtable mechanism.Kenneth Graunke2014-08-025-70/+3
| | | | | | | | | | | brw_upload_sampler_state_table now handles all generations, so we don't need the vtable mechanism either. There's still a lot of code duplication; the next patches will address that. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make brw_upload_sampler_state_table handle Gen7+ as well.Kenneth Graunke2014-08-023-5/+49
| | | | | | | | | | | | | | | | This copies a few changes from gen7_upload_sampler_state_table; the next patch will delete that function. Gen7+ has per-stage sampler state pointer update packets, so we emit them as soon as we emit a new table for a stage. On Gen6 and earlier, we have a single packet, so we delay until we've changed everything that's going to be changed. v2: Split 3DSTATE_SAMPLER_STATE_POINTERS_XS packet emission into a helper function (suggested by Topi Pohjolainen). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Shift brw_upload_sampler_state_table away from structures.Kenneth Graunke2014-08-021-8/+15
| | | | | | | | | | | | The Gen4-6 and Gen7+ code is virtually identical, but both use different structure types. Switching to use a uint32_t pointer and operate on the number of DWords will make it possible to share code. It turns out that SURFACE_STATE is the same number of DWords on every platform currently; it will be easy to handle a change there, though. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Push computation for sampler state batch offsets up a level.Kenneth Graunke2014-08-021-10/+12
| | | | | | | | | | | | Other than this, brw_update_sampler_state only deals with a single SAMPLER_STATE structure, and doesn't need to know which position it is in the table. The caller takes care of dealing with multiple surface states. Pushing this up a level allows us to drop the ss_index parameter. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Drop unused 'ss_index' parameter from gen7_update_sampler_state.Kenneth Graunke2014-08-021-2/+2
| | | | | | | This was copied from the Gen4-6 code, but is unused. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Stop storing sdc_offset in brw_stage_state.Kenneth Graunke2014-08-023-18/+13
| | | | | | | | | | | | sdc_offset is produced and consumed in the same function, so there's no need to store it in the context, nor pass pointers to it through various call chains. Saves 128 bytes per brw_stage_state structure, and makes the code clearer as well. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Drop the degenerate brw_sampler_default_color structure.Kenneth Graunke2014-08-023-16/+8
| | | | | | | | | It's just an array of four floats, and we have an array of four floats, so this is literally just a memcpy...but with custom structs and strange macros to give the appearance of doing something more. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Write a better file comment for brw_sampler_state.c.Kenneth Graunke2014-08-021-7/+6
| | | | | | | The old one has been inaccurate for years. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Rename brw_wm_sampler_state.c to brw_sampler_state.c.Kenneth Graunke2014-08-023-2/+2
| | | | | | | | | | | | | | | When the driver was originally written, it only supported texturing in the pixel shader backend; vertex and geometry shader texturing came much later. Originally, the pixel shader was referred to as "WM" (the Windowizer/Masker unit). So, this code happened to only be relevant for the WM stage, at the time. However, sampler state really applies to all stages, so putting "wm" in the filename doesn't make sense. I dropped it in gen7_sampler_state.c; at this point the asymmetry just trips people up. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965/blorp: Don't set min_mag_neq bit in Gen6 SAMPLER_STATE.Kenneth Graunke2014-08-021-2/+0
| | | | | | | | | The "Min/Mag State Not Equal" bit is supposed to be set when the min/mag filters or address rounding modes differ. BLORP uses identical min/mag settings, so the bit should be unset. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* define GL_OES_standard_derivatives if extension is supportedKevin Rogovin2014-08-021-0/+2
| | | | | | | | | Define the macro GL_OES_standard_derivatives as 1 if the extension GL_OES_standard_derivatives is supported. V2 [Chris]: Correct trailing whitespace Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
* llvmpipe: don't store number of layers per levelRoland Scheidegger2014-08-012-78/+50
| | | | | | | | | | | | | | | | This could be recalculated, though it turns out the only use of it after resource allocation is for calculating whole resource size (for scene size accounting though that isn't quite ideal neither). Thus, instead just store the whole resource size and drop it (saving a couple bytes of storage per resource). It makes things simpler too. Note that for the accounting winsys resources always come back with size 0 but this is unchanged (we don't actually know the size in any case). Also reformat llvmpipe_texture_layout (drop unneded indentation). v2: adapt to previous changes. Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
* llvmpipe: integrate memory allocation into llvmpipe_texture_layoutRoland Scheidegger2014-08-011-45/+29
| | | | | | | | | | | | | | | Seems pointless to just duplicate some of the calculations (the calculation of actual memory used compared to what was predicted in llvmpipe_texture_layout actually could have differed slightly in some cases due to different alignment rules used though this should have been of no consequence). v2: keep the previous mip alignment of MAX2(64, cacheline). This was added for ARB_map_buffer_alignment - I'm not convinced it's needed for textures, but it was supposed to be cleanup without functional change. Also replace div with 64bit mul / comparison. Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
* llvmpipe: get rid of impossible code in alloc_image_dataRoland Scheidegger2014-08-011-26/+13
| | | | | | | Only used for non display target resources. Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* i965/miptree: Layout 1D Array as 2D Array with height of 1Jordan Justen2014-08-011-0/+20
| | | | | | | | | | | | | | | | | | | 1D array miptrees were being laid out as a 2D texture with 1 slice. This happened due to the mesa core storing the 1D array slice count in the height field. On Intel hardware, we want to create a 2D array with a height of 1 for the 1D array case. Fixes assertion failure in piglit (gen6, gen8): spec/glsl-1.30/execution/tex-miplevel-selection textureOffset 1DArrayShadow In release builds of Mesa, this test was observed to cause a GPU hang on gen8. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Cc: "10.2" <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81450 Tested-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
* r600g: Implement gpu_shader5 textureGatherGlenn Kennard2014-08-013-7/+38
| | | | | | | | | | | | | | | Adds 0-3 textureGather component selection and non-constant offsets Caveat: 0 and 1 texture swizzles only work if textureGather component select is 3 or a component that does not exist in the sampler texture format. This is a hardware limitation, any other value returns 128/255=0.501961 for both 0 and 1. Passes all textureGather piglit tests on radeon 6670, except for those using 0/1 texture swizzles due to aforementioned reason. Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
* mesa: Add missing atomic buffer bindings and unbindingsAditya Atluri2014-08-011-0/+31
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffersMichel Dänzer2014-08-011-4/+11
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* r600g/radeonsi: Reduce or even drop special treatment of persistent mappingsMichel Dänzer2014-08-011-4/+8
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* target-helpers: Do not build kms_dri on libdrm-less platforms.Jon TURNEY2014-08-012-0/+3
| | | | | | | | Fix build since 3b176c441b7ddc5f7d2f891da3f76cf3c1814ce1 for dri_platform=none hosts. Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
* r600g: gpu_shader5 gl_SampleMaskIn supportGlenn Kennard2014-07-313-8/+41
| | | | | | | | Map TGSI_SEMANTIC_SAMPLEMASK to register/component. Enable face register when sample mask is needed by shader. Requires Evergreen/Cayman Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* r600g: Implement gpu_shader5 integer opsGlenn Kennard2014-07-312-1/+191
| | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* r600g: Add IMUL_HI/UMUL_HI supportGlenn Kennard2014-07-311-6/+6
| | | | | | | Fixes fs-imulExtended, fs-imulExtended-only-msb, fs-umulExtended, fs-umulExtended-only-msb piglit tests. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* r600g: Implement GL_ARB_texture_query_lodGlenn Kennard2014-07-314-5/+16
| | | | | | | | Requires Evergreen or later v2 (Andreas): Update relnotes/10.3 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
* gbm: Log at least one dlerror() when we fail to open any drivers.Eric Anholt2014-07-301-0/+1
| | | | | | | | | | | | We don't want to log every single error (such as all the ones where the file wasn't even present in our list of search paths), but if you didn't find any driver, then seeing at least one error is useful (since the common case as a developer is a single DEFAULT_DRIVER_DIR or GBM_DRIVERS_PATH entry). v2: Rebase on swrast changes. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
* gbm: Fix a debug log messageEric Anholt2014-07-301-1/+1
| | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
generated by cgit v1.1 at 2024-12-26 17:15:57 +0000