| Commit message (Collapse) | Author | Age | Files | Lines |
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Malloc likes to reuse old address as soon as possible this would cause the
new vbo buffer to get the same address as the old. So make sure we set it to
NULL when we allocate a new one. This fixes ipers which will fill up a couple
of VBO buffers per frame.
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: incorporate comments by Dr_Jakob]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Just as a reminder for all things currently broken with i915g.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Shouldn't happen and not supported, anyway.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Byte offsets simply don't work with tiled render targets when using
tiling bits. Luckily we can cox the hw into doing the right thing
with the DRAWING_RECT command by disabling the drawing rect offset
for the depth buffer.
Minor fixes by Jakob Bornecrantz.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Tiling is rather fragile in general and results in pure blackness when
unlucky. Hence add a new option to disable tiling.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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libdrm will do this for us, if it's required (i.e. if tiling is
possible).
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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libdrm-intel can refuse to tile buffers for various reasons. For
potentially tiled buffers the stride is therefore only known after
the iws->buffer_create_tiled call. Unconditionally rounding up to whatever
tiling requires wastes space, so rework the code to not use tex->stride
in the layout code.
Luckily only the mimap/face offset calculation uses it which can easily
be solved by storing an (x, y) coordinate pair. Furthermore this will
be usefull later for properly supporting rendering into the different
levels of tiled mipmap textures.
v2: switch to nblocks(x|y): More in line with gallium and better
suited for rendering into mipmap textures.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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v2: Clarify tiling bit calculation as suggested by Chris Wilson.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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This is needed to properly implement tiling flags. And the gem
implemention fo buffer_from_handle already calls get_tiling, so
it's for free.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Wire up a fenced parameter, switch all relocations to _FENCED
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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This way relaxed fencing is handled by libdrm. And buffers _can't_
ever change their tiling.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Different kernels have different restrictions for tiled buffers.
Hence use the libdrm abstraction to calculate the necessary
stride and height alignment requirements.
Not yet used.
v2: Incorporate review comments from Jakob Bornecrantz
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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It's unnecessary. The kernel gem ignores it totally and we can't
run on the old userspace fake bo manager due to lack of dri2.
Also drop the redundant name string from the sw winsys as suggested
by Jakob Bornecrantz
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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This fixes piglit/glsl-vs-main-return and glsl-fs-main-return for the drivers
which don't support RET (i915g, r300g, r600g, svga).
ir_to_mesa does not currently generate subroutines, but it's a matter of time
till it's added. It would then break all the drivers which don't implement
them, so this CAP makes sense.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
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It's intel, so always little endian!
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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More in line with other intel drivers.
Change to use enum by Jakob Bornecrantz.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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It looks like this was meant to facilitate unfenced access to textures/
color/renderbuffers. It's totally incomplete and fundamentally broken
on a few levels:
- broken: The kernel needs to about every tiled bo to fix up bit17
swizzling on swap-in.
- unflexible: fenced/unfenced relocs from execbuffer2 do the same, much
simpler.
- unneeded: with relaxed fencing tiled gem bos are as memory-efficient
as this trick.
Hence kill it.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Use scons target and dependency system instead of ad-hoc options.
Now is simply a matter of naming what to build. For example:
scons libgl-xlib
scons libgl-gdi
scons graw-progs
scons llvmpipe
and so on. And there is also the possibility of scepcified subdirs, e.g.
scons src/gallium/drivers
If nothing is specified then everything will be build.
There might be some rough corners over the next days. Please bare with me.
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Remove duplicated include.
Signed-off-by: Brian Paul <brianp@vmware.com>
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Fixes the following GCC warning.
i915_screen.c: In function 'i915_get_shader_param':
i915_screen.c:184: warning: control reaches end of non-void function
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Fixes the following GCC warning.
i915_screen.c: In function 'i915_get_shader_param':
i915_screen.c:147: warning: implicit declaration of function 'draw_get_shader_param'
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Changes in v3:
- Also change trace, which I forgot about
Changes in v2:
- No longer adds tessellation shaders
Currently each shader cap has FS and VS versions.
However, we want a version of them for geometry, tessellation control,
and tessellation evaluation shaders, and want to be able to easily
query a given cap type for a given shader stage.
Since having 5 duplicates of each shader cap is unmanageable, add
a new get_shader_param function that takes both a shader cap from a
new enum and a shader stage.
Drivers with non-unified shaders will first switch on the shader
and, within each case, switch on the cap.
Drivers with unified shaders instead first check whether the shader
is supported, and then switch on the cap.
MAX_CONST_BUFFERS is now per-stage.
The geometry shader cap is removed in favor of checking whether the
limit of geometry shader instructions is greater than 0, which is also
used for tessellation shaders.
WARNING: all drivers changed and compiled but only nvfx tested
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Update all drivers to use draw_set_index_buffer,
draw_set_mapped_index_buffer, and draw_vbo. Remove
draw_set_mapped_element_buffer and draw_set_mapped_element_buffer_range.
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Searched for them with:
git grep -E '[!=]=.*PIPE_TEXTURE_2D|PIPE_TEXTURE_2D.*[!=]=|case.*PIPE_TEXTURE_2D'
Behavior hasn't been changed.
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This fixes fdo bug #29286.
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That is, remove pipe_context::draw_arrays, pipe_context::draw_elements,
pipe_context::draw_arrays_instanced,
pipe_context::draw_elements_instanced,
pipe_context::draw_range_elements.
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Some drivers define a generic function that is called by all drawing
functions. To implement draw_vbo for such drivers, either draw_vbo
calls the generic function or the prototype of the generic function is
changed to match draw_vbo.
Other drivers have no such generic function. draw_vbo is implemented by
calling either draw_arrays and draw_elements.
For most drivers, set_index_buffer does not mark the state dirty for
tracking. Instead, the index buffer state is emitted whenever draw_vbo
is called, just like the case with draw_elements. It surely can be
improved.
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Conflicts:
src/gallium/state_trackers/egl/x11/native_dri2.c
src/gallium/state_trackers/egl/x11/native_x11.c
src/gallium/state_trackers/egl/x11/native_x11.h
src/gallium/state_trackers/xorg/xorg_driver.c
src/gallium/winsys/radeon/drm/radeon_drm.c
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