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* swr: [rasterizer core/sim] 8x2 backend + 16-wide tile clear/load/storeTim Rowley2016-10-133-86/+314
| | | | | | | | | Work in progress (disabled). USE_8x2_TILE_BACKEND define in knobs.h enables AVX512 code paths (emulated on non-AVX512 HW). Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer common] fix assert indexEric Engestrom2016-10-131-1/+1
| | | | | | | | Fixes: b3bd8bb611bb465d2e5e ("swr: [rasterizer core] add support for "RAW" surface format") CovID: 1373647 Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer] eliminate unused label warnings on gccTim Rowley2016-10-111-0/+6
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer core] update/add formatsTim Rowley2016-10-112-1278/+1979
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer core] add support for "RAW" surface formatTim Rowley2016-10-112-0/+29
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer core] align Macrotile FIFO memory to SIMD sizeTim Rowley2016-10-111-0/+1
| | | | | | | | | Align and use streaming store instructions for BE fifo queues. Provides slightly faster enqueue and doesn't pollute the caches. Add appropriate memory fences to ensure streaming writes are globally visible. Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer common] remove threadviz codeTim Rowley2016-10-112-87/+0
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer common] os.h portability header changesTim Rowley2016-10-031-0/+6
| | | | | | | - Fix conflict between windows MemoryFence and llvm::sys::MemoryFence - Declare gettid() Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer common] reorder SWR_FORMAT_INFOTim Rowley2016-08-172-825/+1433
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer] implementing native AVX-512 simd16 intrinsicsTim Rowley2016-08-171-83/+257
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer common] add linux definition for InterlockedAdd64Tim Rowley2016-08-101-0/+2
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer common] make disabled asserts always print (but not break)Tim Rowley2016-08-101-5/+3
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer core] introduce simd16intrin.hTim Rowley2016-07-202-5/+728
| | | | | | | | | Refactoring to leave existing simd_* intrinsics in "simdintrin.h" unchanged, adding corresponding simd16_* intrinsics in "simd16intrin.h" on the side, with emulation, that we can use piecemeal, rather than the all-or-nothing approach to bring up avx512. Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer common] icc declspec definitionsTim Rowley2016-07-201-1/+17
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer core] avx512 simd utility workTim Rowley2016-07-201-0/+644
| | | | | | Enabling KNOB_SIMD_WIDTH = 16 for AVX512 pre-work and low level simd utils Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer] buckets cleanupTim Rowley2016-07-123-10/+41
| | | | Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer] add support for building avx512 versionTim Rowley2016-06-231-2/+2
| | | | | | | Currently, most code paths between AVX2 and AVX512 are identical (see changes to knobs.h). Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer common] fix include for Intel compilerTim Rowley2016-06-231-1/+1
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer common] workaround clang for windows __cpuid() bugTim Rowley2016-06-231-5/+9
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] Do not define _mm256_storeu2_m128i with icc.Vinson Lee2016-05-281-1/+1
| | | | | | | | | | | | | | | | Fix build error with icc. CXX libswrAVX_la-swr_clear.lo icpc: command line warning #10006: ignoring unknown option '-Wdelete-non-virtual-dtor' In file included from ./rasterizer/jitter/jit_api.h(31), from swr_context.h(30), from swr_clear.cpp(24): ./rasterizer/common/os.h(135): error: expected an identifier void _mm256_storeu2_m128i(__m128i *hi, __m128i *lo, __m256i a) ^ Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
* swr: [rasterizer] remove containers.hppTim Rowley2016-05-241-208/+0
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer core] buckets fixesTim Rowley2016-05-242-1/+13
| | | | | | | | | | | | | | | 1. Don't clear bucket descriptions to fix issues with sim level buckets getting out of sync. 2. Close out threadviz file descriptors in ClearThreads(). 3. Skip buckets for jitter based buckets when multithreaded. We need thread local storage through llvm jit functions to be fixed before we can enable this. 4. Fix buckets StopCapture to correctly detect capture complete. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer common] add OSX to unix portability sectionsTim Rowley2016-05-192-2/+9
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] rename _aligned_malloc to AlignedMallocTim Rowley2016-05-191-2/+17
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer common] guard definition of __cdecl/__stdcallTim Rowley2016-05-191-0/+4
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer common] include cstddef for offsetofTim Rowley2016-05-191-0/+1
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer common] portable threadviz bucketsTim Rowley2016-05-191-2/+11
| | | | | | Output with slashes instead of backslashes for unix/linux. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer common] foreground win32 assert dialogTim Rowley2016-05-191-1/+1
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] Add SWR_ASSUME / SWR_ASSUME_ASSERT macrosTim Rowley2016-05-051-5/+45
| | | | | | Fix static code analysis errors found by coverity on Linux Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] Miscellaneous backend changesTim Rowley2016-05-051-0/+20
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] Add support for X24_TYPELESS_G8_UINT formatTim Rowley2016-05-052-7/+19
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer core] Fix threadviz support in bucketsTim Rowley2016-05-052-11/+13
| | | | | | | Need to do lazy eval of the threadviz knob since order of globals is undefined. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] Whitespace cleanup and misc changesTim Rowley2016-05-051-0/+1
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] warning cleanupTim Rowley2016-04-271-9/+8
| | | | Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer core] more backend refactoringTim Rowley2016-04-271-1/+3
| | | | | | | | | BackendPixelRate should be easier to read/maintain now hopefully. Small perf bump by moving some of the pfn's to inline functions without template params. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] Interpolation utility functionsTim Rowley2016-04-221-4/+47
| | | | | | v2: use _mm_cmpunord_ps for vIsNaN Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
* swr: [rasterizer] Ensure correct alignment of stack variables used as vectorsTim Rowley2016-04-121-3/+1
| | | | Acked-by: Brian Paul <brianp@vmware.com>
* swr: [rasterizer common] win32 build fixupsTim Rowley2016-04-121-6/+0
| | | | Acked-by: Brian Paul <brianp@vmware.com>
* swr: [rasterizer core] CachedArena optimizationsTim Rowley2016-03-251-0/+2
| | | | | | Reduce list traversal during Alloc and Free. Add ability to have multiple lists based on alloc size (not used for now)
* swr: [rasterizer common] changes for cygwinTim Rowley2016-03-251-1/+4
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* swr: [rasterizer] code styling and update copyrightsTim Rowley2016-03-253-312/+312
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* swr: [rasterizer] remove use of BYTE typeTim Rowley2016-03-251-10/+1
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* swr: [rasterizer common] add _simd_s[rl]lv_epi32Tim Rowley2016-03-251-0/+115
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* swr: [rasterizer] remove use of UCHAR and UINT64 typesTim Rowley2016-03-253-6/+4
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* swr: [rasterizer] remove use of FLOAT typeTim Rowley2016-03-251-1/+0
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* swr: [rasterizer] Fix Coverity issues reported by Mesa developers.Tim Rowley2016-03-252-137/+137
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* swr: [rasterizer common] remove old unused win32 typesTim Rowley2016-03-251-6/+0
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* swr: [rasterizer jitter] vpermps supportTim Rowley2016-03-251-0/+32
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* swr: [rasterizer] Add rdtsc buckets support for shadersTim Rowley2016-03-252-0/+19
| | | | | | | | | | | Pass pointer to core buckets mgr back to sim layer. Add support for RDTSC_START/RDTSC_STOP macros in the builder. Each unique shader now has a unique bucket associated with it, enabling more detailed reporting at the shader level. Currently due to some llvm issue with thread local storage, 64bit runs require single threaded mode.
* swr: [rasterizer core] backend reorganizationTim Rowley2016-03-251-0/+62
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