summaryrefslogtreecommitdiffstats
path: root/src/gallium/winsys
Commit message (Collapse)AuthorAgeFilesLines
* virgl: fix null pointer exceptionsChih-Wei Huang2016-11-011-0/+2
|
* android: support swrastWuZhen2016-11-012-0/+66
| | | | | | | | | | System boots up with gles_mesa/softpipe/llvmpipe. NO_REF_TASK Tested: local run Change-Id: I629ed0ca9fad12e32270eb8e8bfa9f7681b68474 Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
* winsys/amdgpu: fix radeon_surf::macro_tile_index for imported texturesMarek Olšák2016-10-271-0/+17
| | | | | | | | | | | | | | | | Maybe this is why SDMA has been broken for many amdgpu users? SDMA is the only block which is used with imported textures and relies on this variable. DB also uses it, but it doesn't get imported textures, so it's unaffected. I do get SDMA failures on Tonga before this patch if R600_DEBUG=testdma is changed to use imported textures. Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 6ec3b2a4b1d41b83a4721d06b42c49f55e695cbf)
* radeonsi: implement TC-compatible HTILEMarek Olšák2016-10-131-4/+53
| | | | | | | | | | | | | | | | | | | | | so that decompress blits aren't needed and depth texturing needs less memory bandwidth. Z16 and Z24 are promoted to Z32_FLOAT by the driver, because TC-compatible HTILE only supports Z32_FLOAT. This doubles memory footprint for Z16. The format promotion is not visible to state trackers. This is part of TC-compatible renderbuffer compression, which has 3 parts: DCC, HTILE, FMASK. Only TC-compatible FMASK compression is missing now. I don't see a measurable increase in performance though. (I tested Talos Principle and DiRT: Showdown, the latter is improved by 0.5%, which is almost noise, and it originally used layered Z16, so at least we know that Z16 promoted to Z32F isn't slower now) Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/amdgpu: fix infinite loop w/ RADEON_NOOP=1 caused by unsubmitted fencesMarek Olšák2016-10-121-2/+5
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon/winsyses: set reasonable max_alloc_sizeMarek Olšák2016-10-052-3/+5
| | | | | | | | | | which is returned for GL_MAX_TEXTURE_BUFFER_SIZE. It doesn't have any other use at the moment. Bigger allocations are not rejected. This fixes GL45-CTS.texture_buffer.texture_buffer_max_size on Bonaire. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/radeon: add buffer_get_reloc_offsetNicolai Hähnle2016-10-041-0/+11
| | | | | | | | | | | Really fix the bug that was supposed to be fixed by commits 3e7cced4b and a48bf02d: even when virtual addresses are used, the legacy relocation-based method with offsets relative to the kernel's buffer object are used for video submissions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97969 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/winsys: replace calls to dup(2) with fcntl(F_DUPFD_CLOEXEC)Matt Whitlock2016-10-045-5/+9
| | | | | | | | | | Without this fix, duplicated file descriptors leak into child processes. See commit aaac913e901229d11a1894f6aaf646de6b1a542c for one instance where the same fix was employed. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Matt Whitlock <freedesktop@mattwhitlock.name> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon/winsyses: add radeon_winsys::min_alloc_sizeNicolai Hähnle2016-09-292-0/+6
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/radeon/winsyses: reduce the number of pb_cache bucketsNicolai Hähnle2016-09-272-8/+4
| | | | | | | Small buffers are now handled via the slabs code, so separate buckets in pb_cache have become redundant. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: enable buffer allocation from slabsNicolai Hähnle2016-09-274-2/+209
| | | | | | | Only enable for chips with GPUVM, because older driver paths do not take the required offset into account. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: add fine-grained fences for slab buffersNicolai Hähnle2016-09-275-11/+137
| | | | | | | | | | | | | | | Note the logic for adding fences is somewhat different than for amdgpu, because radeon has no scheduler and we therefore have no guarantee about the order in which submissions from multiple threads are processed. (Ironically, this is only an issue when "multi-threaded submission" is disabled, because "multi-threaded submission" actually means that all submissions happen from a single thread that happens to be separate from the application's threads. If we only supported "multi-threaded submission", the fence handling could be simplified by adding the fences in that thread where everything is serialized.) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: add slab buffer listNicolai Hähnle2016-09-275-12/+107
| | | | | | | Introducing radeon_bo::hash will reduce collisions between "real" buffers and buffers from slabs. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: separate adding a buffer from updating its reloc dataNicolai Hähnle2016-09-271-35/+17
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: add slab entry structures to radeon_boNicolai Hähnle2016-09-272-39/+78
| | | | | | Already adjust the map/unmap logic accordingly. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: enable buffer allocation from slabsNicolai Hähnle2016-09-274-0/+201
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: add fence and buffer list logic for slab allocated buffersNicolai Hähnle2016-09-272-45/+149
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: add slab entry structures to amdgpu_winsys_boNicolai Hähnle2016-09-273-36/+74
| | | | | | Already adjust amdgpu_bo_map/unmap accordingly. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: do not synchronize unsynchronized buffersNicolai Hähnle2016-09-273-45/+118
| | | | | | | | | | | | | | | | | | | | When a buffer is added to a CS without the SYNCHRONIZED usage flag, we now no longer add a dependency on the buffer's fence(s). However, we still need to add a fence to the buffer during flush, so that cache reclaim works correctly (and in the hypothetical case that the buffer is later added to a CS _with_ the SYNCHRONIZED flag). It is now possible that the submissions refererring to a buffer are no longer linearly ordered, and so we may have to keep multiple fences around. We keep the fences in a FIFO. It should usually stay quite short (# of contexts * 2, for gfx + dma rings). While we're at it, extract amdgpu_add_fence_dependency for a single buffer, which will make adding the distinction between real buffer and slab cases easier. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/radeon: add RADEON_FLAG_HANDLENicolai Hähnle2016-09-273-1/+7
| | | | | | | | | | | | | | | | When passed to winsys->buffer_create, this flag will indicate that we require a buffer that maps 1:1 with a kernel buffer handle. This is currently set for all textures, since textures can potentially be exported to other processes. This is not a huge loss, since the main purpose of this patch series is to deal with applications that allocate many small buffers. A hypothetical application with tons of tiny textures might still benefit from not setting this flag, but that's not a use case I'm worried about just now. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* i915g: add dma-buf support to i915_drm_buffer_get_handleNicholas Bishop2016-09-271-0/+6
| | | | | | | | | | | | | | | | The implementation of i915_drm_buffer_get_handle now handles DRM_API_HANDLE_TYPE_FD in the same way that intel_winsys_import_handle does, by calling drm_intel_bo_gem_create_from_prime. Tested by successfully running Chrome's ozone_demo [1] with the ozone-gbm backend on an Intel Pineview M machine. Without this change it fails while trying to create a DMA-BUF. [1] https://chromium.googlesource.com/chromium/src.git/+/master/ui/ozone/demo/ozone_demo.cc Signed-off-by: Nicholas Bishop <nbishop@neverware.com> [Emil Velikov: Fix coding style] Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* gallium: fix return value checkMartina Kollarova2016-09-141-6/+6
| | | | | | | | | A possible error (-1) was being lost because it was first converted to an unsigned int and only then checked. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Martina Kollarova <martina.kollarova@intel.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
* winsys/amdgpu: don't assume GTT if the VRAM flag isn't setMarek Olšák2016-09-131-3/+3
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* android: add support for libmesa_amdgpu_addrlibMauro Rossi2016-09-131-4/+5
| | | | | | | | | | | Android porting of the following commits: f1f1ba3 "radeonsi: move sid.h/r600d_common.h to a common place." 69fca64 "amd/addrlib: move addrlib from amdgpu winsys to common code" This patch fixes android building errors Reviewed-by: Dave Airlie <airlied@redhat.com>
* winsys/radeon: rename nrelocs, crelocs to max_relocs, num_relocsNicolai Hähnle2016-09-122-27/+27
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: don't pre-allocate the relocations arrayNicolai Hähnle2016-09-121-14/+1
| | | | | | It's really not necessary. Switch to an exponential resizing strategy. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: remove unused radeon_cs_context::priority_usageNicolai Hähnle2016-09-121-1/+0
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: remove amdgpu_cs_lookup_bufferNicolai Hähnle2016-09-121-9/+0
| | | | | | | The radeonsi driver doesn't and shouldn't care about the buffer index. Only the virtual addresses matter. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: remove unused field domains from amdgpu_cs_bufferNicolai Hähnle2016-09-122-37/+17
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: remove initial buffer list allocationNicolai Hähnle2016-09-121-20/+0
| | | | | | It's really not necessary. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: extract adding a new buffer list entry into its own functionNicolai Hähnle2016-09-121-43/+70
| | | | | | | While at it, try to be a little more robust in the face of memory allocation failure. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: use only one fence per BONicolai Hähnle2016-09-123-68/+56
| | | | | | | | | | | The fence that is added to the BO during flush is guaranteed to be signaled after all the fences that were in the fences array of the BO before the flush, because those fences are added as dependencies for the submission (and all this happens atomically under the bo_fence_lock). Therefore, keeping only the last fence around is sufficient. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: add do_winsys_deinit functionNicolai Hähnle2016-09-121-2/+7
| | | | | | | The idea is to have matching init/deinit functions so that deinit can be re-used for cleanup in the error path of amdgpu_winsys_create. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: clean up error paths in amdgpu_winsys_createNicolai Hähnle2016-09-121-7/+5
| | | | | | | No need to call pb_cache_deinit, because the cache hasn't been initialized at that point. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/radeon/winsyses: remove #includes of pb_bufmgr.hNicolai Hähnle2016-09-123-3/+0
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: replace OUT_CS with radeon_emitMarek Olšák2016-09-091-14/+12
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/radeon: replace OUT_CS with radeon_emitMarek Olšák2016-09-091-7/+5
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon/winsyses: fix counting mapped memoryMarek Olšák2016-09-072-0/+16
| | | | | | Not all buffers are unmapped explicitly. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* amd/addrlib: move addrlib from amdgpu winsys to common codeDave Airlie2016-09-0623-21944/+3
| | | | | Acked-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: move sid.h/r600d_common.h to a common place.Dave Airlie2016-09-061-1/+1
| | | | | | | | | | Step one to merging radv would be to move some files around. This only adds the include path to r600/radeonsi, because later we want to avoid having to add it to the generic target paths. Acked-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* Introduce .editorconfigEric Engestrom2016-08-314-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | A few weeks ago, Jose Fonseca suggested [0] we use .editorconfig files to try and enforce the formatting of the code, to which Michel Dänzer suggested [1] we start by importing the existing .dir-locals.el settings. The first draft was discussed in the RFC [2]. These .editorconfig are a first step, one that has the advantage of requiring little to no intervention from the devs once the settings files are in place, but the settings are very limited. This does have the advantage of applying while the code is being written. This doesn't replace the need for more comprehensive formatting tools such as clang-format & clang-tidy, but those reformat the code after the fact. [0] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121545.html [1] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121639.html [2] https://lists.freedesktop.org/archives/mesa-dev/2016-July/123431.html Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* winsys/amdgpu: disable IB chaining on SIMarek Olšák2016-08-261-5/+6
| | | | | Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* winsys/amdgpu: finish up SI addrlib integrationMarek Olšák2016-08-261-5/+25
| | | | Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
* winsys/amdgpu: initial SI supportRonie Salgado2016-08-263-6/+46
| | | | | Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
* gallium/radeon: add a driver query for AMDGPU_INFO_NUM_EVICTIONSMarek Olšák2016-08-262-0/+9
| | | | | | If the kernel driver doesn't support it, it returns 0. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* svga: add guest statistic gathering interfaceCharmaine Lee2016-08-261-0/+20
| | | | | | | | | | | | With this patch, guest statistic gathering interface is added to svga winsys interface that can be used to gather svga driver statistic. The winsys module can then share the statistic info with the VMX host via the mksstats interface. The statistic enums used in the svga driver are defined in svga_stats_count and svga_stats_time in svga_winsys.h Reviewed-by: Brian Paul <brianp@vmware.com>
* gallium: add a pipe_context parameter to resource_get_handleMarek Olšák2016-08-251-1/+1
| | | | | | | | radeonsi needs to do some operations (DCC decompression) for OpenGL-OpenCL interop and this is the only way to make it coherent with the current context. It can optionally be set to NULL. Reviewed-by: Brian Paul <brianp@vmware.com>
* gallium/winsys/kms: Look up the GEM handle after importing a prime FDTomasz Figa2016-08-241-0/+4
| | | | | | | | | | | | | | | | | | | | drmPrimeHandleToFD() will return the same GEM handle every time the same buffer is imported, even from a different prime FD. Since GEM handles are not reference counted, we need to make sure that each GEM handle is referenced only by one display target struct, by looking it up in kms_sw->bo_list first and bumping the refcount of the found dt on hit and falling back to creating a new dt only on miss. v2: Split into separate function. Use helper function for lookup. v3 [Emil Velikov]: Rename kms_sw_displaytarget_{lookup,find_and_ref} (Jordan) Signed-off-by: Tomasz Figa <tfiga@chromium.org> CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> (v2) Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* gallium/winsys/kms: Move display target handle lookup to separate functionTomasz Figa2016-08-241-9/+24
| | | | | | | | | | | | | | | | | As a preparation to use the lookup in more than once place, move the code that looks up given KMS/GEM handle to a separate function. This change should not introduce any functional changes. v2: Split into separate patch. Move lookup code into separate function. v3 [Emil Velikov]: Rename kms_sw_displaytarget_{lookup,find_and_ref} (Jordan) Signed-off-by: Tomasz Figa <tfiga@chromium.org> CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> (v2) Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* gallium/winsys/kms: Fully initialize kms_sw_dt at prime import time (v2)Tomasz Figa2016-08-241-7/+11
| | | | | | | | | | | | | | | Currently kms_sw_displaytarget_add_from_prime() allocates the struct and fills in only some of the fields, resulting in a half-baked struct that needs to be further completed by the caller. To make this a bit more consistent, pass width, height and stride to this function and fill in everything there, so that caller can take the returned struct as is. v2: Split from one big patch into four fixing one thing at a time. Signed-off-by: Tomasz Figa <tfiga@chromium.org> CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
generated by cgit v1.1 at 2024-05-18 10:50:44 +0000