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* genxml/gen9: Change the default of MI_SEMAPHORE_WAIT::RegisterPoleModeJason Ekstrand2016-12-141-1/+1
| | | | | | | | | | | We would really like it to be false as that's what you get on hardware that doesn't have RegisterPoleMode (Sky Lake for example). While we're at it, we change it to a boolean. This fixes dEQP-VK.synchronization.smoke.events on Broxton. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit eb7b51d62ae541ff351b4335c6d2f2e1a3a8bbce)
* intel: genxml: add SAMPLER_BORDER_COLOR_STATE structuresLionel Landwerlin2016-10-181-0/+12
| | | | | Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv/cmd_buffer: Unify flush_compute_state across gensJason Ekstrand2016-10-171-1/+1
| | | | | | | | | With one small genxml change, the two versions were basically identical. The only differences were one #define for HSW+ and a field that is missing on Haswell but exists everywhere else. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
* intel/genxml: Make some PIPE_CONTROL fields booleansJason Ekstrand2016-10-151-5/+2
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/genxml: Make "Predication enable" a booleanJason Ekstrand2016-10-151-1/+1
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/genxml; Make "Use Global GTT a booleanJason Ekstrand2016-10-151-17/+8
| | | | | | | | We also remove the redundant zero defaults since everything without an explicit default gets zeroed automatically. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/genxml: Make "Stencil Buffer Enable" a booleanJason Ekstrand2016-10-151-1/+1
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/genxml: Make a couple of STREAMOUT fields booleansJason Ekstrand2016-10-151-2/+2
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/genxml: Make "Include Vertex Handles" and "Include Primitive ID" booleansJason Ekstrand2016-10-151-3/+3
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/genxml: Make "Single Program Flow" a booleanJason Ekstrand2016-10-151-3/+3
| | | | | | | We also get rid of the "(SPF)" a few places. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/genxml: Add a uint MOCS field to 3DSTATE_STENCIL_BUFFERJason Ekstrand2016-10-141-0/+1
| | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* genxml/gen9: Make 3DSTATE_SBE::AttributeActiveComponentFormat an arrayJason Ekstrand2016-08-191-32/+3
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* genxml: Add a uint MOCS field to VERTEX_BUFFER_STATEJason Ekstrand2016-08-191-0/+1
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* genxml: Make a couple of VERTEX_BUFFER_STATE fields booleanJason Ekstrand2016-08-191-1/+1
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* genxml: Make VERTEX_ELEMENT_STATE::Valid a boolJason Ekstrand2016-08-191-1/+1
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* genxml: Add a uint MOCS field to DEPTH_BUFFER packetsJason Ekstrand2016-08-191-0/+2
| | | | | | | This is easier than dealing with structs all the time Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* genxml: Rename "API Rendering Disable" to "Rendering Disable".Kenneth Graunke2016-07-201-1/+1
| | | | | | | | | | Gen7/7.5 call it "Rendering Disable" while Gen8/9 prefix it with "API". Pick one for consistency, and so we can share code between generations. Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* genxml: Add APIMODE_D3D missing enum values and improve consistency.Kenneth Graunke2016-07-201-1/+2
| | | | | | Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.Kenneth Graunke2016-07-201-3/+3
| | | | | | | | | Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL. Being consistent will let me unify code, and I prefer having the prefix. Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* genxml: Make X/Y Offset field of SURFACE_STATE a uintJason Ekstrand2016-07-151-2/+2
| | | | | | | | | | | THe offset type has special implications that it's intended to be some form of aligned memory address. These assumptions allow it to handle the case where there is some alignment requirement on the offset and the bottom bits are used for other things. However, the offsets in the surface state field are really just unsigned integers. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Chad Versace <chad.versace@intel.com>
* genxml: Make ScratchSpaceBasePointer an address instead of an offsetJason Ekstrand2016-06-221-7/+6
| | | | | | | | While we're here, we also fixup MEDIA_VFE_STATE and rename the field in 3DSTATE_VS on gen6-7.5 to be consistent with the others. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* genxml/gen8,9: Prefix the multisample format enum with MSFMTJason Ekstrand2016-06-221-2/+2
| | | | | | | This is what gen7 does and it's nice to have a prefix Reviewed-by: Chad Versace <chad.versace@intel.com> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* genxml: Make PIPE_CONTROL::CommandStreamerStallEnable a booleanJason Ekstrand2016-05-271-1/+1
| | | | | | | This has been declared as a uint since SNB but it's only one bit. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* genxml: Expand SKL's SurfaceFormat field width for ASTCNanley Chery2016-05-201-2/+1
| | | | | | | | | In the expanded field, only ASTC format enums have the MSB set to 1. Expanding the field width makes the process of handling these formats identical to the way other formats are handled. Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* genxml: Add L3 Cache Control register definitionsJordan Justen2016-03-241-0/+8
| | | | | | Based on intel_reg.h (5912da45a69923afa1b7f2eb5bb371d848813c41) Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
* genxml: Make the border color pointer consistent across gensJason Ekstrand2016-03-011-1/+1
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* genxml: Add MOCS fields to RENDER_SURFACE_STATEJason Ekstrand2016-02-271-0/+1
| | | | This allows us to set MOCS as a single uint32_t on all platforms.
* vulkan: Move XML and generator into src/intel/genxmlJason Ekstrand2016-02-181-0/+3469
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