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path: root/src/intel/vulkan/gen8_pipeline.c
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* anv: move to using vk_alloc helpers.Dave Airlie2016-10-191-2/+2
| | | | | | | This moves all the alloc/free in anv to the generic helpers. Acked-by: Jason Ekstrand <jason@jlekstrand.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
* anv: Get rid of graphics_pipeline_create_info_extraJason Ekstrand2016-10-141-9/+7
| | | | | | | | | Now that we no longer have meta, all pipelines get created via the normal Vulkan pipeline creation mechanics. There is no more need for this bit of extra magic data that we've been passing around. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* anv/gen8_pipeline: Add an assert to ensure use_alt_mode is not set in prog_dataAnuj Phogat2016-10-041-0/+1
| | | | Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
* anv/gen8_pipeline: Fix typo in semicolonAnuj Phogat2016-10-041-1/+1
| | | | | | Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv: get rid of duplicated values from gen_device_infoLionel Landwerlin2016-09-231-3/+4
| | | | | Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv: device: calculate compute thread numbers using subslices numbersLionel Landwerlin2016-09-211-2/+4
| | | | | Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv/pipeline: Move emit_ms_state() to genX_pipeline_util.hAnuj Phogat2016-08-091-40/+0
| | | | | | | This will help sharing multisample state setting code. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv/pipeline/gen7: Set multisample modesLionel Landwerlin2016-08-081-1/+1
| | | | | | | | | | | | | | | | | Fixes the following failures : dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit Tested on IVB/HSW Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv/pipeline/gen7: Set the depth format in 3DSTATE_SFJason Ekstrand2016-08-081-1/+2
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv/pipeline: Unify 3DSTATE_RASTER and 3DSTATE_SF setup between gen7 and gen8Jason Ekstrand2016-08-081-49/+0
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv/pipeline/gen8: Set 3DSTATE_SF::StatisticsEnableJason Ekstrand2016-08-081-0/+1
| | | | | | | | | We've been setting it in gen7 forever but never in gen8; best to make it consistent. This hasn't caused any problems yet because we don't advertise support for statistics queries yet. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv/pipeline/gen8: Unconditionally set DXMultisampleRasterizaitonEnableJason Ekstrand2016-08-081-9/+2
| | | | | | | | | | | | | | | | | | The multisample rasterization mode is computed based on this field, 3DSTATE_RASTER::DXMultisampleRasterizationMode (only for forced multisampling), 3DSTATE_RASTER::APIMode, and the number of samples. There are two tables in the SKL PRM that describe how the final multisample mode is calculated: "Windower (WM) Stage >> Multisampling >> Multisample ModeState >> Table 1" and the formula for "SF_INT::Multisample Rasterization Mode". The "DX Multisample Rasterization Enable" bit changes whether multisample mode is set to OFF_PIXEL or ON_PATTERN in the samples > 1 case. In the samples == 1 case, the bit has no effect. Since Vulkan has no concept of disabling multisampling for samples > 1, we can just set the bit. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv/pipeline/gen8: Use fewer designated initializers in emit_rs_stateJason Ekstrand2016-08-081-26/+27
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv/pipeline/gen8: Remove an old commentJason Ekstrand2016-08-081-2/+0
| | | | | | | This is now handled in emit_3dstate_clip Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv: Perform rasterizer discard in the SOL stage instead of the clipper.Kenneth Graunke2016-07-301-0/+1
| | | | | | | | | See commit b0629e6894513a2c49a018bc3342a4e55435a236, where we discovered that the SOL stage's "Rendering Disable" feature is a lot faster at throwing away all geometry than the clipper's "reject all" mode. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv: Enable per sample shading on gen8+Anuj Phogat2016-07-281-3/+0
| | | | | | | | | | | | | Vulkan CTS test results on gen9: ./deqp-vk --deqp-case=dEQP-VK.pipeline.multisample.min_sample_shading* Test run totals: Passed: 60/90 (66.7%) Failed: 0/90 (0.0%) Not supported: 30/90 (33.3%) Warnings: 0/90 (0.0%) Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv/pipeline: Fix setting per sample shading in pixel shaderAnuj Phogat2016-07-281-4/+1
| | | | | | | | | | | | We should use the persample_dispatch variable in prog_data. Fixes all (~60) the DEQP sample shading tests. Many tests exited with VK_ERROR_OUT_OF_DEVICE_MEMORY without this patch. V2: Use the shader key bits set in brw_compile_fs (Jason) Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv: Unify 3DSTATE_CLIP code across generations.Kenneth Graunke2016-07-201-22/+3
| | | | | | | | | | The bulk of this is the same. There are just a couple fields that only exist on one generation or another, and we can easily handle those with an #ifdef. Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* genxml: Add APIMODE_D3D missing enum values and improve consistency.Kenneth Graunke2016-07-201-1/+1
| | | | | | Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.Kenneth Graunke2016-07-201-1/+1
| | | | | | | | | Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL. Being consistent will let me unify code, and I prefer having the prefix. Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* anv/pipeline: Unify blend state setup between gen7 and gen8Jason Ekstrand2016-07-151-117/+0
| | | | | | | | | This fixes all 674 broken dEQP-VK.pipeline.blend Vulkan CTS tests on Haswell. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* anv: Use different BOs for different scratch sizes and stagesJason Ekstrand2016-06-221-6/+12
| | | | | | | | | This solves a race condition where we can end up having different stages stomp on each other because they're all trying to scratch in the same BO but they have different views of its layout. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* genxml: Make ScratchSpaceBasePointer an address instead of an offsetJason Ekstrand2016-06-221-3/+12
| | | | | | | | While we're here, we also fixup MEDIA_VFE_STATE and rename the field in 3DSTATE_VS on gen6-7.5 to be consistent with the others. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* anv: Add proper support for depth clampingJason Ekstrand2016-06-201-3/+3
| | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* anv/pipeline: Store the (set, binding, index) tripple in the bind mapJason Ekstrand2016-06-101-2/+3
| | | | | | | | | | | This way the the bind map (which we're caching) is mostly independent of the pipeline layout. The only coupling remaining is that we pull the array size of a binding out of the layout. However, that size is also specified in the shader and should always match so it's not really coupled. This rendering issues in Dota 2. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* anv/pipeline: Add support for early depth stencilJason Ekstrand2016-06-031-1/+8
| | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* anv/pipeline: Silently pass tests if depth or stencil is missingJason Ekstrand2016-06-031-1/+3
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* anv/pipeline: Unify gen7/8 emit_ds_stateJason Ekstrand2016-06-031-49/+0
| | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
* i965/fs: Organize prog_data by ksp number rather than SIMD widthJason Ekstrand2016-05-141-5/+7
| | | | | | | | | | The hardware packets organize kernel pointers and GRF start by slots that don't map directly to dispatch width. This means that all of the state setup code has to re-arrange the data from prog_data into these slots. This logic has been duplicated 4 times in the GL driver and one more time in the Vulkan driver. Let's just put it all in brw_fs.cpp. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* anv: s/anv_batch_emit_blk/anv_batch_emit/Jason Ekstrand2016-04-201-16/+15
| | | | Acked-by: Kristian Høgsberg <krh@bitplanet.net>
* anv/gen8_pipeline: Use the new emit macroJason Ekstrand2016-04-201-177/+191
| | | | Acked-by: Kristian Høgsberg <krh@bitplanet.net>
* anv: Replace ::disable_scissor with ::use_rectlistsNanley Chery2016-04-131-1/+1
| | | | | | | | | Meta currently uses screenspace RECTLIST primitives that lie within the framebuffer rectangle. Since this behavior shouldn't change in the future, disable the scissor operation whenever rectlists are used. Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
* gen{7,8}_pipeline: Always set ViewportXYClipTestEnableNanley Chery2016-04-131-1/+1
| | | | | | | | | | | For the following reasons, there is no behavioural change with this commit: the ViewportXYClipTest function of the CLIP stage will continue to be enabled outside of Meta (where disable_viewport is always false), and the CLIP stage is turned off within Meta, so this function will continue to be disabled in that case. Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
* gen{7,8}_pipeline: Apply 3DPRIM_RECTLIST restrictionsNanley Chery2016-04-131-2/+2
| | | | | | | | | | | | | | | | | | | | | According to 3D Primitives Overview in the Bspec, when the RECTLIST primitive is in use, the CLIP stage should be disabled or set to have a different Clip Mode, and Viewport Mapping must be disabled: Clipping: Must not require clipping or rely on the CLIP unit’s ClipTest logic to determine if clipping is required. Either the CLIP unit should be DISABLED, or the CLIP unit’s Clip Mode should be set to a value other than CLIPMODE_NORMAL. Viewport Mapping must be DISABLED (as is typical with the use of screen-space coordinates). We swap out ::disable_viewport for ::use_rectlist, because we currently always use the RECTLIST primitive when we disable viewport mapping, and we'll likely continue to use this primitive. Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
* anv/pipeline: Unconditionally emit PS_BLEND on gen8+Jason Ekstrand2016-03-081-18/+14
| | | | | | | | Special-casing the PS_BLEND packet wasn't really gaining us anything. It's defined to be more-or-less the contents of blend state entry 0 only without the indirection. We can just copy-and-paste the contents. If there are no valid color targets, then blend state 0 will be 0-initialized anyway so it's basically the same as the special case we had before.
* anv: Compact render targetsJason Ekstrand2016-03-081-9/+26
| | | | | | | Previously, we would always emit all of the render targets in the subpass. This commit changes it so that we compact render targets just like we do with other resources. Render targets are represented in the surface map by using a descriptor set index of UINT16_MAX.
* anv/pipeline: Handle null wm_prog_data in 3DSTATE_CLIPJason Ekstrand2016-03-051-2/+2
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* anv: Fix rebase errorKristian Høgsberg Kristensen2016-03-051-2/+2
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* anv: Always use point size from the shaderKristian Høgsberg Kristensen2016-03-051-1/+1
| | | | | | | | | | | | There is no API for setting the point size and the shader is always required to set it. Section 24.4: "If the value written to PointSize is less than or equal to zero, or if no value was written to PointSize, results are undefined." As such, we can just always program PointWidthSource to Vertex. This simplifies anv_pipeline a bit and avoids trouble when we enable the pipeline cache and don't have writes_point_size in the prog_data.
* anv: Store prog data in pipeline cache streamKristian Høgsberg Kristensen2016-03-051-15/+15
| | | | | We have to keep it there for the cache to work, so let's not have an extra copy in struct anv_pipeline too.
* anv/pipeline: Implement the depth compare EQUAL workaround on gen8+Jason Ekstrand2016-03-051-0/+8
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* anv/pipeline: Set StencilBufferWriteEnable from the pipelineJason Ekstrand2016-03-041-0/+1
| | | | | The hardware docs say that StencilBufferWriteEnable should only be set if StencilTestEnable is set. It seems reasonable to set them together.
* anv/pipeline: More competent gen8 clippingJason Ekstrand2016-03-041-0/+14
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* anv/pipeline: Use the right provoking vertex for triangle fansJason Ekstrand2016-03-041-1/+1
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* anv/pipeline: Respect pRasterizationState->depthBiasEnableJason Ekstrand2016-03-041-0/+3
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* anv/pipeline: Pull 3DSTATE_SBE into a shared helperJason Ekstrand2016-03-011-98/+1
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* anv/gen8: Emit the 3DSTATE_PS_BLEND packetJason Ekstrand2016-02-261-0/+23
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* anv: Switch over to the macros in genxmlJason Ekstrand2016-02-201-7/+7
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* Move the intel vulkan driver to src/intel/vulkanJason Ekstrand2016-02-181-0/+573
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