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path: root/src/mesa/drivers/dri/i965/intel_tex_subimage.c
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* i965: Track that the stencil data was updated when using Tex*ImageJordan Justen2016-08-261-2/+5
* i965/tiled_memcopy: Get rid of the direction parameter to get_memcpyJason Ekstrand2016-04-081-2/+1
* meta: Remove the 'allocate_storage' parameter in _mesa_meta_pbo_GetTexSubImage()Anuj Phogat2016-03-021-1/+1
* i965: Add means for limiting color resolvesTopi Pohjolainen2016-02-131-1/+1
* i965: Fix typos in licenseIan Romanick2015-09-101-2/+2
* i965: Remove horizontal bars from file header commentsIan Romanick2015-09-101-5/+2
* i965: Disallow PixelTransfer operations for tiled-memcpy TexImage/ReadPixelsChris Wilson2015-09-041-0/+4
* mesa: Rename _mesa_lookup_enum_by_nr() to _mesa_enum_to_string().Kenneth Graunke2015-07-201-2/+2
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-141-3/+3
* i965: Tell intel_get_memcpy() which direction the memcpy() is going.Matt Turner2015-03-051-1/+2
* i965: Refactor tiled memcpy functions and move them into their own fileSisinty Sasmita Patra2015-01-261-392/+2
* i965/tex_subimage: Use the fast tiled path for rectangle texturesJason Ekstrand2015-01-261-1/+2
* i965/tex_subimage: use meta instead of the blitter for PBO TexSubImageJason Ekstrand2015-01-221-100/+15
* i965: Use safer pointer arithmetic in intel_texsubimage_tiled_memcpy()Chad Versace2014-12-221-3/+4
* mesa: Replace a priori knowledge of gcc attributes with configure tests.Matt Turner2014-09-251-6/+0
* i965: Allow forcing miptree->array_layout = ALL_SLICES_AT_EACH_LODJordan Justen2014-08-151-1/+2
* i965: Accelerate uploads of RGBA and BGRA GL_UNSIGNED_INT_8_8_8_8_REV texturesJason Ekstrand2014-07-231-1/+5
* Add support for RGBA8 and RGBX8 textures in intel_texsubimage_tiled_memcpyJason Ekstrand2014-07-171-0/+11
* i965: Improve debug output in intelTexImage and intelTexSubimageJason Ekstrand2014-07-171-0/+6
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-2/+1
* i965: Use standard SSE intrinsics instead of gcc built-ins.Matt Turner2014-06-171-5/+7
* i965: Drop use of intel_region from miptrees.Eric Anholt2014-05-011-9/+9
* i965: Enable texture upload fast path with MinLevelChris Forbes2014-04-101-1/+1
* i965: Account for MinLevel in texture upload fast pathChris Forbes2014-04-101-2/+4
* i965: Don't try to use fast upload path for nontrivial viewsChris Forbes2014-04-101-0/+4
* i965: Drop BLT TexSubImage Y-tiling restriction on Gen6+.Kenneth Graunke2014-03-211-2/+2
* i965: Use brw_bo_map() in intel_texsubimage_tiled_memcpy().Kenneth Graunke2014-02-031-7/+1
* mesa: Change many Type A MESA_FORMATs to meet naming standardMark Mueller2014-01-271-2/+2
* mesa: Rename 4 color component unsigned byte MESA_FORMATsMark Mueller2014-01-271-2/+2
* mesa: change gl_format to mesa_formatMark Mueller2014-01-271-1/+1
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
* i965: Enhance intel_texsubimage_tiled_memcpy() to support all levelsCourtney Goeltzenleuchter2013-12-301-2/+5
* i965: Add XRGB to intel_texsubimage_tiled_memcpy()Courtney Goeltzenleuchter2013-12-301-1/+2
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-051-5/+5
* i965: Use __attribute__((flatten)) on fast tiled teximage code.Kenneth Graunke2013-11-251-2/+8
* i965: Print more debuginfo in intel_texsubimage_memcpy()Chad Versace2013-10-241-2/+8
* i965: Fix glTexImage when packing alignment != cppChad Versace2013-10-241-2/+11
* i965: extend fast texture uploadFrank Henigman2013-10-101-69/+402
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-2/+1
* i965: Move intel_context::has_llc to brw_context.Kenneth Graunke2013-07-091-2/+1
* i965: Move intel_context::has_swizzling to brw_context.Kenneth Graunke2013-07-091-1/+1
* i965: Move intel_context::perf_debug to brw_context.Kenneth Graunke2013-07-091-1/+1
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-091-1/+1
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-091-6/+8
* i965: Replace #include "intel_context.h" with brw_context.h.Kenneth Graunke2013-07-091-1/+1
* i965: Move the remaining intel code to the i965 directory.Eric Anholt2013-06-261-1/+335
* [965] Move to using shared texture management code.Eric Anholt2007-12-161-0/+1
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