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| author | Steve Block <steveblock@google.com> | 2011-05-25 19:08:45 +0100 |
|---|---|---|
| committer | Steve Block <steveblock@google.com> | 2011-06-08 13:51:31 +0100 |
| commit | 2bde8e466a4451c7319e3a072d118917957d6554 (patch) | |
| tree | 28f4a1b869a513e565c7760d0e6a06e7cf1fe95a /Source/JavaScriptCore/assembler | |
| parent | 6939c99b71d9372d14a0c74a772108052e8c48c8 (diff) | |
| download | external_webkit-2bde8e466a4451c7319e3a072d118917957d6554.zip external_webkit-2bde8e466a4451c7319e3a072d118917957d6554.tar.gz external_webkit-2bde8e466a4451c7319e3a072d118917957d6554.tar.bz2 | |
Merge WebKit at r82507: Initial merge by git
Change-Id: I60ce9d780725b58b45e54165733a8ffee23b683e
Diffstat (limited to 'Source/JavaScriptCore/assembler')
12 files changed, 718 insertions, 430 deletions
diff --git a/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h b/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h index 5ebc572..8e81784 100644 --- a/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h +++ b/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h @@ -145,21 +145,21 @@ public: // Describes an memory operand given by a pointer. For regular load & store // operations an unwrapped void* will be used, rather than using this. struct AbsoluteAddress { - explicit AbsoluteAddress(void* ptr) + explicit AbsoluteAddress(const void* ptr) : m_ptr(ptr) { } - void* m_ptr; + const void* m_ptr; }; - // ImmPtr: + // TrustedImmPtr: // // A pointer sized immediate operand to an instruction - this is wrapped // in a class requiring explicit construction in order to differentiate // from pointers used as absolute addresses to memory operations - struct ImmPtr { - explicit ImmPtr(const void* value) + struct TrustedImmPtr { + explicit TrustedImmPtr(const void* value) : m_value(value) { } @@ -172,14 +172,21 @@ public: const void* m_value; }; - // Imm32: + struct ImmPtr : public TrustedImmPtr { + explicit ImmPtr(const void* value) + : TrustedImmPtr(value) + { + } + }; + + // TrustedImm32: // // A 32bit immediate operand to an instruction - this is wrapped in a // class requiring explicit construction in order to prevent RegisterIDs // (which are implemented as an enum) from accidentally being passed as // immediate values. - struct Imm32 { - explicit Imm32(int32_t value) + struct TrustedImm32 { + explicit TrustedImm32(int32_t value) : m_value(value) #if CPU(ARM) || CPU(MIPS) , m_isPointer(false) @@ -188,7 +195,7 @@ public: } #if !CPU(X86_64) - explicit Imm32(ImmPtr ptr) + explicit TrustedImm32(TrustedImmPtr ptr) : m_value(ptr.asIntptr()) #if CPU(ARM) || CPU(MIPS) , m_isPointer(true) @@ -211,6 +218,19 @@ public: }; + struct Imm32 : public TrustedImm32 { + explicit Imm32(int32_t value) + : TrustedImm32(value) + { + } +#if !CPU(X86_64) + explicit Imm32(TrustedImmPtr ptr) + : TrustedImm32(ptr) + { + } +#endif + }; + // Section 2: MacroAssembler code buffer handles // // The following types are used to reference items in the code buffer @@ -358,16 +378,18 @@ public: { } - void link(AbstractMacroAssembler<AssemblerType>* masm) + void link(AbstractMacroAssembler<AssemblerType>* masm) const { masm->m_assembler.linkJump(m_jmp, masm->m_assembler.label()); } - void linkTo(Label label, AbstractMacroAssembler<AssemblerType>* masm) + void linkTo(Label label, AbstractMacroAssembler<AssemblerType>* masm) const { masm->m_assembler.linkJump(m_jmp, label.m_label); } + bool isSet() const { return m_jmp.isSet(); } + private: JmpSrc m_jmp; }; diff --git a/Source/JavaScriptCore/assembler/AssemblerBuffer.h b/Source/JavaScriptCore/assembler/AssemblerBuffer.h index 0454a99..a90efc6 100644 --- a/Source/JavaScriptCore/assembler/AssemblerBuffer.h +++ b/Source/JavaScriptCore/assembler/AssemblerBuffer.h @@ -114,6 +114,21 @@ namespace JSC { putIntUnchecked(value); } + template<typename IntegralType> + void putIntegral(IntegralType value) + { + if (m_size > m_capacity - sizeof(IntegralType)) + grow(); + putIntegralUnchecked(value); + } + + template<typename IntegralType> + void putIntegralUnchecked(IntegralType value) + { + *reinterpret_cast_ptr<IntegralType*>(&m_buffer[m_size]) = value; + m_size += sizeof(IntegralType); + } + void* data() const { return m_buffer; diff --git a/Source/JavaScriptCore/assembler/AssemblerBufferWithConstantPool.h b/Source/JavaScriptCore/assembler/AssemblerBufferWithConstantPool.h index 599be14..9a9618f 100644 --- a/Source/JavaScriptCore/assembler/AssemblerBufferWithConstantPool.h +++ b/Source/JavaScriptCore/assembler/AssemblerBufferWithConstantPool.h @@ -188,29 +188,14 @@ public: return AssemblerBuffer::executableCopy(allocator); } - void putIntWithConstantInt(uint32_t insn, uint32_t constant, bool isReusable = false) + void putShortWithConstantInt(uint16_t insn, uint32_t constant, bool isReusable = false) { - if (!m_numConsts) - m_maxDistance = maxPoolSize; - flushIfNoSpaceFor(4, 4); - - m_loadOffsets.append(AssemblerBuffer::size()); - if (isReusable) - for (int i = 0; i < m_numConsts; ++i) { - if (m_mask[i] == ReusableConst && m_pool[i] == constant) { - AssemblerBuffer::putInt(AssemblerType::patchConstantPoolLoad(insn, i)); - correctDeltas(4); - return; - } - } - - m_pool[m_numConsts] = constant; - m_mask[m_numConsts] = static_cast<char>(isReusable ? ReusableConst : UniqueConst); - - AssemblerBuffer::putInt(AssemblerType::patchConstantPoolLoad(insn, m_numConsts)); - ++m_numConsts; + putIntegralWithConstantInt(insn, constant, isReusable); + } - correctDeltas(4, 4); + void putIntWithConstantInt(uint32_t insn, uint32_t constant, bool isReusable = false) + { + putIntegralWithConstantInt(insn, constant, isReusable); } // This flushing mechanism can be called after any unconditional jumps. @@ -248,6 +233,33 @@ private: m_lastConstDelta = constSize; } + template<typename IntegralType> + void putIntegralWithConstantInt(IntegralType insn, uint32_t constant, bool isReusable) + { + if (!m_numConsts) + m_maxDistance = maxPoolSize; + flushIfNoSpaceFor(sizeof(IntegralType), 4); + + m_loadOffsets.append(AssemblerBuffer::size()); + if (isReusable) { + for (int i = 0; i < m_numConsts; ++i) { + if (m_mask[i] == ReusableConst && m_pool[i] == constant) { + putIntegral(static_cast<IntegralType>(AssemblerType::patchConstantPoolLoad(insn, i))); + correctDeltas(sizeof(IntegralType)); + return; + } + } + } + + m_pool[m_numConsts] = constant; + m_mask[m_numConsts] = static_cast<char>(isReusable ? ReusableConst : UniqueConst); + + putIntegral(static_cast<IntegralType>(AssemblerType::patchConstantPoolLoad(insn, m_numConsts))); + ++m_numConsts; + + correctDeltas(sizeof(IntegralType), 4); + } + void flushConstantPool(bool useBarrier = true) { if (m_numConsts == 0) @@ -259,7 +271,7 @@ private: // Callback to protect the constant pool from execution if (useBarrier) - AssemblerBuffer::putInt(AssemblerType::placeConstantPoolBarrier(m_numConsts * sizeof(uint32_t) + alignPool)); + putIntegral(AssemblerType::placeConstantPoolBarrier(m_numConsts * sizeof(uint32_t) + alignPool)); if (alignPool) { if (alignPool & 1) diff --git a/Source/JavaScriptCore/assembler/MacroAssembler.h b/Source/JavaScriptCore/assembler/MacroAssembler.h index fa165de..bb19a98 100644 --- a/Source/JavaScriptCore/assembler/MacroAssembler.h +++ b/Source/JavaScriptCore/assembler/MacroAssembler.h @@ -74,7 +74,7 @@ public: // described in terms of other macro assembly methods. void pop() { - addPtr(Imm32(sizeof(void*)), stackPointerRegister); + addPtr(TrustedImm32(sizeof(void*)), stackPointerRegister); } void peek(RegisterID dest, int index = 0) @@ -87,19 +87,19 @@ public: storePtr(src, Address(stackPointerRegister, (index * sizeof(void*)))); } - void poke(Imm32 value, int index = 0) + void poke(TrustedImm32 value, int index = 0) { store32(value, Address(stackPointerRegister, (index * sizeof(void*)))); } - void poke(ImmPtr imm, int index = 0) + void poke(TrustedImmPtr imm, int index = 0) { storePtr(imm, Address(stackPointerRegister, (index * sizeof(void*)))); } // Backwards banches, these are currently all implemented using existing forwards branch mechanisms. - void branchPtr(Condition cond, RegisterID op1, ImmPtr imm, Label target) + void branchPtr(Condition cond, RegisterID op1, TrustedImmPtr imm, Label target) { branchPtr(cond, op1, imm).linkTo(target, this); } @@ -109,7 +109,7 @@ public: branch32(cond, op1, op2).linkTo(target, this); } - void branch32(Condition cond, RegisterID op1, Imm32 imm, Label target) + void branch32(Condition cond, RegisterID op1, TrustedImm32 imm, Label target) { branch32(cond, op1, imm).linkTo(target, this); } @@ -144,17 +144,17 @@ public: add32(src, dest); } - void addPtr(Imm32 imm, RegisterID srcDest) + void addPtr(TrustedImm32 imm, RegisterID srcDest) { add32(imm, srcDest); } - void addPtr(ImmPtr imm, RegisterID dest) + void addPtr(TrustedImmPtr imm, RegisterID dest) { - add32(Imm32(imm), dest); + add32(TrustedImm32(imm), dest); } - void addPtr(Imm32 imm, RegisterID src, RegisterID dest) + void addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) { add32(imm, src, dest); } @@ -164,7 +164,7 @@ public: and32(src, dest); } - void andPtr(Imm32 imm, RegisterID srcDest) + void andPtr(TrustedImm32 imm, RegisterID srcDest) { and32(imm, srcDest); } @@ -174,12 +174,12 @@ public: or32(src, dest); } - void orPtr(ImmPtr imm, RegisterID dest) + void orPtr(TrustedImmPtr imm, RegisterID dest) { - or32(Imm32(imm), dest); + or32(TrustedImm32(imm), dest); } - void orPtr(Imm32 imm, RegisterID dest) + void orPtr(TrustedImm32 imm, RegisterID dest) { or32(imm, dest); } @@ -189,14 +189,14 @@ public: sub32(src, dest); } - void subPtr(Imm32 imm, RegisterID dest) + void subPtr(TrustedImm32 imm, RegisterID dest) { sub32(imm, dest); } - void subPtr(ImmPtr imm, RegisterID dest) + void subPtr(TrustedImmPtr imm, RegisterID dest) { - sub32(Imm32(imm), dest); + sub32(TrustedImm32(imm), dest); } void xorPtr(RegisterID src, RegisterID dest) @@ -204,7 +204,7 @@ public: xor32(src, dest); } - void xorPtr(Imm32 imm, RegisterID srcDest) + void xorPtr(TrustedImm32 imm, RegisterID srcDest) { xor32(imm, srcDest); } @@ -230,7 +230,7 @@ public: return load32WithAddressOffsetPatch(address, dest); } - void setPtr(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void setPtr(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { set32Compare32(cond, left, right, dest); } @@ -250,14 +250,14 @@ public: store32(src, address); } - void storePtr(ImmPtr imm, ImplicitAddress address) + void storePtr(TrustedImmPtr imm, ImplicitAddress address) { - store32(Imm32(imm), address); + store32(TrustedImm32(imm), address); } - void storePtr(ImmPtr imm, void* address) + void storePtr(TrustedImmPtr imm, void* address) { - store32(Imm32(imm), address); + store32(TrustedImm32(imm), address); } DataLabel32 storePtrWithAddressOffsetPatch(RegisterID src, Address address) @@ -271,9 +271,9 @@ public: return branch32(cond, left, right); } - Jump branchPtr(Condition cond, RegisterID left, ImmPtr right) + Jump branchPtr(Condition cond, RegisterID left, TrustedImmPtr right) { - return branch32(cond, left, Imm32(right)); + return branch32(cond, left, TrustedImm32(right)); } Jump branchPtr(Condition cond, RegisterID left, Address right) @@ -291,14 +291,14 @@ public: return branch32(cond, left, right); } - Jump branchPtr(Condition cond, Address left, ImmPtr right) + Jump branchPtr(Condition cond, Address left, TrustedImmPtr right) { - return branch32(cond, left, Imm32(right)); + return branch32(cond, left, TrustedImm32(right)); } - Jump branchPtr(Condition cond, AbsoluteAddress left, ImmPtr right) + Jump branchPtr(Condition cond, AbsoluteAddress left, TrustedImmPtr right) { - return branch32(cond, left, Imm32(right)); + return branch32(cond, left, TrustedImm32(right)); } Jump branchTestPtr(Condition cond, RegisterID reg, RegisterID mask) @@ -306,17 +306,17 @@ public: return branchTest32(cond, reg, mask); } - Jump branchTestPtr(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) + Jump branchTestPtr(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { return branchTest32(cond, reg, mask); } - Jump branchTestPtr(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTestPtr(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { return branchTest32(cond, address, mask); } - Jump branchTestPtr(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) + Jump branchTestPtr(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1)) { return branchTest32(cond, address, mask); } @@ -327,12 +327,12 @@ public: return branchAdd32(cond, src, dest); } - Jump branchSubPtr(Condition cond, Imm32 imm, RegisterID dest) + Jump branchSubPtr(Condition cond, TrustedImm32 imm, RegisterID dest) { return branchSub32(cond, imm, dest); } using MacroAssemblerBase::branchTest8; - Jump branchTest8(Condition cond, ExtendedAddress address, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1)) { return MacroAssemblerBase::branchTest8(cond, Address(address.base, address.offset), mask); } diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARM.h b/Source/JavaScriptCore/assembler/MacroAssemblerARM.h index 66814b5..80f69bf 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerARM.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerARM.h @@ -86,14 +86,14 @@ public: m_assembler.adds_r(dest, dest, src); } - void add32(Imm32 imm, Address address) + void add32(TrustedImm32 imm, Address address) { load32(address, ARMRegisters::S1); add32(imm, ARMRegisters::S1); store32(ARMRegisters::S1, address); } - void add32(Imm32 imm, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID dest) { m_assembler.adds_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0)); } @@ -109,7 +109,7 @@ public: m_assembler.ands_r(dest, dest, src); } - void and32(Imm32 imm, RegisterID dest) + void and32(TrustedImm32 imm, RegisterID dest) { ARMWord w = m_assembler.getImm(imm.m_value, ARMRegisters::S0, true); if (w & ARMAssembler::OP2_INV_IMM) @@ -127,7 +127,7 @@ public: m_assembler.movs_r(dest, m_assembler.lsl_r(dest, ARMRegisters::S0)); } - void lshift32(Imm32 imm, RegisterID dest) + void lshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.movs_r(dest, m_assembler.lsl(dest, imm.m_value & 0x1f)); } @@ -141,7 +141,7 @@ public: m_assembler.muls_r(dest, dest, src); } - void mul32(Imm32 imm, RegisterID src, RegisterID dest) + void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) { move(imm, ARMRegisters::S0); m_assembler.muls_r(dest, src, ARMRegisters::S0); @@ -162,7 +162,7 @@ public: m_assembler.orrs_r(dest, dest, src); } - void or32(Imm32 imm, RegisterID dest) + void or32(TrustedImm32 imm, RegisterID dest) { m_assembler.orrs_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0)); } @@ -176,7 +176,7 @@ public: m_assembler.movs_r(dest, m_assembler.asr_r(dest, ARMRegisters::S0)); } - void rshift32(Imm32 imm, RegisterID dest) + void rshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.movs_r(dest, m_assembler.asr(dest, imm.m_value & 0x1f)); } @@ -190,7 +190,7 @@ public: m_assembler.movs_r(dest, m_assembler.lsr_r(dest, ARMRegisters::S0)); } - void urshift32(Imm32 imm, RegisterID dest) + void urshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.movs_r(dest, m_assembler.lsr(dest, imm.m_value & 0x1f)); } @@ -200,12 +200,12 @@ public: m_assembler.subs_r(dest, dest, src); } - void sub32(Imm32 imm, RegisterID dest) + void sub32(TrustedImm32 imm, RegisterID dest) { m_assembler.subs_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0)); } - void sub32(Imm32 imm, Address address) + void sub32(TrustedImm32 imm, Address address) { load32(address, ARMRegisters::S1); sub32(imm, ARMRegisters::S1); @@ -223,7 +223,7 @@ public: m_assembler.eors_r(dest, dest, src); } - void xor32(Imm32 imm, RegisterID dest) + void xor32(TrustedImm32 imm, RegisterID dest) { m_assembler.eors_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0)); } @@ -303,7 +303,7 @@ public: m_assembler.baseIndexTransfer32(false, src, address.base, address.index, static_cast<int>(address.scale), address.offset); } - void store32(Imm32 imm, ImplicitAddress address) + void store32(TrustedImm32 imm, ImplicitAddress address) { if (imm.m_isPointer) m_assembler.ldr_un_imm(ARMRegisters::S1, imm.m_value); @@ -318,7 +318,7 @@ public: m_assembler.dtr_u(false, src, ARMRegisters::S0, 0); } - void store32(Imm32 imm, void* address) + void store32(TrustedImm32 imm, void* address) { m_assembler.ldr_un_imm(ARMRegisters::S0, reinterpret_cast<ARMWord>(address)); if (imm.m_isPointer) @@ -344,13 +344,13 @@ public: push(ARMRegisters::S1); } - void push(Imm32 imm) + void push(TrustedImm32 imm) { move(imm, ARMRegisters::S0); push(ARMRegisters::S0); } - void move(Imm32 imm, RegisterID dest) + void move(TrustedImm32 imm, RegisterID dest) { if (imm.m_isPointer) m_assembler.ldr_un_imm(dest, imm.m_value); @@ -363,9 +363,9 @@ public: m_assembler.mov_r(dest, src); } - void move(ImmPtr imm, RegisterID dest) + void move(TrustedImmPtr imm, RegisterID dest) { - move(Imm32(imm), dest); + move(TrustedImm32(imm), dest); } void swap(RegisterID reg1, RegisterID reg2) @@ -387,7 +387,7 @@ public: move(src, dest); } - Jump branch8(Condition cond, Address left, Imm32 right) + Jump branch8(Condition cond, Address left, TrustedImm32 right) { load8(left, ARMRegisters::S1); return branch32(cond, ARMRegisters::S1, right); @@ -399,7 +399,7 @@ public: return Jump(m_assembler.jmp(ARMCondition(cond), useConstantPool)); } - Jump branch32(Condition cond, RegisterID left, Imm32 right, int useConstantPool = 0) + Jump branch32(Condition cond, RegisterID left, TrustedImm32 right, int useConstantPool = 0) { if (right.m_isPointer) { m_assembler.ldr_un_imm(ARMRegisters::S0, right.m_value); @@ -426,19 +426,19 @@ public: return branch32(cond, ARMRegisters::S1, right); } - Jump branch32(Condition cond, Address left, Imm32 right) + Jump branch32(Condition cond, Address left, TrustedImm32 right) { load32(left, ARMRegisters::S1); return branch32(cond, ARMRegisters::S1, right); } - Jump branch32(Condition cond, BaseIndex left, Imm32 right) + Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right) { load32(left, ARMRegisters::S1); return branch32(cond, ARMRegisters::S1, right); } - Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right) + Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right) { load32WithUnalignedHalfWords(left, ARMRegisters::S1); return branch32(cond, ARMRegisters::S1, right); @@ -453,7 +453,7 @@ public: return jump(); } - Jump branch16(Condition cond, BaseIndex left, Imm32 right) + Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right) { load16(left, ARMRegisters::S0); move(right, ARMRegisters::S1); @@ -461,7 +461,7 @@ public: return m_assembler.jmp(ARMCondition(cond)); } - Jump branchTest8(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { load8(address, ARMRegisters::S1); return branchTest32(cond, ARMRegisters::S1, mask); @@ -474,7 +474,7 @@ public: return Jump(m_assembler.jmp(ARMCondition(cond))); } - Jump branchTest32(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { ASSERT((cond == Zero) || (cond == NonZero)); ARMWord w = m_assembler.getImm(mask.m_value, ARMRegisters::S0, true); @@ -485,13 +485,13 @@ public: return Jump(m_assembler.jmp(ARMCondition(cond))); } - Jump branchTest32(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { load32(address, ARMRegisters::S1); return branchTest32(cond, ARMRegisters::S1, mask); } - Jump branchTest32(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1)) { load32(address, ARMRegisters::S1); return branchTest32(cond, ARMRegisters::S1, mask); @@ -519,7 +519,7 @@ public: return Jump(m_assembler.jmp(ARMCondition(cond))); } - Jump branchAdd32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); add32(imm, dest); @@ -548,7 +548,7 @@ public: return Jump(m_assembler.jmp(ARMCondition(cond))); } - Jump branchMul32(Condition cond, Imm32 imm, RegisterID src, RegisterID dest) + Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); if (cond == Overflow) { @@ -568,7 +568,7 @@ public: return Jump(m_assembler.jmp(ARMCondition(cond))); } - Jump branchSub32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); sub32(imm, dest); @@ -628,7 +628,7 @@ public: m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond)); } - void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { m_assembler.cmp_r(left, m_assembler.getImm(right.m_value, ARMRegisters::S0)); m_assembler.mov_r(dest, ARMAssembler::getOp2(0)); @@ -648,13 +648,13 @@ public: set32Compare32(cond, ARMRegisters::S1, right, dest); } - void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { // ARM doesn't have byte registers set32Compare32(cond, left, right, dest); } - void set32Test32(Condition cond, RegisterID reg, Imm32 mask, RegisterID dest) + void set32Test32(Condition cond, RegisterID reg, TrustedImm32 mask, RegisterID dest) { if (mask.m_value == -1) m_assembler.cmp_r(0, reg); @@ -664,24 +664,24 @@ public: m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond)); } - void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { load32(address, ARMRegisters::S1); set32Test32(cond, ARMRegisters::S1, mask, dest); } - void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { load8(address, ARMRegisters::S1); set32Test32(cond, ARMRegisters::S1, mask, dest); } - void add32(Imm32 imm, RegisterID src, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) { m_assembler.add_r(dest, src, m_assembler.getImm(imm.m_value, ARMRegisters::S0)); } - void add32(Imm32 imm, AbsoluteAddress address) + void add32(TrustedImm32 imm, AbsoluteAddress address) { m_assembler.ldr_un_imm(ARMRegisters::S1, reinterpret_cast<ARMWord>(address.m_ptr)); m_assembler.dtr_u(true, ARMRegisters::S1, ARMRegisters::S1, 0); @@ -690,7 +690,7 @@ public: m_assembler.dtr_u(false, ARMRegisters::S1, ARMRegisters::S0, 0); } - void sub32(Imm32 imm, AbsoluteAddress address) + void sub32(TrustedImm32 imm, AbsoluteAddress address) { m_assembler.ldr_un_imm(ARMRegisters::S1, reinterpret_cast<ARMWord>(address.m_ptr)); m_assembler.dtr_u(true, ARMRegisters::S1, ARMRegisters::S1, 0); @@ -699,7 +699,7 @@ public: m_assembler.dtr_u(false, ARMRegisters::S1, ARMRegisters::S0, 0); } - void load32(void* address, RegisterID dest) + void load32(const void* address, RegisterID dest) { m_assembler.ldr_un_imm(ARMRegisters::S0, reinterpret_cast<ARMWord>(address)); m_assembler.dtr_u(true, dest, ARMRegisters::S0, 0); @@ -711,7 +711,7 @@ public: return branch32(cond, ARMRegisters::S1, right); } - Jump branch32(Condition cond, AbsoluteAddress left, Imm32 right) + Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right) { load32(left.m_ptr, ARMRegisters::S1); return branch32(cond, ARMRegisters::S1, right); @@ -748,21 +748,21 @@ public: return Call::fromTailJump(oldJump); } - DataLabelPtr moveWithPatch(ImmPtr initialValue, RegisterID dest) + DataLabelPtr moveWithPatch(TrustedImmPtr initialValue, RegisterID dest) { DataLabelPtr dataLabel(this); m_assembler.ldr_un_imm(dest, reinterpret_cast<ARMWord>(initialValue.m_value)); return dataLabel; } - Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { dataLabel = moveWithPatch(initialRightValue, ARMRegisters::S1); Jump jump = branch32(cond, left, ARMRegisters::S1, true); return jump; } - Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { load32(left, ARMRegisters::S1); dataLabel = moveWithPatch(initialRightValue, ARMRegisters::S0); @@ -770,7 +770,7 @@ public: return jump; } - DataLabelPtr storePtrWithPatch(ImmPtr initialValue, ImplicitAddress address) + DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address) { DataLabelPtr dataLabel = moveWithPatch(initialValue, ARMRegisters::S1); store32(ARMRegisters::S1, address); @@ -779,7 +779,7 @@ public: DataLabelPtr storePtrWithPatch(ImplicitAddress address) { - return storePtrWithPatch(ImmPtr(0), address); + return storePtrWithPatch(TrustedImmPtr(0), address); } // Floating point operators diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h b/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h index 450a34c..84e0a5e 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h @@ -139,7 +139,7 @@ public: // Integer arithmetic operations: // // Operations are typically two operand - operation(source, srcDst) - // For many operations the source may be an Imm32, the srcDst operand + // For many operations the source may be an TrustedImm32, the srcDst operand // may often be a memory location (explictly described using an Address // object). @@ -148,12 +148,12 @@ public: m_assembler.add(dest, dest, src); } - void add32(Imm32 imm, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID dest) { add32(imm, dest, dest); } - void add32(Imm32 imm, RegisterID src, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) { ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value); if (armImm.isValid()) @@ -164,7 +164,7 @@ public: } } - void add32(Imm32 imm, Address address) + void add32(TrustedImm32 imm, Address address) { load32(address, dataTempRegister); @@ -187,7 +187,7 @@ public: add32(dataTempRegister, dest); } - void add32(Imm32 imm, AbsoluteAddress address) + void add32(TrustedImm32 imm, AbsoluteAddress address) { load32(address.m_ptr, dataTempRegister); @@ -209,7 +209,7 @@ public: m_assembler.ARM_and(dest, dest, src); } - void and32(Imm32 imm, RegisterID dest) + void and32(TrustedImm32 imm, RegisterID dest) { ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value); if (armImm.isValid()) @@ -235,7 +235,7 @@ public: m_assembler.lsl(dest, dest, dataTempRegister); } - void lshift32(Imm32 imm, RegisterID dest) + void lshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.lsl(dest, dest, imm.m_value & 0x1f); } @@ -245,7 +245,7 @@ public: m_assembler.smull(dest, dataTempRegister, dest, src); } - void mul32(Imm32 imm, RegisterID src, RegisterID dest) + void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) { move(imm, dataTempRegister); m_assembler.smull(dest, dataTempRegister, src, dataTempRegister); @@ -266,7 +266,7 @@ public: m_assembler.orr(dest, dest, src); } - void or32(Imm32 imm, RegisterID dest) + void or32(TrustedImm32 imm, RegisterID dest) { ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value); if (armImm.isValid()) @@ -287,7 +287,7 @@ public: m_assembler.asr(dest, dest, dataTempRegister); } - void rshift32(Imm32 imm, RegisterID dest) + void rshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.asr(dest, dest, imm.m_value & 0x1f); } @@ -302,7 +302,7 @@ public: m_assembler.lsr(dest, dest, dataTempRegister); } - void urshift32(Imm32 imm, RegisterID dest) + void urshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.lsr(dest, dest, imm.m_value & 0x1f); } @@ -312,7 +312,7 @@ public: m_assembler.sub(dest, dest, src); } - void sub32(Imm32 imm, RegisterID dest) + void sub32(TrustedImm32 imm, RegisterID dest) { ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value); if (armImm.isValid()) @@ -323,7 +323,7 @@ public: } } - void sub32(Imm32 imm, Address address) + void sub32(TrustedImm32 imm, Address address) { load32(address, dataTempRegister); @@ -346,7 +346,7 @@ public: sub32(dataTempRegister, dest); } - void sub32(Imm32 imm, AbsoluteAddress address) + void sub32(TrustedImm32 imm, AbsoluteAddress address) { load32(address.m_ptr, dataTempRegister); @@ -368,7 +368,7 @@ public: m_assembler.eor(dest, dest, src); } - void xor32(Imm32 imm, RegisterID dest) + void xor32(TrustedImm32 imm, RegisterID dest) { ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value); if (armImm.isValid()) @@ -383,7 +383,7 @@ public: // Memory access operations: // // Loads are of the form load(address, destination) and stores of the form - // store(source, address). The source for a store may be an Imm32. Address + // store(source, address). The source for a store may be an TrustedImm32. Address // operand objects to loads and store will be implicitly constructed if a // register is passed. @@ -460,9 +460,9 @@ public: load32(setupArmAddress(address), dest); } - void load32(void* address, RegisterID dest) + void load32(const void* address, RegisterID dest) { - move(ImmPtr(address), addressTempRegister); + move(TrustedImmPtr(address), addressTempRegister); m_assembler.ldr(dest, addressTempRegister, ARMThumbImmediate::makeUInt16(0)); } @@ -473,7 +473,7 @@ public: DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest) { - DataLabel32 label = moveWithPatch(Imm32(address.offset), dataTempRegister); + DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister); load32(ArmAddress(address.base, dataTempRegister), dest); return label; } @@ -489,14 +489,14 @@ public: if (armImm.isValid()) m_assembler.ldrh(dest, address.base, armImm); else { - move(Imm32(address.offset), dataTempRegister); + move(TrustedImm32(address.offset), dataTempRegister); m_assembler.ldrh(dest, address.base, dataTempRegister); } } DataLabel32 store32WithAddressOffsetPatch(RegisterID src, Address address) { - DataLabel32 label = moveWithPatch(Imm32(address.offset), dataTempRegister); + DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister); store32(src, ArmAddress(address.base, dataTempRegister)); return label; } @@ -511,19 +511,19 @@ public: store32(src, setupArmAddress(address)); } - void store32(Imm32 imm, ImplicitAddress address) + void store32(TrustedImm32 imm, ImplicitAddress address) { move(imm, dataTempRegister); store32(dataTempRegister, setupArmAddress(address)); } - void store32(RegisterID src, void* address) + void store32(RegisterID src, const void* address) { - move(ImmPtr(address), addressTempRegister); + move(TrustedImmPtr(address), addressTempRegister); m_assembler.str(src, addressTempRegister, ARMThumbImmediate::makeUInt16(0)); } - void store32(Imm32 imm, void* address) + void store32(TrustedImm32 imm, const void* address) { move(imm, dataTempRegister); store32(dataTempRegister, address); @@ -558,7 +558,7 @@ public: // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2. if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) { - add32(Imm32(offset), base, addressTempRegister); + add32(TrustedImm32(offset), base, addressTempRegister); base = addressTempRegister; offset = 0; } @@ -568,7 +568,7 @@ public: void loadDouble(const void* address, FPRegisterID dest) { - move(ImmPtr(address), addressTempRegister); + move(TrustedImmPtr(address), addressTempRegister); m_assembler.vldr(dest, addressTempRegister, 0); } @@ -579,7 +579,7 @@ public: // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2. if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) { - add32(Imm32(offset), base, addressTempRegister); + add32(TrustedImm32(offset), base, addressTempRegister); base = addressTempRegister; offset = 0; } @@ -748,7 +748,7 @@ public: push(dataTempRegister); } - void push(Imm32 imm) + void push(TrustedImm32 imm) { move(imm, dataTempRegister); push(dataTempRegister); @@ -758,7 +758,7 @@ public: // // Move values in registers. - void move(Imm32 imm, RegisterID dest) + void move(TrustedImm32 imm, RegisterID dest) { uint32_t value = imm.m_value; @@ -784,9 +784,9 @@ public: m_assembler.mov(dest, src); } - void move(ImmPtr imm, RegisterID dest) + void move(TrustedImmPtr imm, RegisterID dest) { - move(Imm32(imm), dest); + move(TrustedImm32(imm), dest); } void swap(RegisterID reg1, RegisterID reg2) @@ -821,7 +821,7 @@ public: // used (representing the names 'below' and 'above'). // // Operands to the comparision are provided in the expected order, e.g. - // jle32(reg1, Imm32(5)) will branch if the value held in reg1, when + // jle32(reg1, TrustedImm32(5)) will branch if the value held in reg1, when // treated as a signed 32bit value, is less than or equal to 5. // // jz and jnz test whether the first operand is equal to zero, and take @@ -829,7 +829,7 @@ public: private: // Should we be using TEQ for equal/not-equal? - void compare32(RegisterID left, Imm32 right) + void compare32(RegisterID left, TrustedImm32 right) { int32_t imm = right.m_value; if (!imm) @@ -841,13 +841,13 @@ private: else if ((armImm = ARMThumbImmediate::makeEncodedImm(-imm)).isValid()) m_assembler.cmn(left, armImm); else { - move(Imm32(imm), dataTempRegister); + move(TrustedImm32(imm), dataTempRegister); m_assembler.cmp(left, dataTempRegister); } } } - void test32(RegisterID reg, Imm32 mask) + void test32(RegisterID reg, TrustedImm32 mask) { int32_t imm = mask.m_value; @@ -871,7 +871,7 @@ public: return Jump(makeBranch(cond)); } - Jump branch32(Condition cond, RegisterID left, Imm32 right) + Jump branch32(Condition cond, RegisterID left, TrustedImm32 right) { compare32(left, right); return Jump(makeBranch(cond)); @@ -889,21 +889,21 @@ public: return branch32(cond, dataTempRegister, right); } - Jump branch32(Condition cond, Address left, Imm32 right) + Jump branch32(Condition cond, Address left, TrustedImm32 right) { // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/ load32(left, addressTempRegister); return branch32(cond, addressTempRegister, right); } - Jump branch32(Condition cond, BaseIndex left, Imm32 right) + Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right) { // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/ load32(left, addressTempRegister); return branch32(cond, addressTempRegister, right); } - Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right) + Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right) { // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/ load32WithUnalignedHalfWords(left, addressTempRegister); @@ -916,7 +916,7 @@ public: return branch32(cond, dataTempRegister, right); } - Jump branch32(Condition cond, AbsoluteAddress left, Imm32 right) + Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right) { // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/ load32(left.m_ptr, addressTempRegister); @@ -931,21 +931,21 @@ public: return branch32(cond, dataTempRegister, addressTempRegister); } - Jump branch16(Condition cond, BaseIndex left, Imm32 right) + Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right) { // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/ load16(left, addressTempRegister); m_assembler.lsl(addressTempRegister, addressTempRegister, 16); - return branch32(cond, addressTempRegister, Imm32(right.m_value << 16)); + return branch32(cond, addressTempRegister, TrustedImm32(right.m_value << 16)); } - Jump branch8(Condition cond, RegisterID left, Imm32 right) + Jump branch8(Condition cond, RegisterID left, TrustedImm32 right) { compare32(left, right); return Jump(makeBranch(cond)); } - Jump branch8(Condition cond, Address left, Imm32 right) + Jump branch8(Condition cond, Address left, TrustedImm32 right) { // use addressTempRegister incase the branch8 we call uses dataTempRegister. :-/ load8(left, addressTempRegister); @@ -959,14 +959,14 @@ public: return Jump(makeBranch(cond)); } - Jump branchTest32(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { ASSERT((cond == Zero) || (cond == NonZero)); test32(reg, mask); return Jump(makeBranch(cond)); } - Jump branchTest32(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { ASSERT((cond == Zero) || (cond == NonZero)); // use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/ @@ -974,7 +974,7 @@ public: return branchTest32(cond, addressTempRegister, mask); } - Jump branchTest32(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1)) { ASSERT((cond == Zero) || (cond == NonZero)); // use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/ @@ -982,14 +982,14 @@ public: return branchTest32(cond, addressTempRegister, mask); } - Jump branchTest8(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { ASSERT((cond == Zero) || (cond == NonZero)); test32(reg, mask); return Jump(makeBranch(cond)); } - Jump branchTest8(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { ASSERT((cond == Zero) || (cond == NonZero)); // use addressTempRegister incase the branchTest8 we call uses dataTempRegister. :-/ @@ -1032,7 +1032,7 @@ public: return Jump(makeBranch(cond)); } - Jump branchAdd32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value); @@ -1053,7 +1053,7 @@ public: return branch32(NotEqual, addressTempRegister, dataTempRegister); } - Jump branchMul32(Condition cond, Imm32 imm, RegisterID src, RegisterID dest) + Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) { ASSERT_UNUSED(cond, cond == Overflow); move(imm, dataTempRegister); @@ -1076,7 +1076,7 @@ public: return Jump(makeBranch(cond)); } - Jump branchSub32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value); @@ -1111,13 +1111,13 @@ public: Call nearCall() { - moveFixedWidthEncoding(Imm32(0), dataTempRegister); + moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister); return Call(m_assembler.blx(dataTempRegister, ARMv7Assembler::JumpFixed), Call::LinkableNear); } Call call() { - moveFixedWidthEncoding(Imm32(0), dataTempRegister); + moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister); return Call(m_assembler.blx(dataTempRegister, ARMv7Assembler::JumpFixed), Call::Linkable); } @@ -1151,7 +1151,7 @@ public: set32Compare32(cond, dataTempRegister, right, dest); } - void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { compare32(left, right); m_assembler.it(armV7Condition(cond), false); @@ -1169,7 +1169,7 @@ public: set32Compare32(cond, left, right, dest); } - void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { set32Compare32(cond, left, right, dest); } @@ -1178,7 +1178,7 @@ public: // The mask should be optional... paerhaps the argument order should be // dest-src, operations always have a dest? ... possibly not true, considering // asm ops like test, or pseudo ops like pop(). - void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { load32(address, dataTempRegister); test32(dataTempRegister, mask); @@ -1187,7 +1187,7 @@ public: m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0)); } - void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { load8(address, dataTempRegister); test32(dataTempRegister, mask); @@ -1196,44 +1196,44 @@ public: m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0)); } - DataLabel32 moveWithPatch(Imm32 imm, RegisterID dst) + DataLabel32 moveWithPatch(TrustedImm32 imm, RegisterID dst) { moveFixedWidthEncoding(imm, dst); return DataLabel32(this); } - DataLabelPtr moveWithPatch(ImmPtr imm, RegisterID dst) + DataLabelPtr moveWithPatch(TrustedImmPtr imm, RegisterID dst) { - moveFixedWidthEncoding(Imm32(imm), dst); + moveFixedWidthEncoding(TrustedImm32(imm), dst); return DataLabelPtr(this); } - Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { dataLabel = moveWithPatch(initialRightValue, dataTempRegister); return branch32(cond, left, dataTempRegister); } - Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { load32(left, addressTempRegister); dataLabel = moveWithPatch(initialRightValue, dataTempRegister); return branch32(cond, addressTempRegister, dataTempRegister); } - DataLabelPtr storePtrWithPatch(ImmPtr initialValue, ImplicitAddress address) + DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address) { DataLabelPtr label = moveWithPatch(initialValue, dataTempRegister); store32(dataTempRegister, address); return label; } - DataLabelPtr storePtrWithPatch(ImplicitAddress address) { return storePtrWithPatch(ImmPtr(0), address); } + DataLabelPtr storePtrWithPatch(ImplicitAddress address) { return storePtrWithPatch(TrustedImmPtr(0), address); } Call tailRecursiveCall() { // Like a normal call, but don't link. - moveFixedWidthEncoding(Imm32(0), dataTempRegister); + moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister); return Call(m_assembler.bx(dataTempRegister, ARMv7Assembler::JumpFixed), Call::Linkable); } @@ -1257,14 +1257,14 @@ protected: ARMv7Assembler::JmpSrc makeJump() { - moveFixedWidthEncoding(Imm32(0), dataTempRegister); + moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister); return m_assembler.bx(dataTempRegister, inUninterruptedSequence() ? ARMv7Assembler::JumpNoConditionFixedSize : ARMv7Assembler::JumpNoCondition); } ARMv7Assembler::JmpSrc makeBranch(ARMv7Assembler::Condition cond) { m_assembler.it(cond, true, true); - moveFixedWidthEncoding(Imm32(0), dataTempRegister); + moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister); return m_assembler.bx(dataTempRegister, inUninterruptedSequence() ? ARMv7Assembler::JumpConditionFixedSize : ARMv7Assembler::JumpCondition, cond); } ARMv7Assembler::JmpSrc makeBranch(Condition cond) { return makeBranch(armV7Condition(cond)); } @@ -1277,7 +1277,7 @@ protected: if (imm.isValid()) m_assembler.add(addressTempRegister, address.base, imm); else { - move(Imm32(address.offset), addressTempRegister); + move(TrustedImm32(address.offset), addressTempRegister); m_assembler.add(addressTempRegister, addressTempRegister, address.base); } @@ -1291,7 +1291,7 @@ protected: if ((address.offset >= -0xff) && (address.offset <= 0xfff)) return ArmAddress(address.base, address.offset); - move(Imm32(address.offset), addressTempRegister); + move(TrustedImm32(address.offset), addressTempRegister); return ArmAddress(address.base, addressTempRegister); } @@ -1300,7 +1300,7 @@ protected: if ((address.offset >= -0xff) && (address.offset <= 0xfff)) return ArmAddress(address.base, address.offset); - move(Imm32(address.offset), addressTempRegister); + move(TrustedImm32(address.offset), addressTempRegister); return ArmAddress(address.base, addressTempRegister); } @@ -1313,14 +1313,14 @@ protected: if (imm.isValid()) m_assembler.add(addressTempRegister, address.base, imm); else { - move(Imm32(address.offset), addressTempRegister); + move(TrustedImm32(address.offset), addressTempRegister); m_assembler.add(addressTempRegister, addressTempRegister, address.base); } return addressTempRegister; } - void moveFixedWidthEncoding(Imm32 imm, RegisterID dst) + void moveFixedWidthEncoding(TrustedImm32 imm, RegisterID dst) { uint32_t value = imm.m_value; m_assembler.movT3(dst, ARMThumbImmediate::makeUInt16(value & 0xffff)); diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerCodeRef.h b/Source/JavaScriptCore/assembler/MacroAssemblerCodeRef.h index 543b0fa..2183b22 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerCodeRef.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerCodeRef.h @@ -65,15 +65,47 @@ public: { } + template<typename returnType> + FunctionPtr(returnType(*value)()) + : m_value((void*)value) + { + ASSERT_VALID_CODE_POINTER(m_value); + } + + template<typename returnType, typename argType1> + FunctionPtr(returnType(*value)(argType1)) + : m_value((void*)value) + { + ASSERT_VALID_CODE_POINTER(m_value); + } + + template<typename returnType, typename argType1, typename argType2> + FunctionPtr(returnType(*value)(argType1, argType2)) + : m_value((void*)value) + { + ASSERT_VALID_CODE_POINTER(m_value); + } + + template<typename returnType, typename argType1, typename argType2, typename argType3> + FunctionPtr(returnType(*value)(argType1, argType2, argType3)) + : m_value((void*)value) + { + ASSERT_VALID_CODE_POINTER(m_value); + } + + template<typename returnType, typename argType1, typename argType2, typename argType3, typename argType4> + FunctionPtr(returnType(*value)(argType1, argType2, argType3, argType4)) + : m_value((void*)value) + { + ASSERT_VALID_CODE_POINTER(m_value); + } + template<typename FunctionType> explicit FunctionPtr(FunctionType* value) -#if COMPILER(RVCT) - // RVTC compiler needs C-style cast as it fails with the following error - // Error: #694: reinterpret_cast cannot cast away const or other type qualifiers - : m_value((void*)(value)) -#else - : m_value(reinterpret_cast<void*>(value)) -#endif + // Using a C-ctyle cast here to avoid compiler error on RVTC: + // Error: #694: reinterpret_cast cannot cast away const or other type qualifiers + // (I guess on RVTC function pointers have a different constness to GCC/MSVC?) + : m_value((void*)value) { ASSERT_VALID_CODE_POINTER(m_value); } diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h index 4697dfc..1bcec38 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h @@ -95,7 +95,7 @@ public: // Integer arithmetic operations: // // Operations are typically two operand - operation(source, srcDst) - // For many operations the source may be an Imm32, the srcDst operand + // For many operations the source may be an TrustedImm32, the srcDst operand // may often be a memory location (explictly described using an Address // object). @@ -104,12 +104,12 @@ public: m_assembler.addu(dest, dest, src); } - void add32(Imm32 imm, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID dest) { add32(imm, dest, dest); } - void add32(Imm32 imm, RegisterID src, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) { if (!imm.m_isPointer && imm.m_value >= -32768 && imm.m_value <= 32767 && !m_fixedWidth) { @@ -127,7 +127,7 @@ public: } } - void add32(Imm32 imm, Address address) + void add32(TrustedImm32 imm, Address address) { if (address.offset >= -32768 && address.offset <= 32767 && !m_fixedWidth) { @@ -207,7 +207,7 @@ public: } } - void add32(Imm32 imm, AbsoluteAddress address) + void add32(TrustedImm32 imm, AbsoluteAddress address) { /* li addrTemp, address @@ -216,7 +216,7 @@ public: addu dataTemp, dataTemp, immTemp sw dataTemp, 0(addrTemp) */ - move(ImmPtr(address.m_ptr), addrTempRegister); + move(TrustedImmPtr(address.m_ptr), addrTempRegister); m_assembler.lw(dataTempRegister, addrTempRegister, 0); if (!imm.m_isPointer && imm.m_value >= -32768 && imm.m_value <= 32767 && !m_fixedWidth) @@ -233,7 +233,7 @@ public: m_assembler.andInsn(dest, dest, src); } - void and32(Imm32 imm, RegisterID dest) + void and32(TrustedImm32 imm, RegisterID dest) { if (!imm.m_isPointer && !imm.m_value && !m_fixedWidth) move(MIPSRegisters::zero, dest); @@ -250,7 +250,7 @@ public: } } - void lshift32(Imm32 imm, RegisterID dest) + void lshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.sll(dest, dest, imm.m_value); } @@ -265,7 +265,7 @@ public: m_assembler.mul(dest, dest, src); } - void mul32(Imm32 imm, RegisterID src, RegisterID dest) + void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) { if (!imm.m_isPointer && !imm.m_value && !m_fixedWidth) move(MIPSRegisters::zero, dest); @@ -296,7 +296,7 @@ public: m_assembler.orInsn(dest, dest, src); } - void or32(Imm32 imm, RegisterID dest) + void or32(TrustedImm32 imm, RegisterID dest) { if (!imm.m_isPointer && !imm.m_value && !m_fixedWidth) return; @@ -320,7 +320,7 @@ public: m_assembler.srav(dest, dest, shiftAmount); } - void rshift32(Imm32 imm, RegisterID dest) + void rshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.sra(dest, dest, imm.m_value); } @@ -330,7 +330,7 @@ public: m_assembler.srlv(dest, dest, shiftAmount); } - void urshift32(Imm32 imm, RegisterID dest) + void urshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.srl(dest, dest, imm.m_value); } @@ -340,7 +340,7 @@ public: m_assembler.subu(dest, dest, src); } - void sub32(Imm32 imm, RegisterID dest) + void sub32(TrustedImm32 imm, RegisterID dest) { if (!imm.m_isPointer && imm.m_value >= -32767 && imm.m_value <= 32768 && !m_fixedWidth) { @@ -358,7 +358,7 @@ public: } } - void sub32(Imm32 imm, Address address) + void sub32(TrustedImm32 imm, Address address) { if (address.offset >= -32768 && address.offset <= 32767 && !m_fixedWidth) { @@ -413,7 +413,7 @@ public: sub32(dataTempRegister, dest); } - void sub32(Imm32 imm, AbsoluteAddress address) + void sub32(TrustedImm32 imm, AbsoluteAddress address) { /* li addrTemp, address @@ -422,7 +422,7 @@ public: subu dataTemp, dataTemp, immTemp sw dataTemp, 0(addrTemp) */ - move(ImmPtr(address.m_ptr), addrTempRegister); + move(TrustedImmPtr(address.m_ptr), addrTempRegister); m_assembler.lw(dataTempRegister, addrTempRegister, 0); if (!imm.m_isPointer && imm.m_value >= -32767 && imm.m_value <= 32768 @@ -441,7 +441,7 @@ public: m_assembler.xorInsn(dest, dest, src); } - void xor32(Imm32 imm, RegisterID dest) + void xor32(TrustedImm32 imm, RegisterID dest) { /* li immTemp, imm @@ -459,7 +459,7 @@ public: // Memory access operations: // // Loads are of the form load(address, destination) and stores of the form - // store(source, address). The source for a store may be an Imm32. Address + // store(source, address). The source for a store may be an TrustedImm32. Address // operand objects to loads and store will be implicitly constructed if a // register is passed. @@ -581,13 +581,13 @@ public: } } - void load32(void* address, RegisterID dest) + void load32(const void* address, RegisterID dest) { /* li addrTemp, address lw dest, 0(addrTemp) */ - move(ImmPtr(address), addrTempRegister); + move(TrustedImmPtr(address), addrTempRegister); m_assembler.lw(dest, addrTempRegister, 0); } @@ -601,7 +601,7 @@ public: lw dest, 0(addrTemp) */ DataLabel32 dataLabel(this); - move(Imm32(address.offset), addrTempRegister); + move(TrustedImm32(address.offset), addrTempRegister); m_assembler.addu(addrTempRegister, addrTempRegister, address.base); m_assembler.lw(dest, addrTempRegister, 0); m_fixedWidth = false; @@ -666,7 +666,7 @@ public: sw src, 0(addrTemp) */ DataLabel32 dataLabel(this); - move(Imm32(address.offset), addrTempRegister); + move(TrustedImm32(address.offset), addrTempRegister); m_assembler.addu(addrTempRegister, addrTempRegister, address.base); m_assembler.sw(src, addrTempRegister, 0); m_fixedWidth = false; @@ -719,7 +719,7 @@ public: } } - void store32(Imm32 imm, ImplicitAddress address) + void store32(TrustedImm32 imm, ImplicitAddress address) { if (address.offset >= -32768 && address.offset <= 32767 && !m_fixedWidth) { @@ -749,17 +749,17 @@ public: } } - void store32(RegisterID src, void* address) + void store32(RegisterID src, const void* address) { /* li addrTemp, address sw src, 0(addrTemp) */ - move(ImmPtr(address), addrTempRegister); + move(TrustedImmPtr(address), addrTempRegister); m_assembler.sw(src, addrTempRegister, 0); } - void store32(Imm32 imm, void* address) + void store32(TrustedImm32 imm, const void* address) { /* li immTemp, imm @@ -767,11 +767,11 @@ public: sw src, 0(addrTemp) */ if (!imm.m_isPointer && !imm.m_value && !m_fixedWidth) { - move(ImmPtr(address), addrTempRegister); + move(TrustedImmPtr(address), addrTempRegister); m_assembler.sw(MIPSRegisters::zero, addrTempRegister, 0); } else { move(imm, immTempRegister); - move(ImmPtr(address), addrTempRegister); + move(TrustedImmPtr(address), addrTempRegister); m_assembler.sw(immTempRegister, addrTempRegister, 0); } } @@ -831,7 +831,7 @@ public: push(dataTempRegister); } - void push(Imm32 imm) + void push(TrustedImm32 imm) { move(imm, immTempRegister); push(immTempRegister); @@ -841,7 +841,7 @@ public: // // Move values in registers. - void move(Imm32 imm, RegisterID dest) + void move(TrustedImm32 imm, RegisterID dest) { if (!imm.m_isPointer && !imm.m_value && !m_fixedWidth) move(MIPSRegisters::zero, dest); @@ -858,9 +858,9 @@ public: m_assembler.move(dest, src); } - void move(ImmPtr imm, RegisterID dest) + void move(TrustedImmPtr imm, RegisterID dest) { - move(Imm32(imm), dest); + move(TrustedImm32(imm), dest); } void swap(RegisterID reg1, RegisterID reg2) @@ -894,13 +894,13 @@ public: // used (representing the names 'below' and 'above'). // // Operands to the comparision are provided in the expected order, e.g. - // jle32(reg1, Imm32(5)) will branch if the value held in reg1, when + // jle32(reg1, TrustedImm32(5)) will branch if the value held in reg1, when // treated as a signed 32bit value, is less than or equal to 5. // // jz and jnz test whether the first operand is equal to zero, and take // an optional second operand of a mask under which to perform the test. - Jump branch8(Condition cond, Address left, Imm32 right) + Jump branch8(Condition cond, Address left, TrustedImm32 right) { // Make sure the immediate value is unsigned 8 bits. ASSERT(!(right.m_value & 0xFFFFFF00)); @@ -985,7 +985,7 @@ public: return Jump(); } - Jump branch32(Condition cond, RegisterID left, Imm32 right) + Jump branch32(Condition cond, RegisterID left, TrustedImm32 right) { move(right, immTempRegister); return branch32(cond, left, immTempRegister); @@ -1003,14 +1003,14 @@ public: return branch32(cond, dataTempRegister, right); } - Jump branch32(Condition cond, Address left, Imm32 right) + Jump branch32(Condition cond, Address left, TrustedImm32 right) { load32(left, dataTempRegister); move(right, immTempRegister); return branch32(cond, dataTempRegister, immTempRegister); } - Jump branch32(Condition cond, BaseIndex left, Imm32 right) + Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right) { load32(left, dataTempRegister); // Be careful that the previous load32() uses immTempRegister. @@ -1019,7 +1019,7 @@ public: return branch32(cond, dataTempRegister, immTempRegister); } - Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right) + Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right) { load32WithUnalignedHalfWords(left, dataTempRegister); // Be careful that the previous load32WithUnalignedHalfWords() @@ -1035,7 +1035,7 @@ public: return branch32(cond, dataTempRegister, right); } - Jump branch32(Condition cond, AbsoluteAddress left, Imm32 right) + Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right) { load32(left.m_ptr, dataTempRegister); move(right, immTempRegister); @@ -1048,7 +1048,7 @@ public: return branch32(cond, dataTempRegister, right); } - Jump branch16(Condition cond, BaseIndex left, Imm32 right) + Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right) { ASSERT(!(right.m_value & 0xFFFF0000)); load16(left, dataTempRegister); @@ -1067,7 +1067,7 @@ public: return branchNotEqual(cmpTempRegister, MIPSRegisters::zero); } - Jump branchTest32(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { ASSERT((cond == Zero) || (cond == NonZero)); if (mask.m_value == -1 && !m_fixedWidth) { @@ -1079,19 +1079,19 @@ public: return branchTest32(cond, reg, immTempRegister); } - Jump branchTest32(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { load32(address, dataTempRegister); return branchTest32(cond, dataTempRegister, mask); } - Jump branchTest32(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1)) { load32(address, dataTempRegister); return branchTest32(cond, dataTempRegister, mask); } - Jump branchTest8(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { load8(address, dataTempRegister); return branchTest32(cond, dataTempRegister, mask); @@ -1174,7 +1174,7 @@ public: return Jump(); } - Jump branchAdd32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest) { move(imm, immTempRegister); return branchAdd32(cond, immTempRegister, dest); @@ -1225,7 +1225,7 @@ public: return Jump(); } - Jump branchMul32(Condition cond, Imm32 imm, RegisterID src, RegisterID dest) + Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) { move(imm, immTempRegister); move(src, dest); @@ -1279,7 +1279,7 @@ public: return Jump(); } - Jump branchSub32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest) { move(imm, immTempRegister); return branchSub32(cond, immTempRegister, dest); @@ -1360,7 +1360,7 @@ public: set32Compare32(cond, left, right, dest); } - void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { move(right, immTempRegister); set32Compare32(cond, left, immTempRegister, dest); @@ -1417,13 +1417,13 @@ public: } } - void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { move(right, immTempRegister); set32Compare32(cond, left, immTempRegister, dest); } - void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { ASSERT((cond == Zero) || (cond == NonZero)); load8(address, dataTempRegister); @@ -1443,7 +1443,7 @@ public: } } - void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { ASSERT((cond == Zero) || (cond == NonZero)); load32(address, dataTempRegister); @@ -1463,7 +1463,7 @@ public: } } - DataLabel32 moveWithPatch(Imm32 imm, RegisterID dest) + DataLabel32 moveWithPatch(TrustedImm32 imm, RegisterID dest) { m_fixedWidth = true; DataLabel32 label(this); @@ -1472,7 +1472,7 @@ public: return label; } - DataLabelPtr moveWithPatch(ImmPtr initialValue, RegisterID dest) + DataLabelPtr moveWithPatch(TrustedImmPtr initialValue, RegisterID dest) { m_fixedWidth = true; DataLabelPtr label(this); @@ -1481,7 +1481,7 @@ public: return label; } - Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { m_fixedWidth = true; dataLabel = moveWithPatch(initialRightValue, immTempRegister); @@ -1490,7 +1490,7 @@ public: return temp; } - Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { m_fixedWidth = true; load32(left, dataTempRegister); @@ -1500,7 +1500,7 @@ public: return temp; } - DataLabelPtr storePtrWithPatch(ImmPtr initialValue, ImplicitAddress address) + DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address) { m_fixedWidth = true; DataLabelPtr dataLabel = moveWithPatch(initialValue, dataTempRegister); @@ -1511,14 +1511,14 @@ public: DataLabelPtr storePtrWithPatch(ImplicitAddress address) { - return storePtrWithPatch(ImmPtr(0), address); + return storePtrWithPatch(TrustedImmPtr(0), address); } Call tailRecursiveCall() { // Like a normal call, but don't update the returned address register m_fixedWidth = true; - move(Imm32(0), MIPSRegisters::t9); + move(TrustedImm32(0), MIPSRegisters::t9); m_assembler.jr(MIPSRegisters::t9); m_assembler.nop(); m_fixedWidth = false; @@ -1540,7 +1540,7 @@ public: lwc1 dest, 0(addrTemp) lwc1 dest+1, 4(addrTemp) */ - move(Imm32(address.offset), addrTempRegister); + move(TrustedImm32(address.offset), addrTempRegister); m_assembler.addu(addrTempRegister, addrTempRegister, address.base); m_assembler.lwc1(dest, addrTempRegister, 0); m_assembler.lwc1(FPRegisterID(dest + 1), addrTempRegister, 4); @@ -1569,7 +1569,7 @@ public: lwc1 dest, 0(addrTemp) lwc1 dest+1, 4(addrTemp) */ - move(ImmPtr(address), addrTempRegister); + move(TrustedImmPtr(address), addrTempRegister); m_assembler.lwc1(dest, addrTempRegister, 0); m_assembler.lwc1(FPRegisterID(dest + 1), addrTempRegister, 4); #else @@ -1577,7 +1577,7 @@ public: li addrTemp, address ldc1 dest, 0(addrTemp) */ - move(ImmPtr(address), addrTempRegister); + move(TrustedImmPtr(address), addrTempRegister); m_assembler.ldc1(dest, addrTempRegister, 0); #endif } @@ -1592,7 +1592,7 @@ public: swc1 dest, 0(addrTemp) swc1 dest+1, 4(addrTemp) */ - move(Imm32(address.offset), addrTempRegister); + move(TrustedImm32(address.offset), addrTempRegister); m_assembler.addu(addrTempRegister, addrTempRegister, address.base); m_assembler.swc1(src, addrTempRegister, 0); m_assembler.swc1(FPRegisterID(src + 1), addrTempRegister, 4); @@ -1779,7 +1779,7 @@ public: { m_assembler.truncwd(fpTempRegister, src); m_assembler.mfc1(dest, fpTempRegister); - return branch32(Equal, dest, Imm32(0x7fffffff)); + return branch32(Equal, dest, TrustedImm32(0x7fffffff)); } // Convert 'src' to an integer, and places the resulting 'dest'. diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86.h index 92da5f0..b180e2b 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerX86.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerX86.h @@ -52,32 +52,32 @@ public: using MacroAssemblerX86Common::loadDouble; using MacroAssemblerX86Common::convertInt32ToDouble; - void add32(Imm32 imm, RegisterID src, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) { m_assembler.leal_mr(imm.m_value, src, dest); } - void add32(Imm32 imm, AbsoluteAddress address) + void add32(TrustedImm32 imm, AbsoluteAddress address) { m_assembler.addl_im(imm.m_value, address.m_ptr); } - void addWithCarry32(Imm32 imm, AbsoluteAddress address) + void addWithCarry32(TrustedImm32 imm, AbsoluteAddress address) { m_assembler.adcl_im(imm.m_value, address.m_ptr); } - void and32(Imm32 imm, AbsoluteAddress address) + void and32(TrustedImm32 imm, AbsoluteAddress address) { m_assembler.andl_im(imm.m_value, address.m_ptr); } - void or32(Imm32 imm, AbsoluteAddress address) + void or32(TrustedImm32 imm, AbsoluteAddress address) { m_assembler.orl_im(imm.m_value, address.m_ptr); } - void sub32(Imm32 imm, AbsoluteAddress address) + void sub32(TrustedImm32 imm, AbsoluteAddress address) { m_assembler.subl_im(imm.m_value, address.m_ptr); } @@ -98,7 +98,7 @@ public: m_assembler.cvtsi2sd_mr(src.m_ptr, dest); } - void store32(Imm32 imm, void* address) + void store32(TrustedImm32 imm, void* address) { m_assembler.movl_i32m(imm.m_value, address); } @@ -114,7 +114,7 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branch32(Condition cond, AbsoluteAddress left, Imm32 right) + Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right) { m_assembler.cmpl_im(right.m_value, left.m_ptr); return Jump(m_assembler.jCC(x86Condition(cond))); @@ -136,27 +136,27 @@ public: } - DataLabelPtr moveWithPatch(ImmPtr initialValue, RegisterID dest) + DataLabelPtr moveWithPatch(TrustedImmPtr initialValue, RegisterID dest) { m_assembler.movl_i32r(initialValue.asIntptr(), dest); return DataLabelPtr(this); } - Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { m_assembler.cmpl_ir_force32(initialRightValue.asIntptr(), left); dataLabel = DataLabelPtr(this); return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { m_assembler.cmpl_im_force32(initialRightValue.asIntptr(), left.offset, left.base); dataLabel = DataLabelPtr(this); return Jump(m_assembler.jCC(x86Condition(cond))); } - DataLabelPtr storePtrWithPatch(ImmPtr initialValue, ImplicitAddress address) + DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address) { m_assembler.movl_i32m(initialValue.asIntptr(), address.offset, address.base); return DataLabelPtr(this); diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h index a02074c..f5829dd 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h @@ -83,7 +83,7 @@ public: // Integer arithmetic operations: // // Operations are typically two operand - operation(source, srcDst) - // For many operations the source may be an Imm32, the srcDst operand + // For many operations the source may be an TrustedImm32, the srcDst operand // may often be a memory location (explictly described using an Address // object). @@ -92,12 +92,12 @@ public: m_assembler.addl_rr(src, dest); } - void add32(Imm32 imm, Address address) + void add32(TrustedImm32 imm, Address address) { m_assembler.addl_im(imm.m_value, address.offset, address.base); } - void add32(Imm32 imm, RegisterID dest) + void add32(TrustedImm32 imm, RegisterID dest) { m_assembler.addl_ir(imm.m_value, dest); } @@ -117,7 +117,7 @@ public: m_assembler.andl_rr(src, dest); } - void and32(Imm32 imm, RegisterID dest) + void and32(TrustedImm32 imm, RegisterID dest) { m_assembler.andl_ir(imm.m_value, dest); } @@ -132,36 +132,64 @@ public: m_assembler.andl_mr(src.offset, src.base, dest); } - void and32(Imm32 imm, Address address) + void and32(TrustedImm32 imm, Address address) { m_assembler.andl_im(imm.m_value, address.offset, address.base); } - void lshift32(Imm32 imm, RegisterID dest) + void and32(RegisterID op1, RegisterID op2, RegisterID dest) { - m_assembler.shll_i8r(imm.m_value, dest); + if (op1 == op2) + zeroExtend32ToPtr(op1, dest); + else if (op1 == dest) + and32(op2, dest); + else { + move(op2, dest); + and32(op1, dest); + } } - + + void and32(TrustedImm32 imm, RegisterID src, RegisterID dest) + { + move(src, dest); + and32(imm, dest); + } + void lshift32(RegisterID shift_amount, RegisterID dest) { - // On x86 we can only shift by ecx; if asked to shift by another register we'll - // need rejig the shift amount into ecx first, and restore the registers afterwards. - if (shift_amount != X86Registers::ecx) { - swap(shift_amount, X86Registers::ecx); + ASSERT(shift_amount != dest); - // E.g. transform "shll %eax, %eax" -> "xchgl %eax, %ecx; shll %ecx, %ecx; xchgl %eax, %ecx" - if (dest == shift_amount) - m_assembler.shll_CLr(X86Registers::ecx); - // E.g. transform "shll %eax, %ecx" -> "xchgl %eax, %ecx; shll %ecx, %eax; xchgl %eax, %ecx" - else if (dest == X86Registers::ecx) - m_assembler.shll_CLr(shift_amount); - // E.g. transform "shll %eax, %ebx" -> "xchgl %eax, %ecx; shll %ecx, %ebx; xchgl %eax, %ecx" - else - m_assembler.shll_CLr(dest); - - swap(shift_amount, X86Registers::ecx); - } else + if (shift_amount == X86Registers::ecx) m_assembler.shll_CLr(dest); + else { + // On x86 we can only shift by ecx; if asked to shift by another register we'll + // need rejig the shift amount into ecx first, and restore the registers afterwards. + // If we dest is ecx, then shift the swapped register! + swap(shift_amount, X86Registers::ecx); + m_assembler.shll_CLr(dest == X86Registers::ecx ? shift_amount : dest); + swap(shift_amount, X86Registers::ecx); + } + } + + void lshift32(RegisterID src, RegisterID shift_amount, RegisterID dest) + { + ASSERT(shift_amount != dest); + + if (src != dest) + move(src, dest); + lshift32(shift_amount, dest); + } + + void lshift32(TrustedImm32 imm, RegisterID dest) + { + m_assembler.shll_i8r(imm.m_value, dest); + } + + void lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) + { + if (src != dest) + move(src, dest); + lshift32(imm, dest); } void mul32(RegisterID src, RegisterID dest) @@ -174,7 +202,7 @@ public: m_assembler.imull_mr(src.offset, src.base, dest); } - void mul32(Imm32 imm, RegisterID src, RegisterID dest) + void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) { m_assembler.imull_i32r(src, imm.m_value, dest); } @@ -204,7 +232,7 @@ public: m_assembler.orl_rr(src, dest); } - void or32(Imm32 imm, RegisterID dest) + void or32(TrustedImm32 imm, RegisterID dest) { m_assembler.orl_ir(imm.m_value, dest); } @@ -219,76 +247,114 @@ public: m_assembler.orl_mr(src.offset, src.base, dest); } - void or32(Imm32 imm, Address address) + void or32(TrustedImm32 imm, Address address) { m_assembler.orl_im(imm.m_value, address.offset, address.base); } + void or32(RegisterID op1, RegisterID op2, RegisterID dest) + { + if (op1 == op2) + zeroExtend32ToPtr(op1, dest); + else if (op1 == dest) + or32(op2, dest); + else { + move(op2, dest); + or32(op1, dest); + } + } + + void or32(TrustedImm32 imm, RegisterID src, RegisterID dest) + { + move(src, dest); + or32(imm, dest); + } + void rshift32(RegisterID shift_amount, RegisterID dest) { - // On x86 we can only shift by ecx; if asked to shift by another register we'll - // need rejig the shift amount into ecx first, and restore the registers afterwards. - if (shift_amount != X86Registers::ecx) { - swap(shift_amount, X86Registers::ecx); + ASSERT(shift_amount != dest); - // E.g. transform "shll %eax, %eax" -> "xchgl %eax, %ecx; shll %ecx, %ecx; xchgl %eax, %ecx" - if (dest == shift_amount) - m_assembler.sarl_CLr(X86Registers::ecx); - // E.g. transform "shll %eax, %ecx" -> "xchgl %eax, %ecx; shll %ecx, %eax; xchgl %eax, %ecx" - else if (dest == X86Registers::ecx) - m_assembler.sarl_CLr(shift_amount); - // E.g. transform "shll %eax, %ebx" -> "xchgl %eax, %ecx; shll %ecx, %ebx; xchgl %eax, %ecx" - else - m_assembler.sarl_CLr(dest); - - swap(shift_amount, X86Registers::ecx); - } else + if (shift_amount == X86Registers::ecx) m_assembler.sarl_CLr(dest); + else { + // On x86 we can only shift by ecx; if asked to shift by another register we'll + // need rejig the shift amount into ecx first, and restore the registers afterwards. + // If we dest is ecx, then shift the swapped register! + swap(shift_amount, X86Registers::ecx); + m_assembler.sarl_CLr(dest == X86Registers::ecx ? shift_amount : dest); + swap(shift_amount, X86Registers::ecx); + } + } + + void rshift32(RegisterID src, RegisterID shift_amount, RegisterID dest) + { + ASSERT(shift_amount != dest); + + if (src != dest) + move(src, dest); + rshift32(shift_amount, dest); } - void rshift32(Imm32 imm, RegisterID dest) + void rshift32(TrustedImm32 imm, RegisterID dest) { m_assembler.sarl_i8r(imm.m_value, dest); } + void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) + { + if (src != dest) + move(src, dest); + rshift32(imm, dest); + } + void urshift32(RegisterID shift_amount, RegisterID dest) { - // On x86 we can only shift by ecx; if asked to shift by another register we'll - // need rejig the shift amount into ecx first, and restore the registers afterwards. - if (shift_amount != X86Registers::ecx) { + ASSERT(shift_amount != dest); + + if (shift_amount == X86Registers::ecx) + m_assembler.shrl_CLr(dest); + else { + // On x86 we can only shift by ecx; if asked to shift by another register we'll + // need rejig the shift amount into ecx first, and restore the registers afterwards. + // If we dest is ecx, then shift the swapped register! swap(shift_amount, X86Registers::ecx); - - // E.g. transform "shrl %eax, %eax" -> "xchgl %eax, %ecx; shrl %ecx, %ecx; xchgl %eax, %ecx" - if (dest == shift_amount) - m_assembler.shrl_CLr(X86Registers::ecx); - // E.g. transform "shrl %eax, %ecx" -> "xchgl %eax, %ecx; shrl %ecx, %eax; xchgl %eax, %ecx" - else if (dest == X86Registers::ecx) - m_assembler.shrl_CLr(shift_amount); - // E.g. transform "shrl %eax, %ebx" -> "xchgl %eax, %ecx; shrl %ecx, %ebx; xchgl %eax, %ecx" - else - m_assembler.shrl_CLr(dest); - + m_assembler.shrl_CLr(dest == X86Registers::ecx ? shift_amount : dest); swap(shift_amount, X86Registers::ecx); - } else - m_assembler.shrl_CLr(dest); + } } - - void urshift32(Imm32 imm, RegisterID dest) + + void urshift32(RegisterID src, RegisterID shift_amount, RegisterID dest) { - m_assembler.shrl_i8r(imm.m_value, dest); + ASSERT(shift_amount != dest); + + if (src != dest) + move(src, dest); + urshift32(shift_amount, dest); } + void urshift32(TrustedImm32 imm, RegisterID dest) + { + m_assembler.shrl_i8r(imm.m_value, dest); + } + + void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) + { + if (src != dest) + move(src, dest); + urshift32(imm, dest); + } + void sub32(RegisterID src, RegisterID dest) { m_assembler.subl_rr(src, dest); } - void sub32(Imm32 imm, RegisterID dest) + void sub32(TrustedImm32 imm, RegisterID dest) { m_assembler.subl_ir(imm.m_value, dest); } - void sub32(Imm32 imm, Address address) + void sub32(TrustedImm32 imm, Address address) { m_assembler.subl_im(imm.m_value, address.offset, address.base); } @@ -309,12 +375,12 @@ public: m_assembler.xorl_rr(src, dest); } - void xor32(Imm32 imm, Address dest) + void xor32(TrustedImm32 imm, Address dest) { m_assembler.xorl_im(imm.m_value, dest.offset, dest.base); } - void xor32(Imm32 imm, RegisterID dest) + void xor32(TrustedImm32 imm, RegisterID dest) { m_assembler.xorl_ir(imm.m_value, dest); } @@ -329,6 +395,24 @@ public: m_assembler.xorl_mr(src.offset, src.base, dest); } + void xor32(RegisterID op1, RegisterID op2, RegisterID dest) + { + if (op1 == op2) + move(TrustedImm32(0), dest); + else if (op1 == dest) + xor32(op2, dest); + else { + move(op2, dest); + xor32(op1, dest); + } + } + + void xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) + { + move(src, dest); + xor32(imm, dest); + } + void sqrtDouble(FPRegisterID src, FPRegisterID dst) { m_assembler.sqrtsd_rr(src, dst); @@ -337,7 +421,7 @@ public: // Memory access operations: // // Loads are of the form load(address, destination) and stores of the form - // store(source, address). The source for a store may be an Imm32. Address + // store(source, address). The source for a store may be an TrustedImm32. Address // operand objects to loads and store will be implicitly constructed if a // register is passed. @@ -388,7 +472,7 @@ public: m_assembler.movl_rm(src, address.offset, address.base, address.index, address.scale); } - void store32(Imm32 imm, ImplicitAddress address) + void store32(TrustedImm32 imm, ImplicitAddress address) { m_assembler.movl_i32m(imm.m_value, address.offset, address.base); } @@ -398,6 +482,13 @@ public: // // Presently only supports SSE, not x87 floating point. + void moveDouble(FPRegisterID src, FPRegisterID dest) + { + ASSERT(isSSE2Present()); + if (src != dest) + m_assembler.movsd_rr(src, dest); + } + void loadDouble(ImplicitAddress address, FPRegisterID dest) { ASSERT(isSSE2Present()); @@ -416,6 +507,17 @@ public: m_assembler.addsd_rr(src, dest); } + void addDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest) + { + ASSERT(isSSE2Present()); + if (op1 == dest) + addDouble(op2, dest); + else { + moveDouble(op2, dest); + addDouble(op1, dest); + } + } + void addDouble(Address src, FPRegisterID dest) { ASSERT(isSSE2Present()); @@ -428,6 +530,15 @@ public: m_assembler.divsd_rr(src, dest); } + void divDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest) + { + // B := A / B is invalid. + ASSERT(op1 == dest || op2 != dest); + + moveDouble(op1, dest); + divDouble(op2, dest); + } + void divDouble(Address src, FPRegisterID dest) { ASSERT(isSSE2Present()); @@ -440,6 +551,15 @@ public: m_assembler.subsd_rr(src, dest); } + void subDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest) + { + // B := A - B is invalid. + ASSERT(op1 == dest || op2 != dest); + + moveDouble(op1, dest); + subDouble(op2, dest); + } + void subDouble(Address src, FPRegisterID dest) { ASSERT(isSSE2Present()); @@ -452,6 +572,17 @@ public: m_assembler.mulsd_rr(src, dest); } + void mulDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest) + { + ASSERT(isSSE2Present()); + if (op1 == dest) + mulDouble(op2, dest); + else { + moveDouble(op2, dest); + mulDouble(op1, dest); + } + } + void mulDouble(Address src, FPRegisterID dest) { ASSERT(isSSE2Present()); @@ -501,11 +632,12 @@ public: // If the result is not representable as a 32 bit value, branch. // May also branch for some values that are representable in 32 bits // (specifically, in this case, INT_MIN). - Jump branchTruncateDoubleToInt32(FPRegisterID src, RegisterID dest) + enum BranchTruncateType { BranchIfTruncateFailed, BranchIfTruncateSuccessful }; + Jump branchTruncateDoubleToInt32(FPRegisterID src, RegisterID dest, BranchTruncateType branchType = BranchIfTruncateFailed) { ASSERT(isSSE2Present()); m_assembler.cvttsd2si_rr(src, dest); - return branch32(Equal, dest, Imm32(0x80000000)); + return branch32(branchType ? NotEqual : Equal, dest, TrustedImm32(0x80000000)); } // Convert 'src' to an integer, and places the resulting 'dest'. @@ -564,7 +696,7 @@ public: m_assembler.push_m(address.offset, address.base); } - void push(Imm32 imm) + void push(TrustedImm32 imm) { m_assembler.push_i32(imm.m_value); } @@ -574,9 +706,9 @@ public: // // Move values in registers. - void move(Imm32 imm, RegisterID dest) + void move(TrustedImm32 imm, RegisterID dest) { - // Note: on 64-bit the Imm32 value is zero extended into the register, it + // Note: on 64-bit the TrustedImm32 value is zero extended into the register, it // may be useful to have a separate version that sign extends the value? if (!imm.m_value) m_assembler.xorl_rr(dest, dest); @@ -593,7 +725,7 @@ public: m_assembler.movq_rr(src, dest); } - void move(ImmPtr imm, RegisterID dest) + void move(TrustedImmPtr imm, RegisterID dest) { m_assembler.movq_i64r(imm.asIntptr(), dest); } @@ -620,7 +752,7 @@ public: m_assembler.movl_rr(src, dest); } - void move(ImmPtr imm, RegisterID dest) + void move(TrustedImmPtr imm, RegisterID dest) { m_assembler.movl_i32r(imm.asIntptr(), dest); } @@ -655,14 +787,14 @@ public: // used (representing the names 'below' and 'above'). // // Operands to the comparision are provided in the expected order, e.g. - // jle32(reg1, Imm32(5)) will branch if the value held in reg1, when + // jle32(reg1, TrustedImm32(5)) will branch if the value held in reg1, when // treated as a signed 32bit value, is less than or equal to 5. // // jz and jnz test whether the first operand is equal to zero, and take // an optional second operand of a mask under which to perform the test. public: - Jump branch8(Condition cond, Address left, Imm32 right) + Jump branch8(Condition cond, Address left, TrustedImm32 right) { m_assembler.cmpb_im(right.m_value, left.offset, left.base); return Jump(m_assembler.jCC(x86Condition(cond))); @@ -674,7 +806,7 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branch32(Condition cond, RegisterID left, Imm32 right) + Jump branch32(Condition cond, RegisterID left, TrustedImm32 right) { if (((cond == Equal) || (cond == NotEqual)) && !right.m_value) m_assembler.testl_rr(left, left); @@ -695,19 +827,19 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branch32(Condition cond, Address left, Imm32 right) + Jump branch32(Condition cond, Address left, TrustedImm32 right) { m_assembler.cmpl_im(right.m_value, left.offset, left.base); return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branch32(Condition cond, BaseIndex left, Imm32 right) + Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right) { m_assembler.cmpl_im(right.m_value, left.offset, left.base, left.index, left.scale); return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right) + Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right) { return branch32(cond, left, right); } @@ -718,7 +850,7 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branch16(Condition cond, BaseIndex left, Imm32 right) + Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right) { ASSERT(!(right.m_value & 0xFFFF0000)); @@ -728,14 +860,14 @@ public: Jump branchTest32(Condition cond, RegisterID reg, RegisterID mask) { - ASSERT((cond == Zero) || (cond == NonZero)); + ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed)); m_assembler.testl_rr(reg, mask); return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTest32(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { - ASSERT((cond == Zero) || (cond == NonZero)); + ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed)); // if we are only interested in the low seven bits, this can be tested with a testb if (mask.m_value == -1) m_assembler.testl_rr(reg, reg); @@ -746,9 +878,9 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTest32(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { - ASSERT((cond == Zero) || (cond == NonZero)); + ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed)); if (mask.m_value == -1) m_assembler.cmpl_im(0, address.offset, address.base); else @@ -756,9 +888,9 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTest32(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) + Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1)) { - ASSERT((cond == Zero) || (cond == NonZero)); + ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed)); if (mask.m_value == -1) m_assembler.cmpl_im(0, address.offset, address.base, address.index, address.scale); else @@ -766,9 +898,23 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTest8(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) + { + // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values. + ASSERT(mask.m_value >= -128 && mask.m_value <= 255); + ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed)); + if (mask.m_value == -1) + m_assembler.testb_rr(reg, reg); + else + m_assembler.testb_i8r(mask.m_value, reg); + return Jump(m_assembler.jCC(x86Condition(cond))); + } + + Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { - ASSERT((cond == Zero) || (cond == NonZero)); + // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values. + ASSERT(mask.m_value >= -128 && mask.m_value <= 255); + ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed)); if (mask.m_value == -1) m_assembler.cmpb_im(0, address.offset, address.base); else @@ -776,9 +922,11 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTest8(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1)) { - ASSERT((cond == Zero) || (cond == NonZero)); + // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values. + ASSERT(mask.m_value >= -128 && mask.m_value <= 255); + ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed)); if (mask.m_value == -1) m_assembler.cmpb_im(0, address.offset, address.base, address.index, address.scale); else @@ -820,14 +968,14 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchAdd32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); add32(imm, dest); return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchAdd32(Condition cond, Imm32 src, Address dest) + Jump branchAdd32(Condition cond, TrustedImm32 src, Address dest) { ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero)); add32(src, dest); @@ -848,6 +996,20 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } + Jump branchAdd32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest) + { + if (src1 == dest) + return branchAdd32(cond, src2, dest); + move(src2, dest); + return branchAdd32(cond, src1, dest); + } + + Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) + { + move(src, dest); + return branchAdd32(cond, imm, dest); + } + Jump branchMul32(Condition cond, RegisterID src, RegisterID dest) { ASSERT(cond == Overflow); @@ -862,13 +1024,21 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchMul32(Condition cond, Imm32 imm, RegisterID src, RegisterID dest) + Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) { ASSERT(cond == Overflow); mul32(imm, src, dest); return Jump(m_assembler.jCC(x86Condition(cond))); } + Jump branchMul32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest) + { + if (src1 == dest) + return branchMul32(cond, src2, dest); + move(src2, dest); + return branchMul32(cond, src1, dest); + } + Jump branchSub32(Condition cond, RegisterID src, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); @@ -876,14 +1046,14 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchSub32(Condition cond, Imm32 imm, RegisterID dest) + Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero)); sub32(imm, dest); return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchSub32(Condition cond, Imm32 imm, Address dest) + Jump branchSub32(Condition cond, TrustedImm32 imm, Address dest) { ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero)); sub32(imm, dest); @@ -904,6 +1074,15 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } + Jump branchSub32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest) + { + // B := A - B is invalid. + ASSERT(src1 == dest || src2 != dest); + + move(src1, dest); + return branchSub32(cond, src2, dest); + } + Jump branchNeg32(Condition cond, RegisterID srcDest) { ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero)); @@ -958,7 +1137,7 @@ public: m_assembler.setCC_r(x86Condition(cond), dest); } - void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { if (((cond == Equal) || (cond == NotEqual)) && !right.m_value) m_assembler.testl_rr(left, left); @@ -974,7 +1153,7 @@ public: m_assembler.movzbl_rr(dest, dest); } - void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { if (((cond == Equal) || (cond == NotEqual)) && !right.m_value) m_assembler.testl_rr(left, left); @@ -989,7 +1168,7 @@ public: // dest-src, operations always have a dest? ... possibly not true, considering // asm ops like test, or pseudo ops like pop(). - void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { if (mask.m_value == -1) m_assembler.cmpb_im(0, address.offset, address.base); @@ -999,7 +1178,7 @@ public: m_assembler.movzbl_rr(dest, dest); } - void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest) + void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest) { if (mask.m_value == -1) m_assembler.cmpl_im(0, address.offset, address.base); diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h index ebbe0bd..bd417aa 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h @@ -48,30 +48,31 @@ public: using MacroAssemblerX86Common::load32; using MacroAssemblerX86Common::store32; using MacroAssemblerX86Common::call; + using MacroAssemblerX86Common::addDouble; using MacroAssemblerX86Common::loadDouble; using MacroAssemblerX86Common::convertInt32ToDouble; - void add32(Imm32 imm, AbsoluteAddress address) + void add32(TrustedImm32 imm, AbsoluteAddress address) { - move(ImmPtr(address.m_ptr), scratchRegister); + move(TrustedImmPtr(address.m_ptr), scratchRegister); add32(imm, Address(scratchRegister)); } - void and32(Imm32 imm, AbsoluteAddress address) + void and32(TrustedImm32 imm, AbsoluteAddress address) { - move(ImmPtr(address.m_ptr), scratchRegister); + move(TrustedImmPtr(address.m_ptr), scratchRegister); and32(imm, Address(scratchRegister)); } - void or32(Imm32 imm, AbsoluteAddress address) + void or32(TrustedImm32 imm, AbsoluteAddress address) { - move(ImmPtr(address.m_ptr), scratchRegister); + move(TrustedImmPtr(address.m_ptr), scratchRegister); or32(imm, Address(scratchRegister)); } - void sub32(Imm32 imm, AbsoluteAddress address) + void sub32(TrustedImm32 imm, AbsoluteAddress address) { - move(ImmPtr(address.m_ptr), scratchRegister); + move(TrustedImmPtr(address.m_ptr), scratchRegister); sub32(imm, Address(scratchRegister)); } @@ -88,17 +89,23 @@ public: void loadDouble(const void* address, FPRegisterID dest) { - move(ImmPtr(address), scratchRegister); + move(TrustedImmPtr(address), scratchRegister); loadDouble(scratchRegister, dest); } - void convertInt32ToDouble(AbsoluteAddress src, FPRegisterID dest) + void addDouble(AbsoluteAddress address, FPRegisterID dest) { - move(Imm32(*static_cast<int32_t*>(src.m_ptr)), scratchRegister); + move(TrustedImmPtr(address.m_ptr), scratchRegister); + m_assembler.addsd_mr(0, scratchRegister, dest); + } + + void convertInt32ToDouble(TrustedImm32 imm, FPRegisterID dest) + { + move(imm, scratchRegister); m_assembler.cvtsi2sd_rr(scratchRegister, dest); } - void store32(Imm32 imm, void* address) + void store32(TrustedImm32 imm, void* address) { move(X86Registers::eax, scratchRegister); move(imm, X86Registers::eax); @@ -108,7 +115,7 @@ public: Call call() { - DataLabelPtr label = moveWithPatch(ImmPtr(0), scratchRegister); + DataLabelPtr label = moveWithPatch(TrustedImmPtr(0), scratchRegister); Call result = Call(m_assembler.call(scratchRegister), Call::Linkable); ASSERT(differenceBetween(label, result) == REPTACH_OFFSET_CALL_R11); return result; @@ -116,7 +123,7 @@ public: Call tailRecursiveCall() { - DataLabelPtr label = moveWithPatch(ImmPtr(0), scratchRegister); + DataLabelPtr label = moveWithPatch(TrustedImmPtr(0), scratchRegister); Jump newJump = Jump(m_assembler.jmp_r(scratchRegister)); ASSERT(differenceBetween(label, newJump) == REPTACH_OFFSET_CALL_R11); return Call::fromTailJump(newJump); @@ -125,7 +132,7 @@ public: Call makeTailRecursiveCall(Jump oldJump) { oldJump.link(this); - DataLabelPtr label = moveWithPatch(ImmPtr(0), scratchRegister); + DataLabelPtr label = moveWithPatch(TrustedImmPtr(0), scratchRegister); Jump newJump = Jump(m_assembler.jmp_r(scratchRegister)); ASSERT(differenceBetween(label, newJump) == REPTACH_OFFSET_CALL_R11); return Call::fromTailJump(newJump); @@ -137,30 +144,30 @@ public: m_assembler.addq_rr(src, dest); } - void addPtr(Imm32 imm, RegisterID srcDest) + void addPtr(TrustedImm32 imm, RegisterID srcDest) { m_assembler.addq_ir(imm.m_value, srcDest); } - void addPtr(ImmPtr imm, RegisterID dest) + void addPtr(TrustedImmPtr imm, RegisterID dest) { move(imm, scratchRegister); m_assembler.addq_rr(scratchRegister, dest); } - void addPtr(Imm32 imm, RegisterID src, RegisterID dest) + void addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) { m_assembler.leaq_mr(imm.m_value, src, dest); } - void addPtr(Imm32 imm, Address address) + void addPtr(TrustedImm32 imm, Address address) { m_assembler.addq_im(imm.m_value, address.offset, address.base); } - void addPtr(Imm32 imm, AbsoluteAddress address) + void addPtr(TrustedImm32 imm, AbsoluteAddress address) { - move(ImmPtr(address.m_ptr), scratchRegister); + move(TrustedImmPtr(address.m_ptr), scratchRegister); addPtr(imm, Address(scratchRegister)); } @@ -169,7 +176,7 @@ public: m_assembler.andq_rr(src, dest); } - void andPtr(Imm32 imm, RegisterID srcDest) + void andPtr(TrustedImm32 imm, RegisterID srcDest) { m_assembler.andq_ir(imm.m_value, srcDest); } @@ -179,13 +186,13 @@ public: m_assembler.orq_rr(src, dest); } - void orPtr(ImmPtr imm, RegisterID dest) + void orPtr(TrustedImmPtr imm, RegisterID dest) { move(imm, scratchRegister); m_assembler.orq_rr(scratchRegister, dest); } - void orPtr(Imm32 imm, RegisterID dest) + void orPtr(TrustedImm32 imm, RegisterID dest) { m_assembler.orq_ir(imm.m_value, dest); } @@ -195,12 +202,12 @@ public: m_assembler.subq_rr(src, dest); } - void subPtr(Imm32 imm, RegisterID dest) + void subPtr(TrustedImm32 imm, RegisterID dest) { m_assembler.subq_ir(imm.m_value, dest); } - void subPtr(ImmPtr imm, RegisterID dest) + void subPtr(TrustedImmPtr imm, RegisterID dest) { move(imm, scratchRegister); m_assembler.subq_rr(scratchRegister, dest); @@ -211,7 +218,7 @@ public: m_assembler.xorq_rr(src, dest); } - void xorPtr(Imm32 imm, RegisterID srcDest) + void xorPtr(TrustedImm32 imm, RegisterID srcDest) { m_assembler.xorq_ir(imm.m_value, srcDest); } @@ -227,7 +234,7 @@ public: m_assembler.movq_mr(address.offset, address.base, address.index, address.scale, dest); } - void loadPtr(void* address, RegisterID dest) + void loadPtr(const void* address, RegisterID dest) { if (dest == X86Registers::eax) m_assembler.movq_mEAX(address); @@ -265,7 +272,7 @@ public: } } - void storePtr(ImmPtr imm, ImplicitAddress address) + void storePtr(TrustedImmPtr imm, ImplicitAddress address) { move(imm, scratchRegister); storePtr(scratchRegister, address); @@ -287,7 +294,7 @@ public: m_assembler.movq_rr(src, dest); } - void setPtr(Condition cond, RegisterID left, Imm32 right, RegisterID dest) + void setPtr(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest) { if (((cond == Equal) || (cond == NotEqual)) && !right.m_value) m_assembler.testq_rr(left, left); @@ -303,7 +310,7 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchPtr(Condition cond, RegisterID left, ImmPtr right) + Jump branchPtr(Condition cond, RegisterID left, TrustedImmPtr right) { move(right, scratchRegister); return branchPtr(cond, left, scratchRegister); @@ -317,7 +324,7 @@ public: Jump branchPtr(Condition cond, AbsoluteAddress left, RegisterID right) { - move(ImmPtr(left.m_ptr), scratchRegister); + move(TrustedImmPtr(left.m_ptr), scratchRegister); return branchPtr(cond, Address(scratchRegister), right); } @@ -327,7 +334,7 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchPtr(Condition cond, Address left, ImmPtr right) + Jump branchPtr(Condition cond, Address left, TrustedImmPtr right) { move(right, scratchRegister); return branchPtr(cond, left, scratchRegister); @@ -339,7 +346,7 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTestPtr(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) + Jump branchTestPtr(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { // if we are only interested in the low seven bits, this can be tested with a testb if (mask.m_value == -1) @@ -351,7 +358,13 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTestPtr(Condition cond, Address address, Imm32 mask = Imm32(-1)) + Jump branchTestPtr(Condition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1)) + { + loadPtr(address.m_ptr, scratchRegister); + return branchTestPtr(cond, scratchRegister, mask); + } + + Jump branchTestPtr(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1)) { if (mask.m_value == -1) m_assembler.cmpq_im(0, address.offset, address.base); @@ -360,7 +373,7 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchTestPtr(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) + Jump branchTestPtr(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1)) { if (mask.m_value == -1) m_assembler.cmpq_im(0, address.offset, address.base, address.index, address.scale); @@ -377,32 +390,32 @@ public: return Jump(m_assembler.jCC(x86Condition(cond))); } - Jump branchSubPtr(Condition cond, Imm32 imm, RegisterID dest) + Jump branchSubPtr(Condition cond, TrustedImm32 imm, RegisterID dest) { ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero)); subPtr(imm, dest); return Jump(m_assembler.jCC(x86Condition(cond))); } - DataLabelPtr moveWithPatch(ImmPtr initialValue, RegisterID dest) + DataLabelPtr moveWithPatch(TrustedImmPtr initialValue, RegisterID dest) { m_assembler.movq_i64r(initialValue.asIntptr(), dest); return DataLabelPtr(this); } - Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { dataLabel = moveWithPatch(initialRightValue, scratchRegister); return branchPtr(cond, left, scratchRegister); } - Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, ImmPtr initialRightValue = ImmPtr(0)) + Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { dataLabel = moveWithPatch(initialRightValue, scratchRegister); return branchPtr(cond, left, scratchRegister); } - DataLabelPtr storePtrWithPatch(ImmPtr initialValue, ImplicitAddress address) + DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address) { DataLabelPtr label = moveWithPatch(initialValue, scratchRegister); storePtr(scratchRegister, address); @@ -410,9 +423,9 @@ public: } using MacroAssemblerX86Common::branchTest8; - Jump branchTest8(Condition cond, ExtendedAddress address, Imm32 mask = Imm32(-1)) + Jump branchTest8(Condition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1)) { - ImmPtr addr(reinterpret_cast<void*>(address.offset)); + TrustedImmPtr addr(reinterpret_cast<void*>(address.offset)); MacroAssemblerX86Common::move(addr, scratchRegister); return MacroAssemblerX86Common::branchTest8(cond, BaseIndex(scratchRegister, address.base, TimesOne), mask); } diff --git a/Source/JavaScriptCore/assembler/X86Assembler.h b/Source/JavaScriptCore/assembler/X86Assembler.h index 587d900..4851c1e 100644 --- a/Source/JavaScriptCore/assembler/X86Assembler.h +++ b/Source/JavaScriptCore/assembler/X86Assembler.h @@ -131,6 +131,7 @@ private: OP_GROUP1_EbIb = 0x80, OP_GROUP1_EvIz = 0x81, OP_GROUP1_EvIb = 0x83, + OP_TEST_EbGb = 0x84, OP_TEST_EvGv = 0x85, OP_XCHG_EvGv = 0x87, OP_MOV_EvGv = 0x89, @@ -228,6 +229,8 @@ public: { } + bool isSet() const { return (m_offset != -1); } + private: JmpSrc(int offset) : m_offset(offset) @@ -299,7 +302,7 @@ public: // Arithmetic operations: #if !CPU(X86_64) - void adcl_im(int imm, void* addr) + void adcl_im(int imm, const void* addr) { if (CAN_SIGN_EXTEND_8_32(imm)) { m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_ADC, addr); @@ -376,7 +379,7 @@ public: } } #else - void addl_im(int imm, void* addr) + void addl_im(int imm, const void* addr) { if (CAN_SIGN_EXTEND_8_32(imm)) { m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_ADD, addr); @@ -442,7 +445,7 @@ public: } } #else - void andl_im(int imm, void* addr) + void andl_im(int imm, const void* addr) { if (CAN_SIGN_EXTEND_8_32(imm)) { m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_AND, addr); @@ -528,7 +531,7 @@ public: } } #else - void orl_im(int imm, void* addr) + void orl_im(int imm, const void* addr) { if (CAN_SIGN_EXTEND_8_32(imm)) { m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_OR, addr); @@ -594,7 +597,7 @@ public: } } #else - void subl_im(int imm, void* addr) + void subl_im(int imm, const void* addr) { if (CAN_SIGN_EXTEND_8_32(imm)) { m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_SUB, addr); @@ -867,12 +870,12 @@ public: } } #else - void cmpl_rm(RegisterID reg, void* addr) + void cmpl_rm(RegisterID reg, const void* addr) { m_formatter.oneByteOp(OP_CMP_EvGv, reg, addr); } - void cmpl_im(int imm, void* addr) + void cmpl_im(int imm, const void* addr) { if (CAN_SIGN_EXTEND_8_32(imm)) { m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, addr); @@ -919,7 +922,12 @@ public: m_formatter.oneByteOp(OP_GROUP3_EvIz, GROUP3_OP_TEST, base, offset); m_formatter.immediate32(imm); } - + + void testb_rr(RegisterID src, RegisterID dst) + { + m_formatter.oneByteOp(OP_TEST_EbGb, src, dst); + } + void testb_im(int imm, int offset, RegisterID base) { m_formatter.oneByteOp(OP_GROUP3_EbIb, GROUP3_OP_TEST, base, offset); @@ -1039,7 +1047,7 @@ public: m_formatter.oneByteOp(OP_MOV_EvGv, src, base, index, scale, offset); } - void movl_mEAX(void* addr) + void movl_mEAX(const void* addr) { m_formatter.oneByteOp(OP_MOV_EAXOv); #if CPU(X86_64) @@ -1076,7 +1084,7 @@ public: m_formatter.immediate32(imm); } - void movl_EAXm(void* addr) + void movl_EAXm(const void* addr) { m_formatter.oneByteOp(OP_MOV_OvEAX); #if CPU(X86_64) @@ -1107,13 +1115,13 @@ public: m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, index, scale, offset); } - void movq_mEAX(void* addr) + void movq_mEAX(const void* addr) { m_formatter.oneByteOp64(OP_MOV_EAXOv); m_formatter.immediate64(reinterpret_cast<int64_t>(addr)); } - void movq_EAXm(void* addr) + void movq_EAXm(const void* addr) { m_formatter.oneByteOp64(OP_MOV_OvEAX); m_formatter.immediate64(reinterpret_cast<int64_t>(addr)); @@ -1153,7 +1161,7 @@ public: #else - void movl_rm(RegisterID src, void* addr) + void movl_rm(RegisterID src, const void* addr) { if (src == X86Registers::eax) movl_EAXm(addr); @@ -1161,7 +1169,7 @@ public: m_formatter.oneByteOp(OP_MOV_EvGv, src, addr); } - void movl_mr(void* addr, RegisterID dst) + void movl_mr(const void* addr, RegisterID dst) { if (dst == X86Registers::eax) movl_mEAX(addr); @@ -1169,7 +1177,7 @@ public: m_formatter.oneByteOp(OP_MOV_GvEv, dst, addr); } - void movl_i32m(int imm, void* addr) + void movl_i32m(int imm, const void* addr) { m_formatter.oneByteOp(OP_GROUP11_EvIz, GROUP11_MOV, addr); m_formatter.immediate32(imm); @@ -1365,7 +1373,7 @@ public: } #if !CPU(X86_64) - void cvtsi2sd_mr(void* address, XMMRegisterID dst) + void cvtsi2sd_mr(const void* address, XMMRegisterID dst) { m_formatter.prefix(PRE_SSE_F2); m_formatter.twoByteOp(OP2_CVTSI2SD_VsdEd, (RegisterID)dst, address); @@ -1398,6 +1406,12 @@ public: } #endif + void movsd_rr(XMMRegisterID src, XMMRegisterID dst) + { + m_formatter.prefix(PRE_SSE_F2); + m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, (RegisterID)dst, (RegisterID)src); + } + void movsd_rm(XMMRegisterID src, int offset, RegisterID base) { m_formatter.prefix(PRE_SSE_F2); @@ -1536,6 +1550,7 @@ public: ASSERT(to.m_offset != -1); char* code = reinterpret_cast<char*>(m_formatter.data()); + ASSERT(!reinterpret_cast<int32_t*>(code + from.m_offset)[-1]); setRel32(code + from.m_offset, code + to.m_offset); } @@ -1717,7 +1732,7 @@ private: } #if !CPU(X86_64) - void oneByteOp(OneByteOpcodeID opcode, int reg, void* address) + void oneByteOp(OneByteOpcodeID opcode, int reg, const void* address) { m_buffer.ensureSpace(maxInstructionSize); m_buffer.putByteUnchecked(opcode); |