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author | Magnus Damm <damm@igel.co.jp> | 2007-08-12 15:31:29 +0900 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-09-21 11:57:50 +0900 |
commit | 46420e49c9fd76defecfb3f048ab20c5a72dfd0a (patch) | |
tree | 08f30f269fba1fd71f00e2902ba310b49a698df6 /arch/sh | |
parent | f8b40d8ce86035b126a27a57ed9139c08ae3ebf1 (diff) | |
download | kernel_samsung_tuna-46420e49c9fd76defecfb3f048ab20c5a72dfd0a.zip kernel_samsung_tuna-46420e49c9fd76defecfb3f048ab20c5a72dfd0a.tar.gz kernel_samsung_tuna-46420e49c9fd76defecfb3f048ab20c5a72dfd0a.tar.bz2 |
sh: x3 - add ipi vectors
With the intc dual prio register support in place it is now possible
to add the ipi vectors to x3.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-shx3.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c index 2c13f9c..3c8a2ed 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c @@ -89,6 +89,8 @@ enum { FE0, FE1, GPIO0, GPIO1, GPIO2, GPIO3, PAM, IRM, + INTICI0, INTICI1, INTICI2, INTICI3, + INTICI4, INTICI5, INTICI6, INTICI7, /* interrupt groups */ IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3, @@ -137,6 +139,10 @@ static struct intc_vect vectors[] = { INTC_VECT(GPIO0, 0xe40), INTC_VECT(GPIO1, 0xe60), INTC_VECT(GPIO2, 0xe80), INTC_VECT(GPIO3, 0xea0), INTC_VECT(PAM, 0xec0), INTC_VECT(IRM, 0xee0), + INTC_VECT(INTICI0, 0xf00), INTC_VECT(INTICI1, 0xf20), + INTC_VECT(INTICI2, 0xf40), INTC_VECT(INTICI3, 0xf60), + INTC_VECT(INTICI4, 0xf80), INTC_VECT(INTICI5, 0xfa0), + INTC_VECT(INTICI6, 0xfc0), INTC_VECT(INTICI7, 0xfe0), }; static struct intc_group groups[] = { @@ -207,6 +213,9 @@ static struct intc_prio_reg prio_registers[] = { VIN1, VIN0, IIC, DU} }, { 0xfe410810, 0, 32, 4, /* INT2PRI4 */ { 0, 0, PAM, GPIO3, GPIO2, GPIO1, GPIO0, IRM } }, + { 0xfe410090, 0xfe4100a0, 32, 4, /* CnICIPRI / CnICIPRICLR */ + { INTICI7, INTICI6, INTICI5, INTICI4, + INTICI3, INTICI2, INTICI1, INTICI0 } }, }; static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, priorities, |