| Commit message (Collapse) | Author | Age | Files | Lines |
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Driver skeleton aimed at controlling ST-E modem rfkill switches.
It will bind to relevant modem devices drivers once registered, and
create relevant sysfs entries.
Preliminary version, actual rfkill switch control is not implemented.
Change-Id: I6836689495db8c0e3099545020d1eca8a1ca9407
Signed-off-by: Julien Vuillaumier <j-vuillaumier@ti.com>
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Just to keep up with omapzoom.
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This reverts commit 91dfbe1fa8f4ba8b7c70bcad4d7fe5a54b298222.
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They're outdated, let's clean up things a bit by removing them
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Add a common ION file to initialize the ION memory
spaces for DUCATI, Tiler and large surfaces
Change-Id: I17e608d90c5568bd4be1285cee1976e05192950d
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Conflicts:
arch/arm/mach-omap2/Makefile
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SR should be initialized in sequence before idle initialization
is done and after pm basic inits are complete. PM initialization unfortunately
is not too smart and has to depend on initcall sequencing to ensure
proper dependencies are met. instead of fixing the entire PM init
sequence(which is possible with function pointers being registered and invoked,
but needs an entire revamp of OMAP PM's infrastructure), move SR initialization
up in the chain to ensure this works.
Change-Id: I643f73168753f618ccac6fd34b135aeb93923637
Signed-off-by: Nishanth Menon <nm@ti.com>
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Android's RAMCONSOLE framework is handy framework which allows
saving the kernel printk messages to a buffer in RAM, so that
after a kernel panic they can be viewed in the next kernel
invocation, by accessing /proc/last_kmsg.
This obviously needs DDR to be in selfrefresh mode. Board files
which have relevant support need to enable CONFIG_OMAP_RAM_CONSOLE
and call omap_ram_console_init with relevant parameters for this
to function.
Change-Id: I2dd5ad55a0a3af5a5dcb9a9b8a797e1371af39bc
Signed-off-by: Huzefa Kankroliwala <huzefank@ti.com>
Signed-off-by: Akash Choudhari <akashc@ti.com>
Signed-off-by: Ameya Palande <ameya.palande@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
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Bootloaders need to know when their platforms do a reboot.
The only memory that is retained is SAR ram accross reboots,
provide ability to store the reboot reason in a standard location
in the SAR memory (using the last 0xf bytes in SAR BANK1 ram).
This is now populated with the string "normal" if the reboot
is due to ordinary reboot commands, if the reboot reason is
for other reasons, such as bootloader or recovery as is the
case with Android systems, this stores the same.
NOTE: bootloader should be updated accordingly.
Change-Id: I32d05ef023682a1530b34315dac90fd97bed3265
Signed-off-by: Nishanth Menon <nm@ti.com>
Conflicts:
arch/arm/mach-omap2/Kconfig
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This patch adds kernel driver for PCB temperature sensor
connected on TWL6030 GPADC (Thermistor).
It calls dedicated function to start GPADC conversion and
convert the result into milli-degrees celsius.
Change-Id: I7b573182611bda187f6a38dc01ba65935c8a5c4b
Signed-off-by: Sebastien Sabatier <s-sabatier1@ti.com>
Conflicts:
arch/arm/configs/tuna_defconfig
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Traditional SmartReflex AVS(Automatic Voltage Scaling) classes are:
* Class 0 - Product test calibration
Silicon is calibration at production floor and fused with voltages
for each OPP
* Class 1 - Boot time calibration
Silicon is calibrated once at boot time and voltages are stored for
the lifetime of operation.
* Class 2 - Continuous s/w calibration
SR module notifies s/w for any change in the system which is desired
and the s/w makes runtime decisions in terms of setting the voltage,
this mechanism could be used in the system which does not have PMIC
capable of SR without using the voltage controller and voltage
processor blocks.
* Class 3 - Continuous h/w calibration
SR module is switch on after reaching a voltage level and SR
continuously monitors the system and makes runtime adjustments without
s/w involvement.
OMAP3430 has used SmartReflex AVS and with a a PMIC which understands the SR
protocol, Class 3 has been used. With OMAP3630 onwards, a new SmartReflex AVS
class of operation Class 1.5 was introduced.
* Class 1.5 - Periodic s/w calibration
This uses the h/w calibration loop and at the end of calibration
stores the voltages to be used run time, periodic recalibration is
performed as well.
The operational mode is describes as the following:
* SmartReflex AVS h/w calibration loop is essential to identify the optimal
voltage for a given OPP.
* Once this optimal voltage is detected, SmartReflex AVS loop is disabled in
class 1.5 mode of operation.
* Until there is a need for a recalibration, any further transition to an OPP
voltage which is calibrated can use the calibrated voltage and does not
require enabling the SR AVS h/w loop.
* On a periodic basis (recommendation being once approximately every 24 hours),
software is expected to perform a recalibration to find a new optimal
voltage which is compensated for device aging.
- For performing this recalibration, the start voltage does not need to
be the nominal voltage anymore. instead, the system can start with a
voltage which is 50mV higher than the previously calibrated voltage to
identify the new optimal voltage as the aging factor within a period of
1 day is not going to be anywhere close to 50mV.
- This "new starting point" for recalibration is called a dynamic
nominal voltage for that voltage point.
In short, with the introduction of SmartReflex class 1.5, there are three new
voltages possible in a system's DVFS transition:
* Nominal Voltage - The maximum voltage needed for a worst possible device
in the worst possible conditions. This is the voltage we choose as
the starting point for the h/w loop to optimize for the first time
calibration on system bootup.
* Dynamic Nominal Voltage - Worst case voltage for a specific device in
considering the system aging on the worst process device.
* Calibrated Voltage - Best voltage for the current device at a given point
of time.
In terms of the implementation, doing calibration involves waiting for the
SmartReflex h/w loop to settle down, and doing this as part of the DVFS flow
itself would increase the latency of DVFS transition when there is a need to
calibrate that opp. instead, the calibration is performed "out of path" using
a workqueue statemachine. The workqueue waits for the system stabilization,
then enables VP interrupts to monitor for system instability interms of voltage
oscillations that are reported back to the system as interrupts, in case of
prolonged system oscillations, nominal voltage is chosen as a safe voltage and
this event is logged in the system log for developer debug and fixing.
For the recalibration, a common workqueue for all domains is started at the
start of the class initialization and it resets the calibrated voltages
on a periodic basis. For distros that may choose not to do the recommended
periodic recalibration, instead choose to perform boot time calibration,
kconfig configuration option is provided to do so.
TODO:
a) Cpuidle and suspend paths are not integrated with SmartReflex driver at
this point.
b) Since the SR registers are accessed and controlled in parallel to DVFS
some sort of mechanism is necessary to be introduced along with OMAP
DVFS layer to ensure mutual exclusivity
c) Additional debug interfaces for vmin analysis for platform characterization
and addition of system margin needs to be introduced from SmartReflex
perspective.
This implementation also includes the following contributors:
Tony Lindgren for suggestion on using interrupt based mechanism instead of
polling to detect voltage oscillations.
Peter 'p2' De Schrijver for debating alternatives on recalibration mechanisms
Paul Walmsey, Eduardo Valentin, Ambresh K, Igor Dmitriev and quiet a few others
for patient review, testing and reporting of issues of a previous incarnation
of this implemenation. Last, but not the least, the TI H/w team in introducing
this new SR AVS class and patiently debating it's various facets.
Change-Id: I6549c75bfb4401d47b657c5efc1e348dc3cd0c46
Signed-off-by: Nishanth Menon <nm@ti.com>
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Conflicts:
arch/arm/mach-omap2/pm44xx.c
Change-Id: I0997d3d81eeed16a5fe80798626f41c0d6c66cfa
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Due to platform limitations, it only currently supports IRQ-only
fiq debugger.
Change-Id: I95508183a40793e1220769e34305bbe9fb6ede4e
Signed-off-by: Dima Zavin <dima@android.com>
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Change-Id: Iaf0559b73f8a5c6f943350a8dc8350a40e63ab51
Signed-off-by: Adam Hampson <ahampson@sta.samsung.com>
Signed-off-by: Rom Lemarchand <rlemarchand@sta.samsung.com>
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When CONFIG_PM was not defined, dvfs would be compiled which
would result in dvfs's definitions of omap_device_scale,
omap_dvfs_is_scaling and omap_dvfs_register_device conflicting
with the inline definitions of those in dvfs.h
Change-Id: I3a43e04108f0bb3038f0e1c3d764ebabbdc27da5
Signed-off-by: Scott Anderson <saa@google.com>
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git://github.com/nmenon/linux-omap-ti-pm into linux-omap-pm-3.0
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The SAR RAM is maintained during Device OFF mode. The register layout
is fixed in SAR ROM. SAR is split into 4 banks with different
privilege accesses based on device type
---------------------------------------------------------------
Access mode Bank Address Range
---------------------------------------------------------------
HS/GP : Public 1 0x4A32_6000 - 0x4A32_6FFF (4kB)
HS/GP : Public 2 0x4A32_7000 - 0x4A32_73FF (1kB)
HS/EMU : Secured
GP : Public 3 0x4A32_8000 - 0x4A32_87FF (2kB)
HS/GP :Secure
write once. 4 0x4A32_9000 - 0x4A32_93FF (1kB)
---------------------------------------------------------------
The save process is done entirely by software and restore is done by
hardware using the auto-restore feature. The restore feature is enabled
by default and cannot be disabled. The software must save the data
to be restored in a dedicated location in SAR RAM.
[with contributions for 4460, cleanups from:
Rajeev Kulkarni <rajeevk@ti.com>
Nishanth Menon <nm@ti.com>
Axel Haslam <axelhaslam@ti.com>
Avinash.H.M <avinashhm@ti.com>]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Change-Id: I2a2f4c3d3a27f8cfa2559b4f8a322f777ab1467d
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Conflicts:
arch/arm/mach-omap2/Makefile
Signed-off-by: Iliyan Malchev <malchev@google.com>
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Conflicts:
arch/arm/mach-omap2/board-omap4panda.c
Signed-off-by: Iliyan Malchev <malchev@google.com>
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Added creation of devices for dmm through use of hwmod. Added base address
and IRQ information into the dmm platform data. The tiler platform device
is created after the dmm device to ensure correct sequence for suspend/resume.
Use the platform data to intialize dmm device during probe.
Change-Id: I19672fb086e5ade023db0118b5b4a7cf70d393af
Signed-off-by: Andy Gross <andy.gross@ti.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
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Change-Id: I2217120654ccb54828e44e71a3d8029bc2214106
Signed-off-by: Todd Poynor <toddpoynor@google.com>
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Conflicts:
drivers/misc/Kconfig
drivers/misc/Makefile
sound/soc/omap/abe/abe_port.c
Signed-off-by: Iliyan Malchev <malchev@google.com>
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Conflicts:
drivers/misc/Kconfig
drivers/misc/Makefile
Signed-off-by: Iliyan Malchev <malchev@google.com>
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Add the temp sensor device file to the mach-omap2 directory
Change-Id: I8ea9a139ca9fe961f452aeff6d5fe5b28becf842
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Moiz Sonasath <m-sonasath@ti.com>
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Add debugging for various PRCM-side power-related state:
* /sys/kernel/debug/prcm dumps state for all voltage, power,
and clock domains, and all modules (and some DPLLs and
internal generators).
* /sys/kernel/debug/prcm-on dumps state of all power domains
and modules known to be currently ON or have clocks enabled,
and some DPLLs not in bypass. Modules with slave idle
state IDLE are considered not ON, although functional
clocks could be enabled if PRCM only manages the interface
clock.
* At system wakeup time, all power domains that remained ON
during suspend are dumped, and all modules, etc. within
those power domains that are known to be currently ON
are dumped (per prcm-on above). This dump appears in the
kernel logbuf. If all power domains hit RETENTION or OFF
then no output is generated.
Attempts have been made to choose correctly between the info in the
TRM and the Linux OMAP4 code where these differ. A few modules not
present in the TRMs remain to be investigated. There are some TBD
comments in the code where questions have arisen or assumptions
were made.
Change-Id: Ib39b9dc0482127bae68805ce77bf66372786cebf
Signed-off-by: Todd Poynor <toddpoynor@google.com>
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Add vibrator driver for the tuna board.
Change-ID: I677f73c001f5c8b03f6806ec7262a6a38b94d857
Signed-off-by: Rom Lemarchand <rlemarchand@sta.samsung.com>
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Conflicts:
arch/arm/mach-omap2/board-omap4panda.c
Change-Id: Ide185c905f967cc57ec4cfcc7a33f8907226bce3
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Add routines to converts dmtimers to platform devices. The device data
is obtained from hwmod database of respective platform and is registered
to device model after successful binding to driver. It also provides
provision to access timers during early boot when pm_runtime framework
is not completely up and running.
Change-Id: I228ffa3f91f54b6f7f185565cbb4357823723c4a
[girishsg@ti.com: Fixed review comments]
Signed-off-by: Girish S G <girishsg@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Thara Gopinath <thara@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
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Initial drop
[Initial checkpatch.pl warning removal by: Mark Tyler <mark.tyler@ti.com>]
Change-Id: If2d842db23d4ddd73c6f0c6e5c1c41267e12f024
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
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Enable ehci for toro since Modem IPC is via USB EHCI.
Change-Id: If5a86baf85c79d667c8fb71a1ea6d101c2597d54
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
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Change-Id: I131655146ceaf255b21997ceaed64271ab6e19e9
Signed-off-by: Dima Zavin <dima@android.com>
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This introduces a new board-tuna-jack file that configures
the platform to use the sec_jack driver for wired accessory
detection.
Signed-off-by: Chris Kelly <c-kelly@ti.com>
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Tuna board memory configuartion is as below
The memory organisation is as below :
EMIF1 - CS0 - 4 Gb
EMIF2 - CS0 - 4 Gb
--------------------
TOTAL - 8 Gb
Change-Id: I3517ab2f52ce0452bbb9fdd011ef6bb2bca56bbd
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Example dmesg output after reboot command:
Last reset was warm software reset (PRM_RSTST=0x2)
Example after watchdog bite:
Last reset was MPU Watchdog Timer reset (PRM_RSTST=0x8)
Example after power off or battery pull:
Last reset was cold reset (PRM_RSTST=0x1)
Change-Id: I44d312d726ee41a0f0be0e77521bbe4ffbbd7a08
Signed-off-by: Todd Poynor <toddpoynor@google.com>
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Conflicts:
arch/arm/mach-omap2/board-4430sdp.c
Change-Id: Ic754f258075d627a7a31600eb9028b79b6b75828
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