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* x86: let intel 64-bit use intel.cYinghai Lu2008-09-101-366/+0
| | | | | | | | | | now that arch/x86/kernel/cpu/intel_64.c and arch/x86/kernel/cpu/intel.c are equal, drop arch/x86/kernel/cpu/intel_64.c and fix up the glue. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: make intel_64.c the same as intel.cYinghai Lu2008-09-101-17/+284
| | | | | | | No change in functionality intended - this only adds the 32-bit side. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: little clean up of intel.c/intel_64.cYinghai Lu2008-09-081-5/+3
| | | | | Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86, cpu init: call early_init_xxx in init_xxxYinghai Lu2008-09-061-0/+2
| | | | | | | | | | | | | | | | | | | | so we: 1. could set some cap to ap 2. restore some cap after memset in identify_cpu for boot cpu esp for CONSTANT_TSC this matters, as: before this patch: flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow rep_good nopl pni monitor cx16 lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs after this patch: flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl pni monitor cx16 lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs so constant_tsc is back... Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Merge branch 'x86/x2apic' into x86/coreIngo Molnar2008-09-051-1/+4
|\ | | | | | | | | | | | | Conflicts: arch/x86/kernel/cpu/common_64.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: use cpuid vector 0xb when available for detecting cpu topologySuresh Siddha2008-08-231-1/+4
| | | | | | | | | | | | | | | | | | | | cpuid leaf 0xb provides extended topology enumeration. This interface provides the 32-bit x2APIC id of the logical processor and it also provides a new mechanism to detect SMT and core siblings (which provides increased addressability). Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | x86: remove cpu_vendor_devYinghai Lu2008-09-041-1/+2
|/ | | | | | | | | | | | 1. add c_x86_vendor into cpu_dev 2. change cpu_devs to static 3. check c_x86_vendor before put that cpu_dev into array 4. remove alignment for 64bit 5. order the sequence in cpu_devs according to link sequence... so could put intel at first, then amd... Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: get x86_phys_bits earlyYinghai Lu2008-07-141-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when try to make hpet_enable use io_remap instead fixmap got ioremap: invalid physical address fed00000 ------------[ cut here ]------------ WARNING: at arch/x86/mm/ioremap.c:161 __ioremap_caller+0x8c/0x2f3() Modules linked in: Pid: 0, comm: swapper Not tainted 2.6.26-rc9-tip-01873-ga9827e7-dirty #358 Call Trace: [<ffffffff8026615e>] warn_on_slowpath+0x6c/0xa7 [<ffffffff802e2313>] ? __slab_alloc+0x20a/0x3fb [<ffffffff802d85c5>] ? mpol_new+0x88/0x17d [<ffffffff8022a4f4>] ? mcount_call+0x5/0x31 [<ffffffff8022a4f4>] ? mcount_call+0x5/0x31 [<ffffffff8024b0d2>] __ioremap_caller+0x8c/0x2f3 [<ffffffff80e86dbd>] ? hpet_enable+0x39/0x241 [<ffffffff8022a4f4>] ? mcount_call+0x5/0x31 [<ffffffff8024b466>] ioremap_nocache+0x2a/0x40 [<ffffffff80e86dbd>] hpet_enable+0x39/0x241 [<ffffffff80e7a1f6>] hpet_time_init+0x21/0x4e [<ffffffff80e730e9>] start_kernel+0x302/0x395 [<ffffffff80e722aa>] x86_64_start_reservations+0xb9/0xd4 [<ffffffff80e722fe>] ? x86_64_init_pda+0x39/0x4f [<ffffffff80e72400>] x86_64_start_kernel+0xec/0x107 ---[ end trace a7919e7f17c0a725 ]--- it seems for amd system that is set later... try to move setting early in early_identify_cpu. and remove same code for intel and centaur. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86_64: add pseudo-features for 32-bit compat syscallJeremy Fitzhardinge2008-07-111-0/+2
| | | | | | | | | Add pseudo-feature bits to describe whether the CPU supports sysenter and/or syscall from ia32-compat userspace. This removes a hardcoded test in vdso32-setup. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: make 64-bit identify_cpu use cpu_devYinghai Lu2008-07-081-2/+13
| | | | | | | we may need to move some functions to common.c later Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: Remove workaround for prescott (32bit P4) from 64-bit code.Dave Jones2008-05-301-5/+0
| | | | | Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86: Move the 64-bit Intel specific parts out of setup_64.cDave Jones2008-05-301-0/+97
Create a separate intel_64.c file in the cpu/ dir for the useful parts to live in. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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