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authorElliott Hughes <enh@google.com>2014-05-05 21:59:53 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2014-05-05 21:59:53 +0000
commit752115dda7cb52dd2576c6fa3197f238f89cfcdb (patch)
treec96bec6e21d57b47b9eb11ff5222cb5e9ceffc60 /libcutils
parentf2c0f32887a46c11e350465c5a2db1e3d9edec1e (diff)
parentc27a444e54d531f8a0cd33e67dc46ff7c763cc4b (diff)
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Merge "Add Silvermont architecture cache sizes"
Diffstat (limited to 'libcutils')
-rw-r--r--libcutils/arch-x86/cache_wrapper.S11
1 files changed, 9 insertions, 2 deletions
diff --git a/libcutils/arch-x86/cache_wrapper.S b/libcutils/arch-x86/cache_wrapper.S
index 508fdd3..9eee25c 100644
--- a/libcutils/arch-x86/cache_wrapper.S
+++ b/libcutils/arch-x86/cache_wrapper.S
@@ -17,8 +17,15 @@
* Contributed by: Intel Corporation
*/
+#if defined(__slm__)
+/* Values are optimized for Silvermont */
+#define SHARED_CACHE_SIZE (1024*1024) /* Silvermont L2 Cache */
+#define DATA_CACHE_SIZE (24*1024) /* Silvermont L1 Data Cache */
+#else
/* Values are optimized for Atom */
-#define SHARED_CACHE_SIZE (512*1024) /* Atom L2 Cache */
-#define DATA_CACHE_SIZE (24*1024) /* Atom L1 Data Cache */
+#define SHARED_CACHE_SIZE (512*1024) /* Atom L2 Cache */
+#define DATA_CACHE_SIZE (24*1024) /* Atom L1 Data Cache */
+#endif
+
#define SHARED_CACHE_SIZE_HALF (SHARED_CACHE_SIZE / 2)
#define DATA_CACHE_SIZE_HALF (DATA_CACHE_SIZE / 2)