diff options
Diffstat (limited to 'binutils-2.24/include/opcode/ChangeLog')
| -rw-r--r-- | binutils-2.24/include/opcode/ChangeLog | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/binutils-2.24/include/opcode/ChangeLog b/binutils-2.24/include/opcode/ChangeLog index b8a99f8..c3c1c3f 100644 --- a/binutils-2.24/include/opcode/ChangeLog +++ b/binutils-2.24/include/opcode/ChangeLog @@ -1,3 +1,36 @@ +2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com> + + * mips.h (INSN_ISA_MASK): Updated. + (INSN_ISA32R3): New define. + (INSN_ISA32R5): New define. + (INSN_ISA64R3): New define. + (INSN_ISA64R5): New define. + (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 + INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. + (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and + mips64r5. + (INSN_UPTO32R3): New define. + (INSN_UPTO32R5): New define. + (INSN_UPTO64R3): New define. + (INSN_UPTO64R5): New define. + (ISA_MIPS32R3): New define. + (ISA_MIPS32R5): New define. + (ISA_MIPS64R3): New define. + (ISA_MIPS64R5): New define. + (CPU_MIPS32R3): New define. + (CPU_MIPS32R5): New define. + (CPU_MIPS64R3): New define. + (CPU_MIPS64R5): New define. + +2014-05-01 Richard Sandiford <rdsandiford@googlemail.com> + + * mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values. + +2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com> + + * mips.h: Updated description of +o, +u, +v and +w for MIPS and + microMIPS. + 2013-11-20 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64.h (aarch64_pstatefields): Change element type to @@ -34,6 +67,19 @@ * aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. (enum aarch64_opnd): Add AARCH64_OPND_COND1. +2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> + + * mips.h (mips_operand_type): Add OP_IMM_INDEX and OP_REG_INDEX. + (mips_reg_operand_type): Add OP_REG_MSA and OP_REG_MSA_CTRL. + For MIPS, add comments for +d, +e, +h, +k, +l, +n, +o, +u, +v, +w, + +T, +U, +V, +W, +~, +!, +@, +#, +$, +%, +^, +&, +*, +|. + For MIPS, update extension character sequences after +. + (ASE_MSA): New define. + (ASE_MSA64): New define. + For microMIPS, add comments for +d, +e, +h, +k, +l, +n, +o, +u, +v, +w, + +x, +T, +U, +V, +W, +~, +!, +@, +#, +$, +%, +^, +&, +*, +|. + For microMIPS, update extension character sequences after +. + 2013-08-23 Yuri Chornoivan <yurchor@ukr.net> PR binutils/15834 |