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| author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
| commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
| tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /test/MC/Disassembler/Mips | |
| parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
| download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 | |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'test/MC/Disassembler/Mips')
21 files changed, 862 insertions, 0 deletions
diff --git a/test/MC/Disassembler/Mips/mips32r6.txt b/test/MC/Disassembler/Mips/mips32r6.txt new file mode 100644 index 0000000..adbcd99 --- /dev/null +++ b/test/MC/Disassembler/Mips/mips32r6.txt @@ -0,0 +1,116 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r6 | FileCheck %s + +0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100 +0x7c 0x43 0x22 0xa0 # CHECK: align $4, $2, $3, 2 +0xec 0x7f 0x00 0x38 # CHECK: aluipc $3, 56 +0x3c 0x62 0xff 0xe9 # CHECK: aui $3, $2, -23 +0xec 0x7e 0xff 0xff # CHECK: auipc $3, -1 +0xe8 0x37 0x96 0xb8 # CHECK: balc 14572256 +0xc8 0x37 0x96 0xb8 # CHECK: bc 14572256 + +# FIXME: Don't check the immediate on these for the moment, the encode/decode +# functions are not inverses of eachother. +# The immediate should be 4 but the disassembler currently emits 8 +0x45 0x20 0x00 0x01 # CHECK: bc1eqz $f0, +0x45 0x3f 0x00 0x01 # CHECK: bc1eqz $f31, +0x45 0xa0 0x00 0x01 # CHECK: bc1nez $f0, +0x45 0xbf 0x00 0x01 # CHECK: bc1nez $f31, +# FIXME: Don't check the immediate on these for the moment, the encode/decode +# functions are not inverses of eachother. +# The immediate should be 8 but the disassembler currently emits 12 +0x49 0x20 0x00 0x02 # CHECK: bc2eqz $0, +0x49 0x3f 0x00 0x02 # CHECK: bc2eqz $31, +0x49 0xa0 0x00 0x02 # CHECK: bc2nez $0, +0x49 0xbf 0x00 0x02 # CHECK: bc2nez $31, + +0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256 +# FIXME: Don't check the immediate on the bcczal's for the moment, the +# encode/decode functions are not inverses of eachother. +0x20 0x02 0x01 0x4d # CHECK: beqzalc $2, +0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256 +0x60 0x02 0x01 0x4d # CHECK: bnezalc $2, +0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72256 +0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, +0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256 +0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 256 +0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 256 +0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, +0x58 0x05 0x00 0x40 # CHECK: blezc $5, 256 +0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, +0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 256 +0x7c 0x02 0x20 0x20 # CHECK: bitswap $4, $2 +0x18 0x02 0x01 0x4d # CHECK: blezalc $2, +0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 4 +0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 4 +0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 4 +0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 4 +0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 4 +0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 4 +0x46 0x84 0x18 0x80 # CHECK: cmp.f.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x80 # CHECK: cmp.f.d $f2, $f3, $f4 +0x46 0x84 0x18 0x81 # CHECK: cmp.un.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x81 # CHECK: cmp.un.d $f2, $f3, $f4 +0x46 0x84 0x18 0x82 # CHECK: cmp.eq.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x82 # CHECK: cmp.eq.d $f2, $f3, $f4 +0x46 0x84 0x18 0x83 # CHECK: cmp.ueq.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x83 # CHECK: cmp.ueq.d $f2, $f3, $f4 +0x46 0x84 0x18 0x84 # CHECK: cmp.olt.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x84 # CHECK: cmp.olt.d $f2, $f3, $f4 +0x46 0x84 0x18 0x85 # CHECK: cmp.ult.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x85 # CHECK: cmp.ult.d $f2, $f3, $f4 +0x46 0x84 0x18 0x86 # CHECK: cmp.ole.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x86 # CHECK: cmp.ole.d $f2, $f3, $f4 +0x46 0x84 0x18 0x87 # CHECK: cmp.ule.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x87 # CHECK: cmp.ule.d $f2, $f3, $f4 +0x46 0x84 0x18 0x88 # CHECK: cmp.sf.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x88 # CHECK: cmp.sf.d $f2, $f3, $f4 +0x46 0x84 0x18 0x89 # CHECK: cmp.ngle.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x89 # CHECK: cmp.ngle.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8a # CHECK: cmp.seq.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8a # CHECK: cmp.seq.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8b # CHECK: cmp.ngl.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8b # CHECK: cmp.ngl.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8c # CHECK: cmp.lt.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8c # CHECK: cmp.lt.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8d # CHECK: cmp.nge.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8d # CHECK: cmp.nge.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8e # CHECK: cmp.le.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8e # CHECK: cmp.le.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8f # CHECK: cmp.ngt.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8f # CHECK: cmp.ngt.d $f2, $f3, $f4 +0x00 0x64 0x10 0x9a # CHECK: div $2, $3, $4 +0x00 0x64 0x10 0x9b # CHECK: divu $2, $3, $4 +# 0xf8 0x05 0x01 0x00 # CHECK-TODO: jialc $5, 256 +# 0xd8 0x05 0x01 0x00 # CHECK-TODO: jic $5, 256 +0xec 0x48 0x00 0x43 # CHECK: lwpc $2, 268 +0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268 +0x00 0x64 0x10 0xda # CHECK: mod $2, $3, $4 +0x00 0x64 0x10 0xdb # CHECK: modu $2, $3, $4 +0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4 +0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4 +0x00 0x64 0x10 0x99 # CHECK: mulu $2, $3, $4 +0x00 0x64 0x10 0xd9 # CHECK: muhu $2, $3, $4 +0x46 0x04 0x18 0x98 # CHECK: maddf.s $f2, $f3, $f4 +0x46 0x24 0x18 0x98 # CHECK: maddf.d $f2, $f3, $f4 +0x46 0x04 0x18 0x99 # CHECK: msubf.s $f2, $f3, $f4 +0x46 0x24 0x18 0x99 # CHECK: msubf.d $f2, $f3, $f4 +0x46 0x22 0x08 0x10 # CHECK: sel.d $f0, $f1, $f2 +0x46 0x02 0x08 0x10 # CHECK: sel.s $f0, $f1, $f2 +0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4 +0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4 +0x46 0x04 0x10 0x1d # CHECK: max.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1d # CHECK: max.d $f0, $f2, $f4 +0x46 0x04 0x10 0x1c # CHECK: min.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1c # CHECK: min.d $f0, $f2, $f4 +0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4 +0x46 0x04 0x10 0x1e # CHECK: mina.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1e # CHECK: mina.d $f0, $f2, $f4 +0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4 +0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4 +0x46 0x04 0x10 0x17 # CHECK: selnez.s $f0, $f2, $f4 +0x46 0x24 0x10 0x17 # CHECK: selnez.d $f0, $f2, $f4 +0x46 0x00 0x20 0x9a # CHECK: rint.s $f2, $f4 +0x46 0x20 0x20 0x9a # CHECK: rint.d $f2, $f4 +0x46 0x00 0x20 0x9b # CHECK: class.s $f2, $f4 +0x46 0x20 0x20 0x9b # CHECK: class.d $f2, $f4 diff --git a/test/MC/Disassembler/Mips/mips64r6.txt b/test/MC/Disassembler/Mips/mips64r6.txt new file mode 100644 index 0000000..f5bb14e --- /dev/null +++ b/test/MC/Disassembler/Mips/mips64r6.txt @@ -0,0 +1,129 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips64r6 | FileCheck %s + +0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100 +0x7c 0x43 0x22 0xa0 # CHECK: align $4, $2, $3, 2 +0xec 0x7f 0x00 0x38 # CHECK: aluipc $3, 56 +0x3c 0x62 0xff 0xe9 # CHECK: aui $3, $2, -23 +0xec 0x7e 0xff 0xff # CHECK: auipc $3, -1 +0xe8 0x37 0x96 0xb8 # CHECK: balc 14572256 +0xc8 0x37 0x96 0xb8 # CHECK: bc 14572256 + +# FIXME: Don't check the immediate on these for the moment, the encode/decode +# functions are not inverses of eachother. +# The immediate should be 4 but the disassembler currently emits 8 +0x45 0x20 0x00 0x01 # CHECK: bc1eqz $f0, +0x45 0x3f 0x00 0x01 # CHECK: bc1eqz $f31, +0x45 0xa0 0x00 0x01 # CHECK: bc1nez $f0, +0x45 0xbf 0x00 0x01 # CHECK: bc1nez $f31, +# FIXME: Don't check the immediate on these for the moment, the encode/decode +# functions are not inverses of eachother. +# The immediate should be 8 but the disassembler currently emits 12 +0x49 0x20 0x00 0x02 # CHECK: bc2eqz $0, +0x49 0x3f 0x00 0x02 # CHECK: bc2eqz $31, +0x49 0xa0 0x00 0x02 # CHECK: bc2nez $0, +0x49 0xbf 0x00 0x02 # CHECK: bc2nez $31, + +0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256 +# FIXME: Don't check the immediate on the bcczal's for the moment, the +# encode/decode functions are not inverses of eachother. +0x20 0x02 0x01 0x4d # CHECK: beqzalc $2, +0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256 +0x60 0x02 0x01 0x4d # CHECK: bnezalc $2, +0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72256 +0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, +0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256 +0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 256 +0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 256 +0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, +0x58 0x05 0x00 0x40 # CHECK: blezc $5, 256 +0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, +0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 256 +0x7c 0x02 0x20 0x20 # CHECK: bitswap $4, $2 +0x18 0x02 0x01 0x4d # CHECK: blezalc $2, +0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 4 +0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 4 +0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 4 +0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 4 +0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 4 +0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 4 +0x46 0x84 0x18 0x80 # CHECK: cmp.f.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x80 # CHECK: cmp.f.d $f2, $f3, $f4 +0x46 0x84 0x18 0x81 # CHECK: cmp.un.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x81 # CHECK: cmp.un.d $f2, $f3, $f4 +0x46 0x84 0x18 0x82 # CHECK: cmp.eq.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x82 # CHECK: cmp.eq.d $f2, $f3, $f4 +0x46 0x84 0x18 0x83 # CHECK: cmp.ueq.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x83 # CHECK: cmp.ueq.d $f2, $f3, $f4 +0x46 0x84 0x18 0x84 # CHECK: cmp.olt.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x84 # CHECK: cmp.olt.d $f2, $f3, $f4 +0x46 0x84 0x18 0x85 # CHECK: cmp.ult.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x85 # CHECK: cmp.ult.d $f2, $f3, $f4 +0x46 0x84 0x18 0x86 # CHECK: cmp.ole.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x86 # CHECK: cmp.ole.d $f2, $f3, $f4 +0x46 0x84 0x18 0x87 # CHECK: cmp.ule.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x87 # CHECK: cmp.ule.d $f2, $f3, $f4 +0x46 0x84 0x18 0x88 # CHECK: cmp.sf.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x88 # CHECK: cmp.sf.d $f2, $f3, $f4 +0x46 0x84 0x18 0x89 # CHECK: cmp.ngle.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x89 # CHECK: cmp.ngle.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8a # CHECK: cmp.seq.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8a # CHECK: cmp.seq.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8b # CHECK: cmp.ngl.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8b # CHECK: cmp.ngl.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8c # CHECK: cmp.lt.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8c # CHECK: cmp.lt.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8d # CHECK: cmp.nge.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8d # CHECK: cmp.nge.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8e # CHECK: cmp.le.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8e # CHECK: cmp.le.d $f2, $f3, $f4 +0x46 0x84 0x18 0x8f # CHECK: cmp.ngt.s $f2, $f3, $f4 +0x46 0xa4 0x18 0x8f # CHECK: cmp.ngt.d $f2, $f3, $f4 +0x7c 0x43 0x23 0x64 # CHECK: dalign $4, $2, $3, 5 +0x74 0x62 0x12 0x34 # CHECK: daui $3, $2, 4660 +0x04 0x66 0x56 0x78 # CHECK: dahi $3, 22136 +0x04 0x7e 0xab 0xcd # CHECK: dati $3, -21555 +0x7c 0x02 0x20 0x24 # CHECK: dbitswap $4, $2 +0x00 0x64 0x10 0x9a # CHECK: div $2, $3, $4 +0x00 0x64 0x10 0x9b # CHECK: divu $2, $3, $4 +# 0xf8 0x05 0x01 0x00 # CHECK-TODO: jialc $5, 256 +# 0xd8 0x05 0x01 0x00 # CHECK-TODO: jic $5, 256 +0xec 0x48 0x00 0x43 # CHECK: lwpc $2, 268 +0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268 +0x00 0x64 0x10 0xda # CHECK: mod $2, $3, $4 +0x00 0x64 0x10 0xdb # CHECK: modu $2, $3, $4 +0x00 0x64 0x10 0x9e # CHECK: ddiv $2, $3, $4 +0x00 0x64 0x10 0x9f # CHECK: ddivu $2, $3, $4 +0x00 0x64 0x10 0xde # CHECK: dmod $2, $3, $4 +0x00 0x64 0x10 0xdf # CHECK: dmodu $2, $3, $4 +0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4 +0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4 +0x00 0x64 0x10 0x99 # CHECK: mulu $2, $3, $4 +0x00 0x64 0x10 0xd9 # CHECK: muhu $2, $3, $4 +0x00 0x64 0x10 0xb8 # CHECK: dmul $2, $3, $4 +0x00 0x64 0x10 0xf8 # CHECK: dmuh $2, $3, $4 +0x00 0x64 0x10 0xb9 # CHECK: dmulu $2, $3, $4 +0x00 0x64 0x10 0xf9 # CHECK: dmuhu $2, $3, $4 +0x46 0x04 0x18 0x98 # CHECK: maddf.s $f2, $f3, $f4 +0x46 0x24 0x18 0x98 # CHECK: maddf.d $f2, $f3, $f4 +0x46 0x04 0x18 0x99 # CHECK: msubf.s $f2, $f3, $f4 +0x46 0x24 0x18 0x99 # CHECK: msubf.d $f2, $f3, $f4 +0x46 0x22 0x08 0x10 # CHECK: sel.d $f0, $f1, $f2 +0x46 0x02 0x08 0x10 # CHECK: sel.s $f0, $f1, $f2 +0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4 +0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4 +0x46 0x04 0x10 0x1d # CHECK: max.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1d # CHECK: max.d $f0, $f2, $f4 +0x46 0x04 0x10 0x1c # CHECK: min.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1c # CHECK: min.d $f0, $f2, $f4 +0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4 +0x46 0x04 0x10 0x1e # CHECK: mina.s $f0, $f2, $f4 +0x46 0x24 0x10 0x1e # CHECK: mina.d $f0, $f2, $f4 +0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4 +0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4 +0x46 0x04 0x10 0x17 # CHECK: selnez.s $f0, $f2, $f4 +0x46 0x24 0x10 0x17 # CHECK: selnez.d $f0, $f2, $f4 +0x46 0x00 0x20 0x9a # CHECK: rint.s $f2, $f4 +0x46 0x20 0x20 0x9a # CHECK: rint.d $f2, $f4 +0x46 0x00 0x20 0x9b # CHECK: class.s $f2, $f4 +0x46 0x20 0x20 0x9b # CHECK: class.d $f2, $f4 diff --git a/test/MC/Disassembler/Mips/msa/test_2r.txt b/test/MC/Disassembler/Mips/msa/test_2r.txt new file mode 100644 index 0000000..7faa13c --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_2r.txt @@ -0,0 +1,17 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x7b 0x00 0x4f 0x9e # CHECK: fill.b $w30, $9 +0x7b 0x01 0xbf 0xde # CHECK: fill.h $w31, $23 +0x7b 0x02 0xc4 0x1e # CHECK: fill.w $w16, $24 +0x7b 0x08 0x05 0x5e # CHECK: nloc.b $w21, $w0 +0x7b 0x09 0xfc 0x9e # CHECK: nloc.h $w18, $w31 +0x7b 0x0a 0xb8 0x9e # CHECK: nloc.w $w2, $w23 +0x7b 0x0b 0x51 0x1e # CHECK: nloc.d $w4, $w10 +0x7b 0x0c 0x17 0xde # CHECK: nlzc.b $w31, $w2 +0x7b 0x0d 0xb6 0xde # CHECK: nlzc.h $w27, $w22 +0x7b 0x0e 0xea 0x9e # CHECK: nlzc.w $w10, $w29 +0x7b 0x0f 0x4e 0x5e # CHECK: nlzc.d $w25, $w9 +0x7b 0x04 0x95 0x1e # CHECK: pcnt.b $w20, $w18 +0x7b 0x05 0x40 0x1e # CHECK: pcnt.h $w0, $w8 +0x7b 0x06 0x4d 0xde # CHECK: pcnt.w $w23, $w9 +0x7b 0x07 0xc5 0x5e # CHECK: pcnt.d $w21, $w24 diff --git a/test/MC/Disassembler/Mips/msa/test_2r_msa64.txt b/test/MC/Disassembler/Mips/msa/test_2r_msa64.txt new file mode 100644 index 0000000..f212390 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_2r_msa64.txt @@ -0,0 +1,3 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=+msa | FileCheck %s + +0x7b 0x03 0x4e 0xde # CHECK: fill.d $w27, $9 diff --git a/test/MC/Disassembler/Mips/msa/test_2rf.txt b/test/MC/Disassembler/Mips/msa/test_2rf.txt new file mode 100644 index 0000000..e004f11 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_2rf.txt @@ -0,0 +1,34 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x7b 0x20 0x66 0x9e # CHECK: fclass.w $w26, $w12 +0x7b 0x21 0x8e 0x1e # CHECK: fclass.d $w24, $w17 +0x7b 0x30 0x02 0x1e # CHECK: fexupl.w $w8, $w0 +0x7b 0x31 0xec 0x5e # CHECK: fexupl.d $w17, $w29 +0x7b 0x32 0x23 0x5e # CHECK: fexupr.w $w13, $w4 +0x7b 0x33 0x11 0x5e # CHECK: fexupr.d $w5, $w2 +0x7b 0x3c 0xed 0x1e # CHECK: ffint_s.w $w20, $w29 +0x7b 0x3d 0x7b 0x1e # CHECK: ffint_s.d $w12, $w15 +0x7b 0x3e 0xd9 0xde # CHECK: ffint_u.w $w7, $w27 +0x7b 0x3f 0x84 0xde # CHECK: ffint_u.d $w19, $w16 +0x7b 0x34 0x6f 0xde # CHECK: ffql.w $w31, $w13 +0x7b 0x35 0x6b 0x1e # CHECK: ffql.d $w12, $w13 +0x7b 0x36 0xf6 0xde # CHECK: ffqr.w $w27, $w30 +0x7b 0x37 0x7f 0x9e # CHECK: ffqr.d $w30, $w15 +0x7b 0x2e 0xfe 0x5e # CHECK: flog2.w $w25, $w31 +0x7b 0x2f 0x54 0x9e # CHECK: flog2.d $w18, $w10 +0x7b 0x2c 0x79 0xde # CHECK: frint.w $w7, $w15 +0x7b 0x2d 0xb5 0x5e # CHECK: frint.d $w21, $w22 +0x7b 0x2a 0x04 0xde # CHECK: frcp.w $w19, $w0 +0x7b 0x2b 0x71 0x1e # CHECK: frcp.d $w4, $w14 +0x7b 0x28 0x8b 0x1e # CHECK: frsqrt.w $w12, $w17 +0x7b 0x29 0x5d 0xde # CHECK: frsqrt.d $w23, $w11 +0x7b 0x26 0x58 0x1e # CHECK: fsqrt.w $w0, $w11 +0x7b 0x27 0x63 0xde # CHECK: fsqrt.d $w15, $w12 +0x7b 0x38 0x2f 0x9e # CHECK: ftint_s.w $w30, $w5 +0x7b 0x39 0xb9 0x5e # CHECK: ftint_s.d $w5, $w23 +0x7b 0x3a 0x75 0x1e # CHECK: ftint_u.w $w20, $w14 +0x7b 0x3b 0xad 0xde # CHECK: ftint_u.d $w23, $w21 +0x7b 0x22 0x8f 0x5e # CHECK: ftrunc_s.w $w29, $w17 +0x7b 0x23 0xdb 0x1e # CHECK: ftrunc_s.d $w12, $w27 +0x7b 0x24 0x7c 0x5e # CHECK: ftrunc_u.w $w17, $w15 +0x7b 0x25 0xd9 0x5e # CHECK: ftrunc_u.d $w5, $w27 diff --git a/test/MC/Disassembler/Mips/msa/test_3r.txt b/test/MC/Disassembler/Mips/msa/test_3r.txt new file mode 100644 index 0000000..2ef3a89 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_3r.txt @@ -0,0 +1,244 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x78 0x04 0x4e 0x90 # CHECK: add_a.b $w26, $w9, $w4 +0x78 0x3f 0xdd 0xd0 # CHECK: add_a.h $w23, $w27, $w31 +0x78 0x56 0x32 0xd0 # CHECK: add_a.w $w11, $w6, $w22 +0x78 0x60 0x51 0x90 # CHECK: add_a.d $w6, $w10, $w0 +0x78 0x93 0xc4 0xd0 # CHECK: adds_a.b $w19, $w24, $w19 +0x78 0xa4 0x36 0x50 # CHECK: adds_a.h $w25, $w6, $w4 +0x78 0xdb 0x8e 0x50 # CHECK: adds_a.w $w25, $w17, $w27 +0x78 0xfa 0x93 0xd0 # CHECK: adds_a.d $w15, $w18, $w26 +0x79 0x13 0x5f 0x50 # CHECK: adds_s.b $w29, $w11, $w19 +0x79 0x3a 0xb9 0x50 # CHECK: adds_s.h $w5, $w23, $w26 +0x79 0x4d 0x74 0x10 # CHECK: adds_s.w $w16, $w14, $w13 +0x79 0x7c 0x70 0x90 # CHECK: adds_s.d $w2, $w14, $w28 +0x79 0x8e 0x88 0xd0 # CHECK: adds_u.b $w3, $w17, $w14 +0x79 0xa4 0xf2 0x90 # CHECK: adds_u.h $w10, $w30, $w4 +0x79 0xd4 0x93 0xd0 # CHECK: adds_u.w $w15, $w18, $w20 +0x79 0xe9 0x57 0x90 # CHECK: adds_u.d $w30, $w10, $w9 +0x78 0x15 0xa6 0x0e # CHECK: addv.b $w24, $w20, $w21 +0x78 0x3b 0x69 0x0e # CHECK: addv.h $w4, $w13, $w27 +0x78 0x4e 0x5c 0xce # CHECK: addv.w $w19, $w11, $w14 +0x78 0x7f 0xa8 0x8e # CHECK: addv.d $w2, $w21, $w31 +0x7a 0x03 0x85 0xd1 # CHECK: asub_s.b $w23, $w16, $w3 +0x7a 0x39 0x8d 0x91 # CHECK: asub_s.h $w22, $w17, $w25 +0x7a 0x49 0x0e 0x11 # CHECK: asub_s.w $w24, $w1, $w9 +0x7a 0x6c 0x63 0x51 # CHECK: asub_s.d $w13, $w12, $w12 +0x7a 0x8b 0xea 0x91 # CHECK: asub_u.b $w10, $w29, $w11 +0x7a 0xaf 0x4c 0x91 # CHECK: asub_u.h $w18, $w9, $w15 +0x7a 0xdf 0x9a 0x91 # CHECK: asub_u.w $w10, $w19, $w31 +0x7a 0xe0 0x54 0x51 # CHECK: asub_u.d $w17, $w10, $w0 +0x7a 0x01 0x28 0x90 # CHECK: ave_s.b $w2, $w5, $w1 +0x7a 0x29 0x9c 0x10 # CHECK: ave_s.h $w16, $w19, $w9 +0x7a 0x45 0xfc 0x50 # CHECK: ave_s.w $w17, $w31, $w5 +0x7a 0x6a 0xce 0xd0 # CHECK: ave_s.d $w27, $w25, $w10 +0x7a 0x89 0x9c 0x10 # CHECK: ave_u.b $w16, $w19, $w9 +0x7a 0xab 0xe7 0x10 # CHECK: ave_u.h $w28, $w28, $w11 +0x7a 0xcb 0x62 0xd0 # CHECK: ave_u.w $w11, $w12, $w11 +0x7a 0xfc 0x9f 0x90 # CHECK: ave_u.d $w30, $w19, $w28 +0x7b 0x02 0x86 0x90 # CHECK: aver_s.b $w26, $w16, $w2 +0x7b 0x3b 0xdf 0xd0 # CHECK: aver_s.h $w31, $w27, $w27 +0x7b 0x59 0x97 0x10 # CHECK: aver_s.w $w28, $w18, $w25 +0x7b 0x7b 0xaf 0x50 # CHECK: aver_s.d $w29, $w21, $w27 +0x7b 0x83 0xd7 0x50 # CHECK: aver_u.b $w29, $w26, $w3 +0x7b 0xa9 0x94 0x90 # CHECK: aver_u.h $w18, $w18, $w9 +0x7b 0xdd 0xcc 0x50 # CHECK: aver_u.w $w17, $w25, $w29 +0x7b 0xf3 0xb5 0x90 # CHECK: aver_u.d $w22, $w22, $w19 +0x79 0x9d 0x78 0x8d # CHECK: bclr.b $w2, $w15, $w29 +0x79 0xbc 0xac 0x0d # CHECK: bclr.h $w16, $w21, $w28 +0x79 0xc9 0x14 0xcd # CHECK: bclr.w $w19, $w2, $w9 +0x79 0xe4 0xfe 0xcd # CHECK: bclr.d $w27, $w31, $w4 +0x7b 0x18 0x81 0x4d # CHECK: binsl.b $w5, $w16, $w24 +0x7b 0x2a 0x2f 0x8d # CHECK: binsl.h $w30, $w5, $w10 +0x7b 0x4d 0x7b 0x8d # CHECK: binsl.w $w14, $w15, $w13 +0x7b 0x6c 0xa5 0xcd # CHECK: binsl.d $w23, $w20, $w12 +0x7b 0x82 0x5d 0x8d # CHECK: binsr.b $w22, $w11, $w2 +0x7b 0xa6 0xd0 0x0d # CHECK: binsr.h $w0, $w26, $w6 +0x7b 0xdc 0x1e 0x8d # CHECK: binsr.w $w26, $w3, $w28 +0x7b 0xf5 0x00 0x0d # CHECK: binsr.d $w0, $w0, $w21 +0x7a 0x98 0x58 0x0d # CHECK: bneg.b $w0, $w11, $w24 +0x7a 0xa4 0x87 0x0d # CHECK: bneg.h $w28, $w16, $w4 +0x7a 0xd3 0xd0 0xcd # CHECK: bneg.w $w3, $w26, $w19 +0x7a 0xef 0xeb 0x4d # CHECK: bneg.d $w13, $w29, $w15 +0x7a 0x1f 0x2f 0xcd # CHECK: bset.b $w31, $w5, $w31 +0x7a 0x26 0x63 0x8d # CHECK: bset.h $w14, $w12, $w6 +0x7a 0x4c 0x4f 0xcd # CHECK: bset.w $w31, $w9, $w12 +0x7a 0x65 0xb1 0x4d # CHECK: bset.d $w5, $w22, $w5 +0x78 0x12 0xff 0xcf # CHECK: ceq.b $w31, $w31, $w18 +0x78 0x29 0xda 0x8f # CHECK: ceq.h $w10, $w27, $w9 +0x78 0x4e 0x2a 0x4f # CHECK: ceq.w $w9, $w5, $w14 +0x78 0x60 0x89 0x4f # CHECK: ceq.d $w5, $w17, $w0 +0x7a 0x09 0x25 0xcf # CHECK: cle_s.b $w23, $w4, $w9 +0x7a 0x33 0xdd 0x8f # CHECK: cle_s.h $w22, $w27, $w19 +0x7a 0x4a 0xd7 0x8f # CHECK: cle_s.w $w30, $w26, $w10 +0x7a 0x6a 0x2c 0x8f # CHECK: cle_s.d $w18, $w5, $w10 +0x7a 0x80 0xc8 0x4f # CHECK: cle_u.b $w1, $w25, $w0 +0x7a 0xbd 0x01 0xcf # CHECK: cle_u.h $w7, $w0, $w29 +0x7a 0xc1 0x96 0x4f # CHECK: cle_u.w $w25, $w18, $w1 +0x7a 0xfe 0x01 0x8f # CHECK: cle_u.d $w6, $w0, $w30 +0x79 0x15 0x16 0x4f # CHECK: clt_s.b $w25, $w2, $w21 +0x79 0x29 0x98 0x8f # CHECK: clt_s.h $w2, $w19, $w9 +0x79 0x50 0x45 0xcf # CHECK: clt_s.w $w23, $w8, $w16 +0x79 0x6c 0xf1 0xcf # CHECK: clt_s.d $w7, $w30, $w12 +0x79 0x8d 0xf8 0x8f # CHECK: clt_u.b $w2, $w31, $w13 +0x79 0xb7 0xfc 0x0f # CHECK: clt_u.h $w16, $w31, $w23 +0x79 0xc9 0xc0 0xcf # CHECK: clt_u.w $w3, $w24, $w9 +0x79 0xe1 0x01 0xcf # CHECK: clt_u.d $w7, $w0, $w1 +0x7a 0x12 0x1f 0x52 # CHECK: div_s.b $w29, $w3, $w18 +0x7a 0x2d 0x84 0x52 # CHECK: div_s.h $w17, $w16, $w13 +0x7a 0x5e 0xc9 0x12 # CHECK: div_s.w $w4, $w25, $w30 +0x7a 0x74 0x4f 0xd2 # CHECK: div_s.d $w31, $w9, $w20 +0x7a 0x8a 0xe9 0x92 # CHECK: div_u.b $w6, $w29, $w10 +0x7a 0xae 0xae 0x12 # CHECK: div_u.h $w24, $w21, $w14 +0x7a 0xd9 0x77 0x52 # CHECK: div_u.w $w29, $w14, $w25 +0x7a 0xf5 0x0f 0xd2 # CHECK: div_u.d $w31, $w1, $w21 +0x78 0x39 0xb5 0xd3 # CHECK: dotp_s.h $w23, $w22, $w25 +0x78 0x45 0x75 0x13 # CHECK: dotp_s.w $w20, $w14, $w5 +0x78 0x76 0x14 0x53 # CHECK: dotp_s.d $w17, $w2, $w22 +0x78 0xa6 0x13 0x53 # CHECK: dotp_u.h $w13, $w2, $w6 +0x78 0xd5 0xb3 0xd3 # CHECK: dotp_u.w $w15, $w22, $w21 +0x78 0xfa 0x81 0x13 # CHECK: dotp_u.d $w4, $w16, $w26 +0x79 0x36 0xe0 0x53 # CHECK: dpadd_s.h $w1, $w28, $w22 +0x79 0x4c 0x0a 0x93 # CHECK: dpadd_s.w $w10, $w1, $w12 +0x79 0x7b 0xa8 0xd3 # CHECK: dpadd_s.d $w3, $w21, $w27 +0x79 0xb4 0x2c 0x53 # CHECK: dpadd_u.h $w17, $w5, $w20 +0x79 0xd0 0x46 0x13 # CHECK: dpadd_u.w $w24, $w8, $w16 +0x79 0xf0 0xeb 0xd3 # CHECK: dpadd_u.d $w15, $w29, $w16 +0x7a 0x2c 0x59 0x13 # CHECK: dpsub_s.h $w4, $w11, $w12 +0x7a 0x46 0x39 0x13 # CHECK: dpsub_s.w $w4, $w7, $w6 +0x7a 0x7c 0x67 0xd3 # CHECK: dpsub_s.d $w31, $w12, $w28 +0x7a 0xb1 0xc9 0x13 # CHECK: dpsub_u.h $w4, $w25, $w17 +0x7a 0xd0 0xcc 0xd3 # CHECK: dpsub_u.w $w19, $w25, $w16 +0x7a 0xfa 0x51 0xd3 # CHECK: dpsub_u.d $w7, $w10, $w26 +0x7a 0x22 0xc7 0x15 # CHECK: hadd_s.h $w28, $w24, $w2 +0x7a 0x4b 0x8e 0x15 # CHECK: hadd_s.w $w24, $w17, $w11 +0x7a 0x74 0x7c 0x55 # CHECK: hadd_s.d $w17, $w15, $w20 +0x7a 0xb1 0xeb 0x15 # CHECK: hadd_u.h $w12, $w29, $w17 +0x7a 0xc6 0x2a 0x55 # CHECK: hadd_u.w $w9, $w5, $w6 +0x7a 0xe6 0xa0 0x55 # CHECK: hadd_u.d $w1, $w20, $w6 +0x7b 0x3d 0x74 0x15 # CHECK: hsub_s.h $w16, $w14, $w29 +0x7b 0x4b 0x6a 0x55 # CHECK: hsub_s.w $w9, $w13, $w11 +0x7b 0x6e 0x97 0x95 # CHECK: hsub_s.d $w30, $w18, $w14 +0x7b 0xae 0x61 0xd5 # CHECK: hsub_u.h $w7, $w12, $w14 +0x7b 0xc5 0x2d 0x55 # CHECK: hsub_u.w $w21, $w5, $w5 +0x7b 0xff 0x62 0xd5 # CHECK: hsub_u.d $w11, $w12, $w31 +0x7b 0x1e 0x84 0x94 # CHECK: ilvev.b $w18, $w16, $w30 +0x7b 0x2d 0x03 0x94 # CHECK: ilvev.h $w14, $w0, $w13 +0x7b 0x56 0xcb 0x14 # CHECK: ilvev.w $w12, $w25, $w22 +0x7b 0x63 0xdf 0x94 # CHECK: ilvev.d $w30, $w27, $w3 +0x7a 0x15 0x1f 0x54 # CHECK: ilvl.b $w29, $w3, $w21 +0x7a 0x31 0x56 0xd4 # CHECK: ilvl.h $w27, $w10, $w17 +0x7a 0x40 0x09 0x94 # CHECK: ilvl.w $w6, $w1, $w0 +0x7a 0x78 0x80 0xd4 # CHECK: ilvl.d $w3, $w16, $w24 +0x7b 0x94 0x2a 0xd4 # CHECK: ilvod.b $w11, $w5, $w20 +0x7b 0xbf 0x6c 0x94 # CHECK: ilvod.h $w18, $w13, $w31 +0x7b 0xd8 0x87 0x54 # CHECK: ilvod.w $w29, $w16, $w24 +0x7b 0xfd 0x65 0x94 # CHECK: ilvod.d $w22, $w12, $w29 +0x7a 0x86 0xf1 0x14 # CHECK: ilvr.b $w4, $w30, $w6 +0x7a 0xbd 0x9f 0x14 # CHECK: ilvr.h $w28, $w19, $w29 +0x7a 0xd5 0xa4 0x94 # CHECK: ilvr.w $w18, $w20, $w21 +0x7a 0xec 0xf5 0xd4 # CHECK: ilvr.d $w23, $w30, $w12 +0x78 0x9d 0xfc 0x52 # CHECK: maddv.b $w17, $w31, $w29 +0x78 0xa9 0xc1 0xd2 # CHECK: maddv.h $w7, $w24, $w9 +0x78 0xd4 0xb5 0x92 # CHECK: maddv.w $w22, $w22, $w20 +0x78 0xf4 0xd7 0x92 # CHECK: maddv.d $w30, $w26, $w20 +0x7b 0x17 0x5d 0xce # CHECK: max_a.b $w23, $w11, $w23 +0x7b 0x3e 0x2d 0x0e # CHECK: max_a.h $w20, $w5, $w30 +0x7b 0x5e 0x91 0xce # CHECK: max_a.w $w7, $w18, $w30 +0x7b 0x7f 0x42 0x0e # CHECK: max_a.d $w8, $w8, $w31 +0x79 0x13 0x0a 0x8e # CHECK: max_s.b $w10, $w1, $w19 +0x79 0x31 0xeb 0xce # CHECK: max_s.h $w15, $w29, $w17 +0x79 0x4e 0xeb 0xce # CHECK: max_s.w $w15, $w29, $w14 +0x79 0x63 0xc6 0x4e # CHECK: max_s.d $w25, $w24, $w3 +0x79 0x85 0xc3 0x0e # CHECK: max_u.b $w12, $w24, $w5 +0x79 0xa7 0x31 0x4e # CHECK: max_u.h $w5, $w6, $w7 +0x79 0xc7 0x24 0x0e # CHECK: max_u.w $w16, $w4, $w7 +0x79 0xf8 0x66 0x8e # CHECK: max_u.d $w26, $w12, $w24 +0x7b 0x81 0xd1 0x0e # CHECK: min_a.b $w4, $w26, $w1 +0x7b 0xbf 0x6b 0x0e # CHECK: min_a.h $w12, $w13, $w31 +0x7b 0xc0 0xa7 0x0e # CHECK: min_a.w $w28, $w20, $w0 +0x7b 0xf3 0xa3 0x0e # CHECK: min_a.d $w12, $w20, $w19 +0x7a 0x0e 0x1c 0xce # CHECK: min_s.b $w19, $w3, $w14 +0x7a 0x28 0xae 0xce # CHECK: min_s.h $w27, $w21, $w8 +0x7a 0x5e 0x70 0x0e # CHECK: min_s.w $w0, $w14, $w30 +0x7a 0x75 0x41 0x8e # CHECK: min_s.d $w6, $w8, $w21 +0x7a 0x88 0xd5 0x8e # CHECK: min_u.b $w22, $w26, $w8 +0x7a 0xac 0xd9 0xce # CHECK: min_u.h $w7, $w27, $w12 +0x7a 0xce 0xa2 0x0e # CHECK: min_u.w $w8, $w20, $w14 +0x7a 0xef 0x76 0x8e # CHECK: min_u.d $w26, $w14, $w15 +0x7b 0x1a 0x0c 0x92 # CHECK: mod_s.b $w18, $w1, $w26 +0x7b 0x3c 0xf7 0xd2 # CHECK: mod_s.h $w31, $w30, $w28 +0x7b 0x4d 0x30 0x92 # CHECK: mod_s.w $w2, $w6, $w13 +0x7b 0x76 0xdd 0x52 # CHECK: mod_s.d $w21, $w27, $w22 +0x7b 0x8d 0x3c 0x12 # CHECK: mod_u.b $w16, $w7, $w13 +0x7b 0xa7 0x46 0x12 # CHECK: mod_u.h $w24, $w8, $w7 +0x7b 0xd1 0x17 0x92 # CHECK: mod_u.w $w30, $w2, $w17 +0x7b 0xf9 0x17 0xd2 # CHECK: mod_u.d $w31, $w2, $w25 +0x79 0x0c 0x2b 0x92 # CHECK: msubv.b $w14, $w5, $w12 +0x79 0x3e 0x39 0x92 # CHECK: msubv.h $w6, $w7, $w30 +0x79 0x55 0x13 0x52 # CHECK: msubv.w $w13, $w2, $w21 +0x79 0x7b 0x74 0x12 # CHECK: msubv.d $w16, $w14, $w27 +0x78 0x0d 0x1d 0x12 # CHECK: mulv.b $w20, $w3, $w13 +0x78 0x2e 0xd6 0xd2 # CHECK: mulv.h $w27, $w26, $w14 +0x78 0x43 0xea 0x92 # CHECK: mulv.w $w10, $w29, $w3 +0x78 0x7d 0x99 0xd2 # CHECK: mulv.d $w7, $w19, $w29 +0x79 0x07 0xd9 0x54 # CHECK: pckev.b $w5, $w27, $w7 +0x79 0x3b 0x20 0x54 # CHECK: pckev.h $w1, $w4, $w27 +0x79 0x40 0xa7 0x94 # CHECK: pckev.w $w30, $w20, $w0 +0x79 0x6f 0x09 0x94 # CHECK: pckev.d $w6, $w1, $w15 +0x79 0x9e 0xe4 0x94 # CHECK: pckod.b $w18, $w28, $w30 +0x79 0xa8 0x2e 0x94 # CHECK: pckod.h $w26, $w5, $w8 +0x79 0xc2 0x22 0x54 # CHECK: pckod.w $w9, $w4, $w2 +0x79 0xf4 0xb7 0x94 # CHECK: pckod.d $w30, $w22, $w20 +0x78 0x0c 0xb9 0x54 # CHECK: sld.b $w5, $w23[$12] +0x78 0x23 0xb8 0x54 # CHECK: sld.h $w1, $w23[$3] +0x78 0x49 0x45 0x14 # CHECK: sld.w $w20, $w8[$9] +0x78 0x7e 0xb9 0xd4 # CHECK: sld.d $w7, $w23[$fp] +0x78 0x11 0x00 0xcd # CHECK: sll.b $w3, $w0, $w17 +0x78 0x23 0xdc 0x4d # CHECK: sll.h $w17, $w27, $w3 +0x78 0x46 0x3c 0x0d # CHECK: sll.w $w16, $w7, $w6 +0x78 0x7a 0x02 0x4d # CHECK: sll.d $w9, $w0, $w26 +0x78 0x81 0x0f 0x14 # CHECK: splat.b $w28, $w1[$1] +0x78 0xab 0x58 0x94 # CHECK: splat.h $w2, $w11[$11] +0x78 0xcb 0x05 0x94 # CHECK: splat.w $w22, $w0[$11] +0x78 0xe2 0x00 0x14 # CHECK: splat.d $w0, $w0[$2] +0x78 0x91 0x27 0x0d # CHECK: sra.b $w28, $w4, $w17 +0x78 0xa3 0x4b 0x4d # CHECK: sra.h $w13, $w9, $w3 +0x78 0xd3 0xae 0xcd # CHECK: sra.w $w27, $w21, $w19 +0x78 0xf7 0x47 0x8d # CHECK: sra.d $w30, $w8, $w23 +0x78 0x92 0x94 0xd5 # CHECK: srar.b $w19, $w18, $w18 +0x78 0xa8 0xb9 0xd5 # CHECK: srar.h $w7, $w23, $w8 +0x78 0xc2 0x60 0x55 # CHECK: srar.w $w1, $w12, $w2 +0x78 0xee 0x3d 0x55 # CHECK: srar.d $w21, $w7, $w14 +0x79 0x13 0x1b 0x0d # CHECK: srl.b $w12, $w3, $w19 +0x79 0x34 0xfd 0xcd # CHECK: srl.h $w23, $w31, $w20 +0x79 0x4b 0xdc 0x8d # CHECK: srl.w $w18, $w27, $w11 +0x79 0x7a 0x60 0xcd # CHECK: srl.d $w3, $w12, $w26 +0x79 0x0b 0xab 0xd5 # CHECK: srlr.b $w15, $w21, $w11 +0x79 0x33 0x6d 0x55 # CHECK: srlr.h $w21, $w13, $w19 +0x79 0x43 0xf1 0x95 # CHECK: srlr.w $w6, $w30, $w3 +0x79 0x6e 0x10 0x55 # CHECK: srlr.d $w1, $w2, $w14 +0x78 0x01 0x7e 0x51 # CHECK: subs_s.b $w25, $w15, $w1 +0x78 0x36 0xcf 0x11 # CHECK: subs_s.h $w28, $w25, $w22 +0x78 0x55 0x62 0x91 # CHECK: subs_s.w $w10, $w12, $w21 +0x78 0x72 0xa1 0x11 # CHECK: subs_s.d $w4, $w20, $w18 +0x78 0x99 0x35 0x51 # CHECK: subs_u.b $w21, $w6, $w25 +0x78 0xa7 0x50 0xd1 # CHECK: subs_u.h $w3, $w10, $w7 +0x78 0xca 0x7a 0x51 # CHECK: subs_u.w $w9, $w15, $w10 +0x78 0xea 0x99 0xd1 # CHECK: subs_u.d $w7, $w19, $w10 +0x79 0x0c 0x39 0x91 # CHECK: subsus_u.b $w6, $w7, $w12 +0x79 0x33 0xe9 0x91 # CHECK: subsus_u.h $w6, $w29, $w19 +0x79 0x47 0x79 0xd1 # CHECK: subsus_u.w $w7, $w15, $w7 +0x79 0x6f 0x1a 0x51 # CHECK: subsus_u.d $w9, $w3, $w15 +0x79 0x9f 0x1d 0x91 # CHECK: subsuu_s.b $w22, $w3, $w31 +0x79 0xb6 0xbc 0xd1 # CHECK: subsuu_s.h $w19, $w23, $w22 +0x79 0xcd 0x52 0x51 # CHECK: subsuu_s.w $w9, $w10, $w13 +0x79 0xe0 0x31 0x51 # CHECK: subsuu_s.d $w5, $w6, $w0 +0x78 0x93 0x69 0x8e # CHECK: subv.b $w6, $w13, $w19 +0x78 0xac 0xc9 0x0e # CHECK: subv.h $w4, $w25, $w12 +0x78 0xcb 0xde 0xce # CHECK: subv.w $w27, $w27, $w11 +0x78 0xea 0xc2 0x4e # CHECK: subv.d $w9, $w24, $w10 +0x78 0x05 0x80 0xd5 # CHECK: vshf.b $w3, $w16, $w5 +0x78 0x28 0x9d 0x15 # CHECK: vshf.h $w20, $w19, $w8 +0x78 0x59 0xf4 0x15 # CHECK: vshf.w $w16, $w30, $w25 +0x78 0x6f 0x5c 0xd5 # CHECK: vshf.d $w19, $w11, $w15 diff --git a/test/MC/Disassembler/Mips/msa/test_3rf.txt b/test/MC/Disassembler/Mips/msa/test_3rf.txt new file mode 100644 index 0000000..3b7b07c --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_3rf.txt @@ -0,0 +1,84 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x78 0x1c 0x9f 0x1b # CHECK: fadd.w $w28, $w19, $w28 +0x78 0x3d 0x13 0x5b # CHECK: fadd.d $w13, $w2, $w29 +0x78 0x19 0x5b 0x9a # CHECK: fcaf.w $w14, $w11, $w25 +0x78 0x33 0x08 0x5a # CHECK: fcaf.d $w1, $w1, $w19 +0x78 0x90 0xb8 0x5a # CHECK: fceq.w $w1, $w23, $w16 +0x78 0xb0 0x40 0x1a # CHECK: fceq.d $w0, $w8, $w16 +0x79 0x98 0x4c 0x1a # CHECK: fcle.w $w16, $w9, $w24 +0x79 0xa1 0x76 0xda # CHECK: fcle.d $w27, $w14, $w1 +0x79 0x08 0x47 0x1a # CHECK: fclt.w $w28, $w8, $w8 +0x79 0x2b 0xcf 0x9a # CHECK: fclt.d $w30, $w25, $w11 +0x78 0xd7 0x90 0x9c # CHECK: fcne.w $w2, $w18, $w23 +0x78 0xef 0xa3 0x9c # CHECK: fcne.d $w14, $w20, $w15 +0x78 0x59 0x92 0x9c # CHECK: fcor.w $w10, $w18, $w25 +0x78 0x6b 0xcc 0x5c # CHECK: fcor.d $w17, $w25, $w11 +0x78 0xd5 0x13 0x9a # CHECK: fcueq.w $w14, $w2, $w21 +0x78 0xe7 0x1f 0x5a # CHECK: fcueq.d $w29, $w3, $w7 +0x79 0xc3 0x2c 0x5a # CHECK: fcule.w $w17, $w5, $w3 +0x79 0xfe 0x0f 0xda # CHECK: fcule.d $w31, $w1, $w30 +0x79 0x49 0xc9 0x9a # CHECK: fcult.w $w6, $w25, $w9 +0x79 0x71 0x46 0xda # CHECK: fcult.d $w27, $w8, $w17 +0x78 0x48 0xa1 0x1a # CHECK: fcun.w $w4, $w20, $w8 +0x78 0x63 0x5f 0x5a # CHECK: fcun.d $w29, $w11, $w3 +0x78 0x93 0x93 0x5c # CHECK: fcune.w $w13, $w18, $w19 +0x78 0xb5 0xd4 0x1c # CHECK: fcune.d $w16, $w26, $w21 +0x78 0xc2 0xc3 0x5b # CHECK: fdiv.w $w13, $w24, $w2 +0x78 0xf9 0x24 0xdb # CHECK: fdiv.d $w19, $w4, $w25 +0x7a 0x10 0x02 0x1b # CHECK: fexdo.h $w8, $w0, $w16 +0x7a 0x3b 0x68 0x1b # CHECK: fexdo.w $w0, $w13, $w27 +0x79 0xc3 0x04 0x5b # CHECK: fexp2.w $w17, $w0, $w3 +0x79 0xea 0x05 0x9b # CHECK: fexp2.d $w22, $w0, $w10 +0x79 0x17 0x37 0x5b # CHECK: fmadd.w $w29, $w6, $w23 +0x79 0x35 0xe2 0xdb # CHECK: fmadd.d $w11, $w28, $w21 +0x7b 0x8d 0xb8 0x1b # CHECK: fmax.w $w0, $w23, $w13 +0x7b 0xa8 0x96 0x9b # CHECK: fmax.d $w26, $w18, $w8 +0x7b 0xca 0x82 0x9b # CHECK: fmax_a.w $w10, $w16, $w10 +0x7b 0xf6 0x4f 0x9b # CHECK: fmax_a.d $w30, $w9, $w22 +0x7b 0x1e 0x0e 0x1b # CHECK: fmin.w $w24, $w1, $w30 +0x7b 0x2a 0xde 0xdb # CHECK: fmin.d $w27, $w27, $w10 +0x7b 0x54 0xea 0x9b # CHECK: fmin_a.w $w10, $w29, $w20 +0x7b 0x78 0xf3 0x5b # CHECK: fmin_a.d $w13, $w30, $w24 +0x79 0x40 0xcc 0x5b # CHECK: fmsub.w $w17, $w25, $w0 +0x79 0x70 0x92 0x1b # CHECK: fmsub.d $w8, $w18, $w16 +0x78 0x8f 0x78 0xdb # CHECK: fmul.w $w3, $w15, $w15 +0x78 0xaa 0xf2 0x5b # CHECK: fmul.d $w9, $w30, $w10 +0x7a 0x0a 0x2e 0x5a # CHECK: fsaf.w $w25, $w5, $w10 +0x7a 0x3d 0x1e 0x5a # CHECK: fsaf.d $w25, $w3, $w29 +0x7a 0x8d 0x8a 0xda # CHECK: fseq.w $w11, $w17, $w13 +0x7a 0xbf 0x07 0x5a # CHECK: fseq.d $w29, $w0, $w31 +0x7b 0x9f 0xff 0x9a # CHECK: fsle.w $w30, $w31, $w31 +0x7b 0xb8 0xbc 0x9a # CHECK: fsle.d $w18, $w23, $w24 +0x7b 0x06 0x2b 0x1a # CHECK: fslt.w $w12, $w5, $w6 +0x7b 0x35 0xd4 0x1a # CHECK: fslt.d $w16, $w26, $w21 +0x7a 0xcc 0x0f 0x9c # CHECK: fsne.w $w30, $w1, $w12 +0x7a 0xf7 0x6b 0x9c # CHECK: fsne.d $w14, $w13, $w23 +0x7a 0x5b 0x6e 0xdc # CHECK: fsor.w $w27, $w13, $w27 +0x7a 0x6b 0xc3 0x1c # CHECK: fsor.d $w12, $w24, $w11 +0x78 0x41 0xd7 0xdb # CHECK: fsub.w $w31, $w26, $w1 +0x78 0x7b 0x8c 0xdb # CHECK: fsub.d $w19, $w17, $w27 +0x7a 0xd9 0xc4 0x1a # CHECK: fsueq.w $w16, $w24, $w25 +0x7a 0xee 0x74 0x9a # CHECK: fsueq.d $w18, $w14, $w14 +0x7b 0xcd 0xf5 0xda # CHECK: fsule.w $w23, $w30, $w13 +0x7b 0xfa 0x58 0x9a # CHECK: fsule.d $w2, $w11, $w26 +0x7b 0x56 0xd2 0xda # CHECK: fsult.w $w11, $w26, $w22 +0x7b 0x7e 0xb9 0x9a # CHECK: fsult.d $w6, $w23, $w30 +0x7a 0x5c 0x90 0xda # CHECK: fsun.w $w3, $w18, $w28 +0x7a 0x73 0x5c 0x9a # CHECK: fsun.d $w18, $w11, $w19 +0x7a 0x82 0xfc 0x1c # CHECK: fsune.w $w16, $w31, $w2 +0x7a 0xb1 0xd0 0xdc # CHECK: fsune.d $w3, $w26, $w17 +0x7a 0x98 0x24 0x1b # CHECK: ftq.h $w16, $w4, $w24 +0x7a 0xb9 0x29 0x5b # CHECK: ftq.w $w5, $w5, $w25 +0x79 0x4a 0xa4 0x1c # CHECK: madd_q.h $w16, $w20, $w10 +0x79 0x69 0x17 0x1c # CHECK: madd_q.w $w28, $w2, $w9 +0x7b 0x49 0x92 0x1c # CHECK: maddr_q.h $w8, $w18, $w9 +0x7b 0x70 0x67 0x5c # CHECK: maddr_q.w $w29, $w12, $w16 +0x79 0x8a 0xd6 0x1c # CHECK: msub_q.h $w24, $w26, $w10 +0x79 0xbc 0xf3 0x5c # CHECK: msub_q.w $w13, $w30, $w28 +0x7b 0x8b 0xab 0x1c # CHECK: msubr_q.h $w12, $w21, $w11 +0x7b 0xb4 0x70 0x5c # CHECK: msubr_q.w $w1, $w14, $w20 +0x79 0x1e 0x81 0x9c # CHECK: mul_q.h $w6, $w16, $w30 +0x79 0x24 0x0c 0x1c # CHECK: mul_q.w $w16, $w1, $w4 +0x7b 0x13 0xa1 0x9c # CHECK: mulr_q.h $w6, $w20, $w19 +0x7b 0x34 0x0e 0xdc # CHECK: mulr_q.w $w27, $w1, $w20 diff --git a/test/MC/Disassembler/Mips/msa/test_bit.txt b/test/MC/Disassembler/Mips/msa/test_bit.txt new file mode 100644 index 0000000..422d71e --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_bit.txt @@ -0,0 +1,50 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x79 0xf2 0xf5 0x49 # CHECK: bclri.b $w21, $w30, 2 +0x79 0xe0 0xae 0x09 # CHECK: bclri.h $w24, $w21, 0 +0x79 0xc3 0xf5 0xc9 # CHECK: bclri.w $w23, $w30, 3 +0x79 0x80 0x5a 0x49 # CHECK: bclri.d $w9, $w11, 0 +0x7b 0x71 0x66 0x49 # CHECK: binsli.b $w25, $w12, 1 +0x7b 0x60 0xb5 0x49 # CHECK: binsli.h $w21, $w22, 0 +0x7b 0x40 0x25 0x89 # CHECK: binsli.w $w22, $w4, 0 +0x7b 0x06 0x11 0x89 # CHECK: binsli.d $w6, $w2, 6 +0x7b 0xf0 0x9b 0xc9 # CHECK: binsri.b $w15, $w19, 0 +0x7b 0xe1 0xf2 0x09 # CHECK: binsri.h $w8, $w30, 1 +0x7b 0xc5 0x98 0x89 # CHECK: binsri.w $w2, $w19, 5 +0x7b 0x81 0xa4 0x89 # CHECK: binsri.d $w18, $w20, 1 +0x7a 0xf0 0x9e 0x09 # CHECK: bnegi.b $w24, $w19, 0 +0x7a 0xe3 0x5f 0x09 # CHECK: bnegi.h $w28, $w11, 3 +0x7a 0xc5 0xd8 0x49 # CHECK: bnegi.w $w1, $w27, 5 +0x7a 0x81 0xa9 0x09 # CHECK: bnegi.d $w4, $w21, 1 +0x7a 0x70 0x44 0x89 # CHECK: bseti.b $w18, $w8, 0 +0x7a 0x62 0x76 0x09 # CHECK: bseti.h $w24, $w14, 2 +0x7a 0x44 0x92 0x49 # CHECK: bseti.w $w9, $w18, 4 +0x7a 0x01 0x79 0xc9 # CHECK: bseti.d $w7, $w15, 1 +0x78 0x72 0xff 0xca # CHECK: sat_s.b $w31, $w31, 2 +0x78 0x60 0x9c 0xca # CHECK: sat_s.h $w19, $w19, 0 +0x78 0x40 0xec 0xca # CHECK: sat_s.w $w19, $w29, 0 +0x78 0x00 0xb2 0xca # CHECK: sat_s.d $w11, $w22, 0 +0x78 0xf3 0x68 0x4a # CHECK: sat_u.b $w1, $w13, 3 +0x78 0xe4 0xc7 0x8a # CHECK: sat_u.h $w30, $w24, 4 +0x78 0xc0 0x6f 0xca # CHECK: sat_u.w $w31, $w13, 0 +0x78 0x85 0x87 0x4a # CHECK: sat_u.d $w29, $w16, 5 +0x78 0x71 0x55 0xc9 # CHECK: slli.b $w23, $w10, 1 +0x78 0x61 0x92 0x49 # CHECK: slli.h $w9, $w18, 1 +0x78 0x44 0xea 0xc9 # CHECK: slli.w $w11, $w29, 4 +0x78 0x01 0xa6 0x49 # CHECK: slli.d $w25, $w20, 1 +0x78 0xf1 0xee 0x09 # CHECK: srai.b $w24, $w29, 1 +0x78 0xe0 0x30 0x49 # CHECK: srai.h $w1, $w6, 0 +0x78 0xc1 0xd1 0xc9 # CHECK: srai.w $w7, $w26, 1 +0x78 0x83 0xcd 0x09 # CHECK: srai.d $w20, $w25, 3 +0x79 0x70 0xc9 0x4a # CHECK: srari.b $w5, $w25, 0 +0x79 0x64 0x31 0xca # CHECK: srari.h $w7, $w6, 4 +0x79 0x45 0x5c 0x4a # CHECK: srari.w $w17, $w11, 5 +0x79 0x05 0xcd 0x4a # CHECK: srari.d $w21, $w25, 5 +0x79 0x72 0x00 0x89 # CHECK: srli.b $w2, $w0, 2 +0x79 0x62 0xff 0xc9 # CHECK: srli.h $w31, $w31, 2 +0x79 0x44 0x49 0x49 # CHECK: srli.w $w5, $w9, 4 +0x79 0x05 0xd6 0xc9 # CHECK: srli.d $w27, $w26, 5 +0x79 0xf0 0x1c 0x8a # CHECK: srlri.b $w18, $w3, 0 +0x79 0xe3 0x10 0x4a # CHECK: srlri.h $w1, $w2, 3 +0x79 0xc2 0xb2 0xca # CHECK: srlri.w $w11, $w22, 2 +0x79 0x86 0x56 0x0a # CHECK: srlri.d $w24, $w10, 6 diff --git a/test/MC/Disassembler/Mips/msa/test_ctrlregs.txt b/test/MC/Disassembler/Mips/msa/test_ctrlregs.txt new file mode 100644 index 0000000..fb5b0be --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_ctrlregs.txt @@ -0,0 +1,35 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x78 0x7e 0x00 0x59 # CHECK: cfcmsa $1, $0 +0x78 0x7e 0x00 0x59 # CHECK: cfcmsa $1, $0 +0x78 0x7e 0x08 0x99 # CHECK: cfcmsa $2, $1 +0x78 0x7e 0x08 0x99 # CHECK: cfcmsa $2, $1 +0x78 0x7e 0x10 0xd9 # CHECK: cfcmsa $3, $2 +0x78 0x7e 0x10 0xd9 # CHECK: cfcmsa $3, $2 +0x78 0x7e 0x19 0x19 # CHECK: cfcmsa $4, $3 +0x78 0x7e 0x19 0x19 # CHECK: cfcmsa $4, $3 +0x78 0x7e 0x21 0x59 # CHECK: cfcmsa $5, $4 +0x78 0x7e 0x21 0x59 # CHECK: cfcmsa $5, $4 +0x78 0x7e 0x29 0x99 # CHECK: cfcmsa $6, $5 +0x78 0x7e 0x29 0x99 # CHECK: cfcmsa $6, $5 +0x78 0x7e 0x31 0xd9 # CHECK: cfcmsa $7, $6 +0x78 0x7e 0x31 0xd9 # CHECK: cfcmsa $7, $6 +0x78 0x7e 0x3a 0x19 # CHECK: cfcmsa $8, $7 +0x78 0x7e 0x3a 0x19 # CHECK: cfcmsa $8, $7 + +0x78 0x3e 0x08 0x19 # CHECK: ctcmsa $0, $1 +0x78 0x3e 0x08 0x19 # CHECK: ctcmsa $0, $1 +0x78 0x3e 0x10 0x59 # CHECK: ctcmsa $1, $2 +0x78 0x3e 0x10 0x59 # CHECK: ctcmsa $1, $2 +0x78 0x3e 0x18 0x99 # CHECK: ctcmsa $2, $3 +0x78 0x3e 0x18 0x99 # CHECK: ctcmsa $2, $3 +0x78 0x3e 0x20 0xd9 # CHECK: ctcmsa $3, $4 +0x78 0x3e 0x20 0xd9 # CHECK: ctcmsa $3, $4 +0x78 0x3e 0x29 0x19 # CHECK: ctcmsa $4, $5 +0x78 0x3e 0x29 0x19 # CHECK: ctcmsa $4, $5 +0x78 0x3e 0x31 0x59 # CHECK: ctcmsa $5, $6 +0x78 0x3e 0x31 0x59 # CHECK: ctcmsa $5, $6 +0x78 0x3e 0x39 0x99 # CHECK: ctcmsa $6, $7 +0x78 0x3e 0x39 0x99 # CHECK: ctcmsa $6, $7 +0x78 0x3e 0x41 0xd9 # CHECK: ctcmsa $7, $8 +0x78 0x3e 0x41 0xd9 # CHECK: ctcmsa $7, $8 diff --git a/test/MC/Disassembler/Mips/msa/test_dlsa.txt b/test/MC/Disassembler/Mips/msa/test_dlsa.txt new file mode 100644 index 0000000..2a1d90b --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_dlsa.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=+msa | FileCheck %s + +0x01 0x2a 0x40 0x15 # CHECK: dlsa $8, $9, $10, 1 +0x01 0x2a 0x40 0x55 # CHECK: dlsa $8, $9, $10, 2 +0x01 0x2a 0x40 0x95 # CHECK: dlsa $8, $9, $10, 3 +0x01 0x2a 0x40 0xd5 # CHECK: dlsa $8, $9, $10, 4 diff --git a/test/MC/Disassembler/Mips/msa/test_elm.txt b/test/MC/Disassembler/Mips/msa/test_elm.txt new file mode 100644 index 0000000..832587b --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_elm.txt @@ -0,0 +1,17 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x78 0x82 0x43 0x59 # CHECK: copy_s.b $13, $w8[2] +0x78 0xa0 0xc8 0x59 # CHECK: copy_s.h $1, $w25[0] +0x78 0xb1 0x2d 0x99 # CHECK: copy_s.w $22, $w5[1] +0x78 0xc4 0xa5 0x99 # CHECK: copy_u.b $22, $w20[4] +0x78 0xe0 0x25 0x19 # CHECK: copy_u.h $20, $w4[0] +0x78 0xf2 0x6f 0x99 # CHECK: copy_u.w $fp, $w13[2] +0x78 0x04 0xe8 0x19 # CHECK: sldi.b $w0, $w29[4] +0x78 0x20 0x8a 0x19 # CHECK: sldi.h $w8, $w17[0] +0x78 0x32 0xdd 0x19 # CHECK: sldi.w $w20, $w27[2] +0x78 0x38 0x61 0x19 # CHECK: sldi.d $w4, $w12[0] +0x78 0x42 0x1e 0x59 # CHECK: splati.b $w25, $w3[2] +0x78 0x61 0xe6 0x19 # CHECK: splati.h $w24, $w28[1] +0x78 0x70 0x93 0x59 # CHECK: splati.w $w13, $w18[0] +0x78 0x78 0x0f 0x19 # CHECK: splati.d $w28, $w1[0] +0x78 0xbe 0xc5 0xd9 # CHECK: move.v $w23, $w24 diff --git a/test/MC/Disassembler/Mips/msa/test_elm_insert.txt b/test/MC/Disassembler/Mips/msa/test_elm_insert.txt new file mode 100644 index 0000000..605d495 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_elm_insert.txt @@ -0,0 +1,5 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x79 0x03 0xed 0xd9 # CHECK: insert.b $w23[3], $sp +0x79 0x22 0x2d 0x19 # CHECK: insert.h $w20[2], $5 +0x79 0x32 0x7a 0x19 # CHECK: insert.w $w8[2], $15 diff --git a/test/MC/Disassembler/Mips/msa/test_elm_insert_msa64.txt b/test/MC/Disassembler/Mips/msa/test_elm_insert_msa64.txt new file mode 100644 index 0000000..62920f3 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_elm_insert_msa64.txt @@ -0,0 +1,3 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=+msa | FileCheck %s + +0x79 0x39 0xe8 0x59 # CHECK: insert.d $w1[1], $sp diff --git a/test/MC/Disassembler/Mips/msa/test_elm_insve.txt b/test/MC/Disassembler/Mips/msa/test_elm_insve.txt new file mode 100644 index 0000000..c5c3ba0 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_elm_insve.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x79 0x43 0x4e 0x59 # CHECK: insve.b $w25[3], $w9[0] +0x79 0x62 0x16 0x19 # CHECK: insve.h $w24[2], $w2[0] +0x79 0x72 0x68 0x19 # CHECK: insve.w $w0[2], $w13[0] +0x79 0x78 0x90 0xd9 # CHECK: insve.d $w3[0], $w18[0] diff --git a/test/MC/Disassembler/Mips/msa/test_elm_msa64.txt b/test/MC/Disassembler/Mips/msa/test_elm_msa64.txt new file mode 100644 index 0000000..70c831a --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_elm_msa64.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=+msa | FileCheck %s + +# CHECK: copy_s.d $19, $w31[0] +0x78 0xb8 0xfc 0xd9 +# CHECK: copy_u.d $18, $w29[1] +0x78 0xf9 0xec 0x99 diff --git a/test/MC/Disassembler/Mips/msa/test_i10.txt b/test/MC/Disassembler/Mips/msa/test_i10.txt new file mode 100644 index 0000000..ac95d88 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_i10.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+msa | FileCheck %s + +0x7b 0x06 0x32 0x07 # CHECK: ldi.b $w8, 198 +0x7b 0x29 0xcd 0x07 # CHECK: ldi.h $w20, 313 +0x7b 0x4f 0x66 0x07 # CHECK: ldi.w $w24, 492 +0x7b 0x7a 0x66 0xc7 # CHECK: ldi.d $w27, 844 diff --git a/test/MC/Disassembler/Mips/msa/test_i5.txt b/test/MC/Disassembler/Mips/msa/test_i5.txt new file mode 100644 index 0000000..bf5bc51 --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_i5.txt @@ -0,0 +1,46 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+msa | FileCheck %s + +0x78 0x1e 0xf8 0xc6 # CHECK: addvi.b $w3, $w31, 30 +0x78 0x3a 0x6e 0x06 # CHECK: addvi.h $w24, $w13, 26 +0x78 0x5a 0xa6 0x86 # CHECK: addvi.w $w26, $w20, 26 +0x78 0x75 0x0c 0x06 # CHECK: addvi.d $w16, $w1, 21 +0x78 0x18 0xae 0x07 # CHECK: ceqi.b $w24, $w21, 24 +0x78 0x22 0x7f 0xc7 # CHECK: ceqi.h $w31, $w15, 2 +0x78 0x5f 0x0b 0x07 # CHECK: ceqi.w $w12, $w1, 31 +0x78 0x67 0xb6 0x07 # CHECK: ceqi.d $w24, $w22, 7 +0x7a 0x01 0x83 0x07 # CHECK: clei_s.b $w12, $w16, 1 +0x7a 0x37 0x50 0x87 # CHECK: clei_s.h $w2, $w10, 23 +0x7a 0x56 0x59 0x07 # CHECK: clei_s.w $w4, $w11, 22 +0x7a 0x76 0xe8 0x07 # CHECK: clei_s.d $w0, $w29, 22 +0x7a 0x83 0x8d 0x47 # CHECK: clei_u.b $w21, $w17, 3 +0x7a 0xb1 0x3f 0x47 # CHECK: clei_u.h $w29, $w7, 17 +0x7a 0xc2 0x08 0x47 # CHECK: clei_u.w $w1, $w1, 2 +0x7a 0xfd 0xde 0xc7 # CHECK: clei_u.d $w27, $w27, 29 +0x79 0x19 0x6c 0xc7 # CHECK: clti_s.b $w19, $w13, 25 +0x79 0x34 0x53 0xc7 # CHECK: clti_s.h $w15, $w10, 20 +0x79 0x4b 0x63 0x07 # CHECK: clti_s.w $w12, $w12, 11 +0x79 0x71 0xa7 0x47 # CHECK: clti_s.d $w29, $w20, 17 +0x79 0x9d 0x4b 0x87 # CHECK: clti_u.b $w14, $w9, 29 +0x79 0xb9 0xce 0x07 # CHECK: clti_u.h $w24, $w25, 25 +0x79 0xd6 0x08 0x47 # CHECK: clti_u.w $w1, $w1, 22 +0x79 0xe1 0xcd 0x47 # CHECK: clti_u.d $w21, $w25, 1 +0x79 0x01 0xad 0x86 # CHECK: maxi_s.b $w22, $w21, 1 +0x79 0x38 0x2f 0x46 # CHECK: maxi_s.h $w29, $w5, 24 +0x79 0x54 0x50 0x46 # CHECK: maxi_s.w $w1, $w10, 20 +0x79 0x70 0xeb 0x46 # CHECK: maxi_s.d $w13, $w29, 16 +0x79 0x8c 0x05 0x06 # CHECK: maxi_u.b $w20, $w0, 12 +0x79 0xa3 0x70 0x46 # CHECK: maxi_u.h $w1, $w14, 3 +0x79 0xcb 0xb6 0xc6 # CHECK: maxi_u.w $w27, $w22, 11 +0x79 0xe4 0x36 0x86 # CHECK: maxi_u.d $w26, $w6, 4 +0x7a 0x01 0x09 0x06 # CHECK: mini_s.b $w4, $w1, 1 +0x7a 0x37 0xde 0xc6 # CHECK: mini_s.h $w27, $w27, 23 +0x7a 0x49 0x5f 0x06 # CHECK: mini_s.w $w28, $w11, 9 +0x7a 0x6a 0x52 0xc6 # CHECK: mini_s.d $w11, $w10, 10 +0x7a 0x9b 0xbc 0x86 # CHECK: mini_u.b $w18, $w23, 27 +0x7a 0xb2 0xd1 0xc6 # CHECK: mini_u.h $w7, $w26, 18 +0x7a 0xda 0x62 0xc6 # CHECK: mini_u.w $w11, $w12, 26 +0x7a 0xe2 0x7a 0xc6 # CHECK: mini_u.d $w11, $w15, 2 +0x78 0x93 0xa6 0x06 # CHECK: subvi.b $w24, $w20, 19 +0x78 0xa4 0x9a 0xc6 # CHECK: subvi.h $w11, $w19, 4 +0x78 0xcb 0x53 0x06 # CHECK: subvi.w $w12, $w10, 11 +0x78 0xe7 0x84 0xc6 # CHECK: subvi.d $w19, $w16, 7 diff --git a/test/MC/Disassembler/Mips/msa/test_i8.txt b/test/MC/Disassembler/Mips/msa/test_i8.txt new file mode 100644 index 0000000..e08c39b --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_i8.txt @@ -0,0 +1,12 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+msa | FileCheck %s + +0x78 0x30 0xe8 0x80 # CHECK: andi.b $w2, $w29, 48 +0x78 0x7e 0xb1 0x81 # CHECK: bmnzi.b $w6, $w22, 126 +0x79 0x58 0x0e 0xc1 # CHECK: bmzi.b $w27, $w1, 88 +0x7a 0xbd 0x1f 0x41 # CHECK: bseli.b $w29, $w3, 189 +0x7a 0x38 0x88 0x40 # CHECK: nori.b $w1, $w17, 56 +0x79 0x87 0xa6 0x80 # CHECK: ori.b $w26, $w20, 135 +0x78 0x69 0xf4 0xc2 # CHECK: shf.b $w19, $w30, 105 +0x79 0x4c 0x44 0x42 # CHECK: shf.h $w17, $w8, 76 +0x7a 0x5d 0x1b 0x82 # CHECK: shf.w $w14, $w3, 93 +0x7b 0x14 0x54 0x00 # CHECK: xori.b $w16, $w10, 20 diff --git a/test/MC/Disassembler/Mips/msa/test_lsa.txt b/test/MC/Disassembler/Mips/msa/test_lsa.txt new file mode 100644 index 0000000..c3e950b --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_lsa.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+msa | FileCheck %s + +0x01 0x2a 0x40 0x05 # CHECK: lsa $8, $9, $10, 1 +0x01 0x2a 0x40 0x45 # CHECK: lsa $8, $9, $10, 2 +0x01 0x2a 0x40 0x85 # CHECK: lsa $8, $9, $10, 3 +0x01 0x2a 0x40 0xc5 # CHECK: lsa $8, $9, $10, 4 diff --git a/test/MC/Disassembler/Mips/msa/test_mi10.txt b/test/MC/Disassembler/Mips/msa/test_mi10.txt new file mode 100644 index 0000000..b75b49e --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_mi10.txt @@ -0,0 +1,28 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+msa | FileCheck %s + +0x7a 0x00 0x08 0x20 # CHECK: ld.b $w0, -512($1) +0x78 0x00 0x10 0x60 # CHECK: ld.b $w1, 0($2) +0x79 0xff 0x18 0xa0 # CHECK: ld.b $w2, 511($3) + +0x7a 0x00 0x20 0xe1 # CHECK: ld.h $w3, -1024($4) +0x7b 0x00 0x29 0x21 # CHECK: ld.h $w4, -512($5) +0x78 0x00 0x31 0x61 # CHECK: ld.h $w5, 0($6) +0x79 0x00 0x39 0xa1 # CHECK: ld.h $w6, 512($7) +0x79 0xff 0x41 0xe1 # CHECK: ld.h $w7, 1022($8) + +0x7a 0x00 0x4a 0x22 # CHECK: ld.w $w8, -2048($9) +0x7b 0x00 0x52 0x62 # CHECK: ld.w $w9, -1024($10) +0x7b 0x80 0x5a 0xa2 # CHECK: ld.w $w10, -512($11) +0x78 0x80 0x62 0xe2 # CHECK: ld.w $w11, 512($12) +0x79 0x00 0x6b 0x22 # CHECK: ld.w $w12, 1024($13) +0x79 0xff 0x73 0x62 # CHECK: ld.w $w13, 2044($14) + +0x7a 0x00 0x7b 0xa3 # CHECK: ld.d $w14, -4096($15) +0x7b 0x00 0x83 0xe3 # CHECK: ld.d $w15, -2048($16) +0x7b 0x80 0x8c 0x23 # CHECK: ld.d $w16, -1024($17) +0x7b 0xc0 0x94 0x63 # CHECK: ld.d $w17, -512($18) +0x78 0x00 0x9c 0xa3 # CHECK: ld.d $w18, 0($19) +0x78 0x40 0xa4 0xe3 # CHECK: ld.d $w19, 512($20) +0x78 0x80 0xad 0x23 # CHECK: ld.d $w20, 1024($21) +0x79 0x00 0xb5 0x63 # CHECK: ld.d $w21, 2048($22) +0x79 0xff 0xbd 0xa3 # CHECK: ld.d $w22, 4088($23) diff --git a/test/MC/Disassembler/Mips/msa/test_vec.txt b/test/MC/Disassembler/Mips/msa/test_vec.txt new file mode 100644 index 0000000..eff984f --- /dev/null +++ b/test/MC/Disassembler/Mips/msa/test_vec.txt @@ -0,0 +1,9 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+msa | FileCheck %s + +0x78 0x1b 0xa6 0x5e # CHECK: and.v $w25, $w20, $w27 +0x78 0x87 0x34 0x5e # CHECK: bmnz.v $w17, $w6, $w7 +0x78 0xa9 0x88 0xde # CHECK: bmz.v $w3, $w17, $w9 +0x78 0xce 0x02 0x1e # CHECK: bsel.v $w8, $w0, $w14 +0x78 0x40 0xf9 0xde # CHECK: nor.v $w7, $w31, $w0 +0x78 0x3e 0xd6 0x1e # CHECK: or.v $w24, $w26, $w30 +0x78 0x6f 0xd9 0xde # CHECK: xor.v $w7, $w27, $w15 |