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| author | Stephen Hines <srhines@google.com> | 2014-04-23 16:57:46 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-04-24 15:53:16 -0700 |
| commit | 36b56886974eae4f9c5ebc96befd3e7bfe5de338 (patch) | |
| tree | e6cfb69fbbd937f450eeb83bfb83b9da3b01275a /test/MC/Disassembler | |
| parent | 69a8640022b04415ae9fac62f8ab090601d8f889 (diff) | |
| download | external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.zip external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.gz external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.bz2 | |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
Diffstat (limited to 'test/MC/Disassembler')
42 files changed, 11698 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/addrmode2-reencoding.txt b/test/MC/Disassembler/ARM/addrmode2-reencoding.txt new file mode 100644 index 0000000..08d2de6 --- /dev/null +++ b/test/MC/Disassembler/ARM/addrmode2-reencoding.txt @@ -0,0 +1,12 @@ +# RUN: llvm-mc -triple armv7 -show-encoding -disassemble < %s | FileCheck %s + +0x00 0x10 0xb0 0xe4 +0x00 0x10 0xf0 0xe4 +0x00 0x10 0xa0 0xe4 +0x00 0x10 0xe0 0xe4 + +# CHECK: ldrt r1, [r0], #0 @ encoding: [0x00,0x10,0xb0,0xe4] +# CHECK: ldrbt r1, [r0], #0 @ encoding: [0x00,0x10,0xf0,0xe4] +# CHECK: strt r1, [r0], #0 @ encoding: [0x00,0x10,0xa0,0xe4] +# CHECK: strbt r1, [r0], #0 @ encoding: [0x00,0x10,0xe0,0xe4] + diff --git a/test/MC/Disassembler/ARM64/advsimd.txt b/test/MC/Disassembler/ARM64/advsimd.txt new file mode 100644 index 0000000..486dd16 --- /dev/null +++ b/test/MC/Disassembler/ARM64/advsimd.txt @@ -0,0 +1,2282 @@ +# RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 --disassemble < %s | FileCheck %s + +0x00 0xb8 0x20 0x0e +0x00 0xb8 0x20 0x4e +0x00 0xb8 0x60 0x0e +0x00 0xb8 0x60 0x4e +0x00 0xb8 0xa0 0x0e +0x00 0xb8 0xa0 0x4e + +# CHECK: abs.8b v0, v0 +# CHECK: abs.16b v0, v0 +# CHECK: abs.4h v0, v0 +# CHECK: abs.8h v0, v0 +# CHECK: abs.2s v0, v0 +# CHECK: abs.4s v0, v0 + +0x00 0x84 0x20 0x0e +0x00 0x84 0x20 0x4e +0x00 0x84 0x60 0x0e +0x00 0x84 0x60 0x4e +0x00 0x84 0xa0 0x0e +0x00 0x84 0xa0 0x4e +0x00 0x84 0xe0 0x4e + +# CHECK: add.8b v0, v0, v0 +# CHECK: add.16b v0, v0, v0 +# CHECK: add.4h v0, v0, v0 +# CHECK: add.8h v0, v0, v0 +# CHECK: add.2s v0, v0, v0 +# CHECK: add.4s v0, v0, v0 +# CHECK: add.2d v0, v0, v0 + +0x41 0x84 0xe3 0x5e + +# CHECK: add d1, d2, d3 + +0x00 0x40 0x20 0x0e +0x00 0x40 0x20 0x4e +0x00 0x40 0x60 0x0e +0x00 0x40 0x60 0x4e +0x00 0x40 0xa0 0x0e +0x00 0x40 0xa0 0x4e + +# CHECK: addhn.8b v0, v0, v0 +# CHECK: addhn2.16b v0, v0, v0 +# CHECK: addhn.4h v0, v0, v0 +# CHECK: addhn2.8h v0, v0, v0 +# CHECK: addhn.2s v0, v0, v0 +# CHECK: addhn2.4s v0, v0, v0 + +0x00 0xbc 0x20 0x0e +0x00 0xbc 0x20 0x4e +0x00 0xbc 0x60 0x0e +0x00 0xbc 0x60 0x4e +0x00 0xbc 0xa0 0x0e +0x00 0xbc 0xa0 0x4e +0x00 0xbc 0xe0 0x4e + +# CHECK: addp.8b v0, v0, v0 +# CHECK: addp.16b v0, v0, v0 +# CHECK: addp.4h v0, v0, v0 +# CHECK: addp.8h v0, v0, v0 +# CHECK: addp.2s v0, v0, v0 +# CHECK: addp.4s v0, v0, v0 +# CHECK: addp.2d v0, v0, v0 + +0x00 0xb8 0xf1 0x5e + +# CHECK: addp.2d d0, v0 + +0x00 0xb8 0x31 0x0e +0x00 0xb8 0x31 0x4e +0x00 0xb8 0x71 0x0e +0x00 0xb8 0x71 0x4e +0x00 0xb8 0xb1 0x4e + +# CHECK: addv.8b b0, v0 +# CHECK: addv.16b b0, v0 +# CHECK: addv.4h h0, v0 +# CHECK: addv.8h h0, v0 +# CHECK: addv.4s s0, v0 + + +# INS/DUP +0x60 0x0c 0x08 0x4e +0x60 0x0c 0x04 0x4e +0x60 0x0c 0x04 0x0e +0x60 0x0c 0x02 0x4e +0x60 0x0c 0x02 0x0e +0x60 0x0c 0x01 0x4e +0x60 0x0c 0x01 0x0e + +# CHECK: dup.2d v0, x3 +# CHECK: dup.4s v0, w3 +# CHECK: dup.2s v0, w3 +# CHECK: dup.8h v0, w3 +# CHECK: dup.4h v0, w3 +# CHECK: dup.16b v0, w3 +# CHECK: dup.8b v0, w3 + +0x60 0x04 0x18 0x4e +0x60 0x04 0x0c 0x0e +0x60 0x04 0x0c 0x4e +0x60 0x04 0x06 0x0e +0x60 0x04 0x06 0x4e +0x60 0x04 0x03 0x0e +0x60 0x04 0x03 0x4e + +# CHECK: dup.2d v0, v3[1] +# CHECK: dup.2s v0, v3[1] +# CHECK: dup.4s v0, v3[1] +# CHECK: dup.4h v0, v3[1] +# CHECK: dup.8h v0, v3[1] +# CHECK: dup.8b v0, v3[1] +# CHECK: dup.16b v0, v3[1] + + +0x43 0x2c 0x14 0x4e +0x43 0x2c 0x14 0x4e +0x43 0x3c 0x14 0x0e +0x43 0x3c 0x14 0x0e +0x43 0x3c 0x18 0x4e +0x43 0x3c 0x18 0x4e + +# CHECK: smov.s x3, v2[2] +# CHECK: smov.s x3, v2[2] +# CHECK: umov.s w3, v2[2] +# CHECK: umov.s w3, v2[2] +# CHECK: umov.d x3, v2[1] +# CHECK: umov.d x3, v2[1] + +0xa2 0x1c 0x18 0x4e +0xa2 0x1c 0x0c 0x4e +0xa2 0x1c 0x06 0x4e +0xa2 0x1c 0x03 0x4e + +0xa2 0x1c 0x18 0x4e +0xa2 0x1c 0x0c 0x4e +0xa2 0x1c 0x06 0x4e +0xa2 0x1c 0x03 0x4e + +# CHECK: ins.d v2[1], x5 +# CHECK: ins.s v2[1], w5 +# CHECK: ins.h v2[1], w5 +# CHECK: ins.b v2[1], w5 + +# CHECK: ins.d v2[1], x5 +# CHECK: ins.s v2[1], w5 +# CHECK: ins.h v2[1], w5 +# CHECK: ins.b v2[1], w5 + +0xe2 0x45 0x18 0x6e +0xe2 0x25 0x0c 0x6e +0xe2 0x15 0x06 0x6e +0xe2 0x0d 0x03 0x6e + +0xe2 0x05 0x18 0x6e +0xe2 0x45 0x1c 0x6e +0xe2 0x35 0x1e 0x6e +0xe2 0x2d 0x15 0x6e + +# CHECK: ins.d v2[1], v15[1] +# CHECK: ins.s v2[1], v15[1] +# CHECK: ins.h v2[1], v15[1] +# CHECK: ins.b v2[1], v15[1] + +# CHECK: ins.d v2[1], v15[0] +# CHECK: ins.s v2[3], v15[2] +# CHECK: ins.h v2[7], v15[3] +# CHECK: ins.b v2[10], v15[5] + +0x00 0x1c 0x20 0x0e +0x00 0x1c 0x20 0x4e + +# CHECK: and.8b v0, v0, v0 +# CHECK: and.16b v0, v0, v0 + +0x00 0x1c 0x60 0x0e + +# CHECK: bic.8b v0, v0, v0 + +0x00 0x8c 0x20 0x2e +0x00 0x3c 0x20 0x0e +0x00 0x34 0x20 0x0e +0x00 0x34 0x20 0x2e +0x00 0x3c 0x20 0x2e +0x00 0x8c 0x20 0x0e +0x00 0xd4 0xa0 0x2e +0x00 0xec 0x20 0x2e +0x00 0xec 0xa0 0x2e +0x00 0xd4 0x20 0x2e +0x00 0xd4 0x20 0x0e +0x00 0xe4 0x20 0x0e +0x00 0xe4 0x20 0x2e +0x00 0xe4 0xa0 0x2e +0x00 0xfc 0x20 0x2e +0x00 0xc4 0x20 0x2e +0x00 0xc4 0x20 0x0e +0x00 0xf4 0x20 0x2e +0x00 0xf4 0x20 0x0e +0x00 0xc4 0xa0 0x2e +0x00 0xc4 0xa0 0x0e +0x00 0xf4 0xa0 0x2e +0x00 0xf4 0xa0 0x0e +0x00 0xcc 0x20 0x0e +0x00 0xcc 0xa0 0x0e +0x00 0xdc 0x20 0x0e +0x00 0xdc 0x20 0x2e +0x00 0xfc 0x20 0x0e +0x00 0xfc 0xa0 0x0e +0x00 0xd4 0xa0 0x0e +0x00 0x94 0x20 0x0e +0x00 0x94 0x20 0x2e +0x00 0x9c 0x20 0x0e +0x00 0x9c 0x20 0x2e +0x00 0x7c 0x20 0x0e +0x00 0x74 0x20 0x0e +0x00 0x04 0x20 0x0e +0x00 0x24 0x20 0x0e +0x00 0xa4 0x20 0x0e +0x00 0x64 0x20 0x0e +0x00 0xac 0x20 0x0e +0x00 0x6c 0x20 0x0e +0x00 0x0c 0x20 0x0e +0x00 0xb4 0x60 0x0e +0x00 0xb4 0x60 0x2e +0x00 0x5c 0x20 0x0e +0x00 0x4c 0x20 0x0e +0x00 0x2c 0x20 0x0e +0x00 0x14 0x20 0x0e +0x00 0x54 0x20 0x0e +0x00 0x44 0x20 0x0e +0x00 0x84 0x20 0x2e +0x00 0x7c 0x20 0x2e +0x00 0x74 0x20 0x2e +0x00 0x04 0x20 0x2e +0x00 0x24 0x20 0x2e +0x00 0xa4 0x20 0x2e +0x00 0x64 0x20 0x2e +0x00 0xac 0x20 0x2e +0x00 0x6c 0x20 0x2e +0x00 0x0c 0x20 0x2e +0x00 0x5c 0x20 0x2e +0x00 0x4c 0x20 0x2e +0x00 0x2c 0x20 0x2e +0x00 0x14 0x20 0x2e +0x00 0x54 0x20 0x2e +0x00 0x44 0x20 0x2e + +# CHECK: cmeq.8b v0, v0, v0 +# CHECK: cmge.8b v0, v0, v0 +# CHECK: cmgt.8b v0, v0, v0 +# CHECK: cmhi.8b v0, v0, v0 +# CHECK: cmhs.8b v0, v0, v0 +# CHECK: cmtst.8b v0, v0, v0 +# CHECK: fabd.2s v0, v0, v0 +# CHECK: facge.2s v0, v0, v0 +# CHECK: facgt.2s v0, v0, v0 +# CHECK: faddp.2s v0, v0, v0 +# CHECK: fadd.2s v0, v0, v0 +# CHECK: fcmeq.2s v0, v0, v0 +# CHECK: fcmge.2s v0, v0, v0 +# CHECK: fcmgt.2s v0, v0, v0 +# CHECK: fdiv.2s v0, v0, v0 +# CHECK: fmaxnmp.2s v0, v0, v0 +# CHECK: fmaxnm.2s v0, v0, v0 +# CHECK: fmaxp.2s v0, v0, v0 +# CHECK: fmax.2s v0, v0, v0 +# CHECK: fminnmp.2s v0, v0, v0 +# CHECK: fminnm.2s v0, v0, v0 +# CHECK: fminp.2s v0, v0, v0 +# CHECK: fmin.2s v0, v0, v0 +# CHECK: fmla.2s v0, v0, v0 +# CHECK: fmls.2s v0, v0, v0 +# CHECK: fmulx.2s v0, v0, v0 +# CHECK: fmul.2s v0, v0, v0 +# CHECK: frecps.2s v0, v0, v0 +# CHECK: frsqrts.2s v0, v0, v0 +# CHECK: fsub.2s v0, v0, v0 +# CHECK: mla.8b v0, v0, v0 +# CHECK: mls.8b v0, v0, v0 +# CHECK: mul.8b v0, v0, v0 +# CHECK: pmul.8b v0, v0, v0 +# CHECK: saba.8b v0, v0, v0 +# CHECK: sabd.8b v0, v0, v0 +# CHECK: shadd.8b v0, v0, v0 +# CHECK: shsub.8b v0, v0, v0 +# CHECK: smaxp.8b v0, v0, v0 +# CHECK: smax.8b v0, v0, v0 +# CHECK: sminp.8b v0, v0, v0 +# CHECK: smin.8b v0, v0, v0 +# CHECK: sqadd.8b v0, v0, v0 +# CHECK: sqdmulh.4h v0, v0, v0 +# CHECK: sqrdmulh.4h v0, v0, v0 +# CHECK: sqrshl.8b v0, v0, v0 +# CHECK: sqshl.8b v0, v0, v0 +# CHECK: sqsub.8b v0, v0, v0 +# CHECK: srhadd.8b v0, v0, v0 +# CHECK: srshl.8b v0, v0, v0 +# CHECK: sshl.8b v0, v0, v0 +# CHECK: sub.8b v0, v0, v0 +# CHECK: uaba.8b v0, v0, v0 +# CHECK: uabd.8b v0, v0, v0 +# CHECK: uhadd.8b v0, v0, v0 +# CHECK: uhsub.8b v0, v0, v0 +# CHECK: umaxp.8b v0, v0, v0 +# CHECK: umax.8b v0, v0, v0 +# CHECK: uminp.8b v0, v0, v0 +# CHECK: umin.8b v0, v0, v0 +# CHECK: uqadd.8b v0, v0, v0 +# CHECK: uqrshl.8b v0, v0, v0 +# CHECK: uqshl.8b v0, v0, v0 +# CHECK: uqsub.8b v0, v0, v0 +# CHECK: urhadd.8b v0, v0, v0 +# CHECK: urshl.8b v0, v0, v0 +# CHECK: ushl.8b v0, v0, v0 + +0x00 0x1c 0xe0 0x2e +0x00 0x1c 0xa0 0x2e +0x00 0x1c 0x60 0x2e +0x00 0x1c 0x20 0x2e +0x00 0x1c 0xe0 0x0e +0x00 0x1c 0xa0 0x0e + +# CHECK: bif.8b v0, v0, v0 +# CHECK: bit.8b v0, v0, v0 +# CHECK: bsl.8b v0, v0, v0 +# CHECK: eor.8b v0, v0, v0 +# CHECK: orn.8b v0, v0, v0 +# CHECK: orr.8b v0, v0, v0 + +0x00 0x68 0x20 0x0e +0x00 0x68 0x20 0x4e +0x00 0x68 0x60 0x0e +0x00 0x68 0x60 0x4e +0x00 0x68 0xa0 0x0e +0x00 0x68 0xa0 0x4e + +# CHECK: sadalp.4h v0, v0 +# CHECK: sadalp.8h v0, v0 +# CHECK: sadalp.2s v0, v0 +# CHECK: sadalp.4s v0, v0 +# CHECK: sadalp.1d v0, v0 +# CHECK: sadalp.2d v0, v0 + +0x00 0x48 0x20 0x0e +0x00 0x48 0x20 0x2e +0x00 0x58 0x20 0x0e +0x00 0xf8 0xa0 0x0e +0x00 0xc8 0x21 0x0e +0x00 0xc8 0x21 0x2e +0x00 0xb8 0x21 0x0e +0x00 0xb8 0x21 0x2e +0x00 0xa8 0x21 0x0e +0x00 0xa8 0x21 0x2e +0x00 0xa8 0xa1 0x0e +0x00 0xa8 0xa1 0x2e +0x00 0xb8 0xa1 0x0e +0x00 0xb8 0xa1 0x2e +0x00 0xf8 0xa0 0x2e +0x00 0xd8 0xa1 0x0e +0x00 0xd8 0xa1 0x2e +0x00 0xf8 0xa1 0x2e +0x00 0xb8 0x20 0x2e +0x00 0x58 0x20 0x2e +0x00 0x58 0x60 0x2e +0x00 0x18 0x20 0x0e +0x00 0x08 0x20 0x2e +0x00 0x08 0x20 0x0e +0x00 0x68 0x20 0x0e +0x00 0x28 0x20 0x0e +0x00 0xd8 0x21 0x0e +0x00 0x38 0x21 0x2e +0x00 0x78 0x20 0x0e +0x00 0x78 0x20 0x2e +0x00 0x48 0x21 0x0e +0x00 0x28 0x21 0x2e +0x00 0x38 0x20 0x0e +0x00 0x68 0x20 0x2e +0x00 0x28 0x20 0x2e +0x00 0xd8 0x21 0x2e +0x00 0x48 0x21 0x2e +0x00 0xc8 0xa1 0x0e +0x00 0xc8 0xa1 0x2e +0x00 0x38 0x20 0x2e +0x00 0x28 0x21 0x0e +0x00 0x48 0x20 0x0e +0x00 0x48 0x20 0x2e +0x00 0x58 0x20 0x0e +0x00 0xf8 0xa0 0x0e +0x00 0xc8 0x21 0x0e +0x00 0xc8 0x21 0x2e +0x00 0xb8 0x21 0x0e +0x00 0xb8 0x21 0x2e +0x00 0xa8 0x21 0x0e +0x00 0xa8 0x21 0x2e +0x00 0xa8 0xa1 0x0e +0x00 0xa8 0xa1 0x2e +0x00 0xb8 0xa1 0x0e +0x00 0xb8 0xa1 0x2e +0x00 0xf8 0xa0 0x2e +0x00 0xd8 0xa1 0x0e +0x00 0xd8 0xa1 0x2e +0x00 0xf8 0xa1 0x2e +0x00 0xb8 0x20 0x2e +0x00 0x58 0x20 0x2e +0x00 0x58 0x60 0x2e +0x00 0x18 0x20 0x0e +0x00 0x08 0x20 0x2e +0x00 0x08 0x20 0x0e +0x00 0x68 0x20 0x0e +0x00 0x28 0x20 0x0e +0x00 0xd8 0x21 0x0e +0x00 0x38 0x21 0x2e +0x00 0x78 0x20 0x0e +0x00 0x78 0x20 0x2e +0x00 0x48 0x21 0x0e +0x00 0x28 0x21 0x2e +0x00 0x38 0x20 0x0e +0x00 0x68 0x20 0x2e +0x00 0x28 0x20 0x2e +0x00 0xd8 0x21 0x2e +0x00 0x48 0x21 0x2e +0x00 0xc8 0xa1 0x0e +0x00 0xc8 0xa1 0x2e +0x00 0x38 0x20 0x2e +0x00 0x28 0x21 0x0e + +# CHECK: cls.8b v0, v0 +# CHECK: clz.8b v0, v0 +# CHECK: cnt.8b v0, v0 +# CHECK: fabs.2s v0, v0 +# CHECK: fcvtas.2s v0, v0 +# CHECK: fcvtau.2s v0, v0 +# CHECK: fcvtms.2s v0, v0 +# CHECK: fcvtmu.2s v0, v0 +# CHECK: fcvtns.2s v0, v0 +# CHECK: fcvtnu.2s v0, v0 +# CHECK: fcvtps.2s v0, v0 +# CHECK: fcvtpu.2s v0, v0 +# CHECK: fcvtzs.2s v0, v0 +# CHECK: fcvtzu.2s v0, v0 +# CHECK: fneg.2s v0, v0 +# CHECK: frecpe.2s v0, v0 +# CHECK: frsqrte.2s v0, v0 +# CHECK: fsqrt.2s v0, v0 +# CHECK: neg.8b v0, v0 +# CHECK: not.8b v0, v0 +# CHECK: rbit.8b v0, v0 +# CHECK: rev16.8b v0, v0 +# CHECK: rev32.8b v0, v0 +# CHECK: rev64.8b v0, v0 +# CHECK: sadalp.4h v0, v0 +# CHECK: saddlp.4h v0, v0 +# CHECK: scvtf.2s v0, v0 +# CHECK: shll.8h v0, v0, #8 +# CHECK: sqabs.8b v0, v0 +# CHECK: sqneg.8b v0, v0 +# CHECK: sqxtn.8b v0, v0 +# CHECK: sqxtun.8b v0, v0 +# CHECK: suqadd.8b v0, v0 +# CHECK: uadalp.4h v0, v0 +# CHECK: uaddlp.4h v0, v0 +# CHECK: ucvtf.2s v0, v0 +# CHECK: uqxtn.8b v0, v0 +# CHECK: urecpe.2s v0, v0 +# CHECK: ursqrte.2s v0, v0 +# CHECK: usqadd.8b v0, v0 +# CHECK: xtn.8b v0, v0 + +0x00 0x98 0x20 0x0e +0x00 0x98 0x20 0x4e +0x00 0x98 0x60 0x0e +0x00 0x98 0x60 0x4e +0x00 0x98 0xa0 0x0e +0x00 0x98 0xa0 0x4e +0x00 0x98 0xe0 0x4e + +# CHECK: cmeq.8b v0, v0, #0 +# CHECK: cmeq.16b v0, v0, #0 +# CHECK: cmeq.4h v0, v0, #0 +# CHECK: cmeq.8h v0, v0, #0 +# CHECK: cmeq.2s v0, v0, #0 +# CHECK: cmeq.4s v0, v0, #0 +# CHECK: cmeq.2d v0, v0, #0 + +0x00 0x88 0x20 0x2e +0x00 0x88 0x20 0x0e +0x00 0x98 0x20 0x2e +0x00 0xa8 0x20 0x0e +0x00 0xd8 0xa0 0x0e +0x00 0xc8 0xa0 0x2e +0x00 0xc8 0xa0 0x0e +0x00 0xd8 0xa0 0x2e +0x00 0xe8 0xa0 0x0e + +# CHECK: cmge.8b v0, v0, #0 +# CHECK: cmgt.8b v0, v0, #0 +# CHECK: cmle.8b v0, v0, #0 +# CHECK: cmlt.8b v0, v0, #0 +# CHECK: fcmeq.2s v0, v0, #0 +# CHECK: fcmge.2s v0, v0, #0 +# CHECK: fcmgt.2s v0, v0, #0 +# CHECK: fcmle.2s v0, v0, #0 +# CHECK: fcmlt.2s v0, v0, #0 + +0x00 0x78 0x21 0x0e +0x00 0x78 0x21 0x4e +0x00 0x78 0x61 0x0e +0x00 0x78 0x61 0x4e +0x00 0x68 0x21 0x0e +0x00 0x68 0x21 0x4e +0x00 0x68 0x61 0x0e +0x00 0x68 0x61 0x4e +0x00 0x68 0x61 0x2e +0x00 0x68 0x61 0x6e + +# CHECK: fcvtl v0.4s, v0.4h +# CHECK: fcvtl2 v0.4s, v0.8h +# CHECK: fcvtl v0.2d, v0.2s +# CHECK: fcvtl2 v0.2d, v0.4s +# CHECK: fcvtn v0.4h, v0.4s +# CHECK: fcvtn2 v0.8h, v0.4s +# CHECK: fcvtn v0.2s, v0.2d +# CHECK: fcvtn2 v0.4s, v0.2d +# CHECK: fcvtxn v0.2s, v0.2d +# CHECK: fcvtxn2 v0.4s, v0.2d + +#===-------------------------------------------------------------------------=== +# AdvSIMD modified immediate instructions +#===-------------------------------------------------------------------------=== + +0x20 0x14 0x00 0x2f +0x20 0x34 0x00 0x2f +0x20 0x54 0x00 0x2f +0x20 0x74 0x00 0x2f + +# CHECK: bic.2s v0, #1 +# CHECK: bic.2s v0, #1, lsl #8 +# CHECK: bic.2s v0, #1, lsl #16 +# CHECK: bic.2s v0, #1, lsl #24 + +0x20 0x94 0x00 0x2f +0x20 0x94 0x00 0x2f +0x20 0xb4 0x00 0x2f + +# CHECK: bic.4h v0, #1 +# CHECK: bic.4h v0, #1 +# FIXME: bic.4h v0, #1, lsl #8 +# 'bic.4h' should be selected over "fcvtnu.2s v0, v1, #0" + +0x20 0x14 0x00 0x6f +0x20 0x34 0x00 0x6f +0x20 0x54 0x00 0x6f +0x20 0x74 0x00 0x6f + +# CHECK: bic.4s v0, #1 +# CHECK: bic.4s v0, #1, lsl #8 +# CHECK: bic.4s v0, #1, lsl #16 +# CHECK: bic.4s v0, #1, lsl #24 + +0x20 0x94 0x00 0x6f +0x20 0xb4 0x00 0x6f + +# CHECK: bic.8h v0, #1 +# FIXME: bic.8h v0, #1, lsl #8 +# "bic.8h" should be selected over "fcvtnu.4s v0, v1, #0" + +0x00 0xf4 0x02 0x6f + +# CHECK: fmov.2d v0, #1.250000e-01 + +0x00 0xf4 0x02 0x0f +0x00 0xf4 0x02 0x4f + +# CHECK: fmov.2s v0, #1.250000e-01 +# CHECK: fmov.4s v0, #1.250000e-01 + +0x20 0x14 0x00 0x0f +0x20 0x34 0x00 0x0f +0x20 0x54 0x00 0x0f +0x20 0x74 0x00 0x0f + +# CHECK: orr.2s v0, #1 +# CHECK: orr.2s v0, #1, lsl #8 +# CHECK: orr.2s v0, #1, lsl #16 +# CHECK: orr.2s v0, #1, lsl #24 + +0x20 0x94 0x00 0x0f +0x20 0xb4 0x00 0x0f + +# CHECK: orr.4h v0, #1 +# FIXME: orr.4h v0, #1, lsl #8 +# 'orr.4h' should be selected over "fcvtns.2s v0, v1, #0" + +0x20 0x14 0x00 0x4f +0x20 0x34 0x00 0x4f +0x20 0x54 0x00 0x4f +0x20 0x74 0x00 0x4f + +# CHECK: orr.4s v0, #1 +# CHECK: orr.4s v0, #1, lsl #8 +# CHECK: orr.4s v0, #1, lsl #16 +# CHECK: orr.4s v0, #1, lsl #24 + +0x20 0x94 0x00 0x4f +0x20 0xb4 0x00 0x4f + +# CHECK: orr.8h v0, #1 +# FIXME: orr.8h v0, #1, lsl #8 +# "orr.8h" should be selected over "fcvtns.4s v0, v1, #0" + +0x21 0x70 0x40 0x0c +0x42 0xa0 0x40 0x4c +0x64 0x64 0x40 0x0c +0x87 0x24 0x40 0x4c +0x0c 0xa8 0x40 0x0c +0x0a 0x68 0x40 0x4c +0x2d 0xac 0x40 0x0c +0x4f 0x7c 0x40 0x4c + +# CHECK: ld1.8b { v1 }, [x1] +# CHECK: ld1.16b { v2, v3 }, [x2] +# CHECK: ld1.4h { v4, v5, v6 }, [x3] +# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4] +# CHECK: ld1.2s { v12, v13 }, [x0] +# CHECK: ld1.4s { v10, v11, v12 }, [x0] +# CHECK: ld1.1d { v13, v14 }, [x1] +# CHECK: ld1.2d { v15 }, [x2] + +0x41 0x70 0xdf 0x0c +0x41 0xa0 0xdf 0x0c +0x41 0x60 0xdf 0x0c +0x41 0x20 0xdf 0x0c +0x42 0x70 0xdf 0x4c +0x42 0xa0 0xdf 0x4c +0x42 0x60 0xdf 0x4c +0x42 0x20 0xdf 0x4c +0x64 0x74 0xdf 0x0c +0x64 0xa4 0xdf 0x0c +0x64 0x64 0xdf 0x0c +0x64 0x24 0xdf 0x0c +0x87 0x74 0xdf 0x4c +0x87 0xa4 0xdf 0x4c +0x87 0x64 0xdf 0x4c +0x87 0x24 0xdf 0x4c +0x0c 0x78 0xdf 0x0c +0x0c 0xa8 0xdf 0x0c +0x0c 0x68 0xdf 0x0c +0x0c 0x28 0xdf 0x0c +0x0a 0x78 0xdf 0x4c +0x0a 0xa8 0xdf 0x4c +0x0a 0x68 0xdf 0x4c +0x0a 0x28 0xdf 0x4c +0x2d 0x7c 0xdf 0x0c +0x2d 0xac 0xdf 0x0c +0x2d 0x6c 0xdf 0x0c +0x2d 0x2c 0xdf 0x0c +0x4f 0x7c 0xdf 0x4c +0x4f 0xac 0xdf 0x4c +0x4f 0x6c 0xdf 0x4c +0x4f 0x2c 0xdf 0x4c + +# CHECK: ld1.8b { v1 }, [x2], #8 +# CHECK: ld1.8b { v1, v2 }, [x2], #16 +# CHECK: ld1.8b { v1, v2, v3 }, [x2], #24 +# CHECK: ld1.8b { v1, v2, v3, v4 }, [x2], #32 +# CHECK: ld1.16b { v2 }, [x2], #16 +# CHECK: ld1.16b { v2, v3 }, [x2], #32 +# CHECK: ld1.16b { v2, v3, v4 }, [x2], #48 +# CHECK: ld1.16b { v2, v3, v4, v5 }, [x2], #64 +# CHECK: ld1.4h { v4 }, [x3], #8 +# CHECK: ld1.4h { v4, v5 }, [x3], #16 +# CHECK: ld1.4h { v4, v5, v6 }, [x3], #24 +# CHECK: ld1.4h { v4, v5, v6, v7 }, [x3], #32 +# CHECK: ld1.8h { v7 }, [x4], #16 +# CHECK: ld1.8h { v7, v8 }, [x4], #32 +# CHECK: ld1.8h { v7, v8, v9 }, [x4], #48 +# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4], #64 +# CHECK: ld1.2s { v12 }, [x0], #8 +# CHECK: ld1.2s { v12, v13 }, [x0], #16 +# CHECK: ld1.2s { v12, v13, v14 }, [x0], #24 +# CHECK: ld1.2s { v12, v13, v14, v15 }, [x0], #32 +# CHECK: ld1.4s { v10 }, [x0], #16 +# CHECK: ld1.4s { v10, v11 }, [x0], #32 +# CHECK: ld1.4s { v10, v11, v12 }, [x0], #48 +# CHECK: ld1.4s { v10, v11, v12, v13 }, [x0], #64 +# CHECK: ld1.1d { v13 }, [x1], #8 +# CHECK: ld1.1d { v13, v14 }, [x1], #16 +# CHECK: ld1.1d { v13, v14, v15 }, [x1], #24 +# CHECK: ld1.1d { v13, v14, v15, v16 }, [x1], #32 +# CHECK: ld1.2d { v15 }, [x2], #16 +# CHECK: ld1.2d { v15, v16 }, [x2], #32 +# CHECK: ld1.2d { v15, v16, v17 }, [x2], #48 +# CHECK: ld1.2d { v15, v16, v17, v18 }, [x2], #64 + +0x21 0x70 0x00 0x0c +0x42 0xa0 0x00 0x4c +0x64 0x64 0x00 0x0c +0x87 0x24 0x00 0x4c +0x0c 0xa8 0x00 0x0c +0x0a 0x68 0x00 0x4c +0x2d 0xac 0x00 0x0c +0x4f 0x7c 0x00 0x4c + +# CHECK: st1.8b { v1 }, [x1] +# CHECK: st1.16b { v2, v3 }, [x2] +# CHECK: st1.4h { v4, v5, v6 }, [x3] +# CHECK: st1.8h { v7, v8, v9, v10 }, [x4] +# CHECK: st1.2s { v12, v13 }, [x0] +# CHECK: st1.4s { v10, v11, v12 }, [x0] +# CHECK: st1.1d { v13, v14 }, [x1] +# CHECK: st1.2d { v15 }, [x2] + +0x61 0x08 0x40 0x0d +0x82 0x84 0x40 0x4d +0xa3 0x58 0x40 0x0d +0xc4 0x80 0x40 0x4d + +# CHECK: ld1.b { v1 }[2], [x3] +# CHECK: ld1.d { v2 }[1], [x4] +# CHECK: ld1.h { v3 }[3], [x5] +# CHECK: ld1.s { v4 }[2], [x6] + +0x61 0x08 0xdf 0x0d +0x82 0x84 0xdf 0x4d +0xa3 0x58 0xdf 0x0d +0xc4 0x80 0xdf 0x4d + +# CHECK: ld1.b { v1 }[2], [x3], #1 +# CHECK: ld1.d { v2 }[1], [x4], #8 +# CHECK: ld1.h { v3 }[3], [x5], #2 +# CHECK: ld1.s { v4 }[2], [x6], #4 + +0x61 0x08 0x00 0x0d +0x82 0x84 0x00 0x4d +0xa3 0x58 0x00 0x0d +0xc4 0x80 0x00 0x4d + +# CHECK: st1.b { v1 }[2], [x3] +# CHECK: st1.d { v2 }[1], [x4] +# CHECK: st1.h { v3 }[3], [x5] +# CHECK: st1.s { v4 }[2], [x6] + +0x61 0x08 0x9f 0x0d +0x82 0x84 0x9f 0x4d +0xa3 0x58 0x9f 0x0d +0xc4 0x80 0x9f 0x4d + +# CHECK: st1.b { v1 }[2], [x3], #1 +# CHECK: st1.d { v2 }[1], [x4], #8 +# CHECK: st1.h { v3 }[3], [x5], #2 +# CHECK: st1.s { v4 }[2], [x6], #4 + +0x61 0x08 0xc4 0x0d +0x82 0x84 0xc5 0x4d +0xa3 0x58 0xc6 0x0d +0xc4 0x80 0xc7 0x4d + +# CHECK: ld1.b { v1 }[2], [x3], x4 +# CHECK: ld1.d { v2 }[1], [x4], x5 +# CHECK: ld1.h { v3 }[3], [x5], x6 +# CHECK: ld1.s { v4 }[2], [x6], x7 + +0x61 0x08 0x84 0x0d +0x82 0x84 0x85 0x4d +0xa3 0x58 0x86 0x0d +0xc4 0x80 0x87 0x4d + +# CHECK: st1.b { v1 }[2], [x3], x4 +# CHECK: st1.d { v2 }[1], [x4], x5 +# CHECK: st1.h { v3 }[3], [x5], x6 +# CHECK: st1.s { v4 }[2], [x6], x7 + +0x41 0x70 0xc3 0x0c +0x42 0xa0 0xc4 0x4c +0x64 0x64 0xc5 0x0c +0x87 0x24 0xc6 0x4c +0x0c 0xa8 0xc7 0x0c +0x0a 0x68 0xc8 0x4c +0x2d 0xac 0xc9 0x0c +0x4f 0x7c 0xca 0x4c + +# CHECK: ld1.8b { v1 }, [x2], x3 +# CHECK: ld1.16b { v2, v3 }, [x2], x4 +# CHECK: ld1.4h { v4, v5, v6 }, [x3], x5 +# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: ld1.2s { v12, v13 }, [x0], x7 +# CHECK: ld1.4s { v10, v11, v12 }, [x0], x8 +# CHECK: ld1.1d { v13, v14 }, [x1], x9 +# CHECK: ld1.2d { v15 }, [x2], x10 + +0x41 0x70 0x83 0x0c +0x42 0xa0 0x84 0x4c +0x64 0x64 0x85 0x0c +0x87 0x24 0x86 0x4c +0x0c 0xa8 0x87 0x0c +0x0a 0x68 0x88 0x4c +0x2d 0xac 0x89 0x0c +0x4f 0x7c 0x8a 0x4c + +# CHECK: st1.8b { v1 }, [x2], x3 +# CHECK: st1.16b { v2, v3 }, [x2], x4 +# CHECK: st1.4h { v4, v5, v6 }, [x3], x5 +# CHECK: st1.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: st1.2s { v12, v13 }, [x0], x7 +# CHECK: st1.4s { v10, v11, v12 }, [x0], x8 +# CHECK: st1.1d { v13, v14 }, [x1], x9 +# CHECK: st1.2d { v15 }, [x2], x10 + +0x41 0x70 0x9f 0x0c +0x41 0xa0 0x9f 0x0c +0x41 0x60 0x9f 0x0c +0x41 0x20 0x9f 0x0c +0x42 0x70 0x9f 0x4c +0x42 0xa0 0x9f 0x4c +0x42 0x60 0x9f 0x4c +0x42 0x20 0x9f 0x4c +0x64 0x74 0x9f 0x0c +0x64 0xa4 0x9f 0x0c +0x64 0x64 0x9f 0x0c +0x64 0x24 0x9f 0x0c +0x87 0x74 0x9f 0x4c +0x87 0xa4 0x9f 0x4c +0x87 0x64 0x9f 0x4c +0x87 0x24 0x9f 0x4c +0x0c 0x78 0x9f 0x0c +0x0c 0xa8 0x9f 0x0c +0x0c 0x68 0x9f 0x0c +0x0c 0x28 0x9f 0x0c +0x0a 0x78 0x9f 0x4c +0x0a 0xa8 0x9f 0x4c +0x0a 0x68 0x9f 0x4c +0x0a 0x28 0x9f 0x4c +0x2d 0x7c 0x9f 0x0c +0x2d 0xac 0x9f 0x0c +0x2d 0x6c 0x9f 0x0c +0x2d 0x2c 0x9f 0x0c +0x4f 0x7c 0x9f 0x4c +0x4f 0xac 0x9f 0x4c +0x4f 0x6c 0x9f 0x4c +0x4f 0x2c 0x9f 0x4c + +# CHECK: st1.8b { v1 }, [x2], #8 +# CHECK: st1.8b { v1, v2 }, [x2], #16 +# CHECK: st1.8b { v1, v2, v3 }, [x2], #24 +# CHECK: st1.8b { v1, v2, v3, v4 }, [x2], #32 +# CHECK: st1.16b { v2 }, [x2], #16 +# CHECK: st1.16b { v2, v3 }, [x2], #32 +# CHECK: st1.16b { v2, v3, v4 }, [x2], #48 +# CHECK: st1.16b { v2, v3, v4, v5 }, [x2], #64 +# CHECK: st1.4h { v4 }, [x3], #8 +# CHECK: st1.4h { v4, v5 }, [x3], #16 +# CHECK: st1.4h { v4, v5, v6 }, [x3], #24 +# CHECK: st1.4h { v4, v5, v6, v7 }, [x3], #32 +# CHECK: st1.8h { v7 }, [x4], #16 +# CHECK: st1.8h { v7, v8 }, [x4], #32 +# CHECK: st1.8h { v7, v8, v9 }, [x4], #48 +# CHECK: st1.8h { v7, v8, v9, v10 }, [x4], #64 +# CHECK: st1.2s { v12 }, [x0], #8 +# CHECK: st1.2s { v12, v13 }, [x0], #16 +# CHECK: st1.2s { v12, v13, v14 }, [x0], #24 +# CHECK: st1.2s { v12, v13, v14, v15 }, [x0], #32 +# CHECK: st1.4s { v10 }, [x0], #16 +# CHECK: st1.4s { v10, v11 }, [x0], #32 +# CHECK: st1.4s { v10, v11, v12 }, [x0], #48 +# CHECK: st1.4s { v10, v11, v12, v13 }, [x0], #64 +# CHECK: st1.1d { v13 }, [x1], #8 +# CHECK: st1.1d { v13, v14 }, [x1], #16 +# CHECK: st1.1d { v13, v14, v15 }, [x1], #24 +# CHECK: st1.1d { v13, v14, v15, v16 }, [x1], #32 +# CHECK: st1.2d { v15 }, [x2], #16 +# CHECK: st1.2d { v15, v16 }, [x2], #32 +# CHECK: st1.2d { v15, v16, v17 }, [x2], #48 +# CHECK: st1.2d { v15, v16, v17, v18 }, [x2], #64 + +0x21 0xc0 0x40 0x0d +0x21 0xc0 0xc2 0x0d +0x64 0xc4 0x40 0x0d +0x64 0xc4 0xc5 0x0d +0xa9 0xc8 0x40 0x0d +0xa9 0xc8 0xc6 0x0d +0xec 0xcc 0x40 0x0d +0xec 0xcc 0xc8 0x0d + +# CHECK: ld1r.8b { v1 }, [x1] +# CHECK: ld1r.8b { v1 }, [x1], x2 +# CHECK: ld1r.4h { v4 }, [x3] +# CHECK: ld1r.4h { v4 }, [x3], x5 +# CHECK: ld1r.2s { v9 }, [x5] +# CHECK: ld1r.2s { v9 }, [x5], x6 +# CHECK: ld1r.1d { v12 }, [x7] +# CHECK: ld1r.1d { v12 }, [x7], x8 + +0x21 0xc0 0xdf 0x0d +0x21 0xc4 0xdf 0x0d +0x21 0xc8 0xdf 0x0d +0x21 0xcc 0xdf 0x0d + +# CHECK: ld1r.8b { v1 }, [x1], #1 +# CHECK: ld1r.4h { v1 }, [x1], #2 +# CHECK: ld1r.2s { v1 }, [x1], #4 +# CHECK: ld1r.1d { v1 }, [x1], #8 + +0x45 0x80 0x40 0x4c +0x0a 0x88 0x40 0x0c + +# CHECK: ld2.16b { v5, v6 }, [x2] +# CHECK: ld2.2s { v10, v11 }, [x0] + +0x45 0x80 0x00 0x4c +0x0a 0x88 0x00 0x0c + +# CHECK: st2.16b { v5, v6 }, [x2] +# CHECK: st2.2s { v10, v11 }, [x0] + +0x61 0x08 0x20 0x0d +0x82 0x84 0x20 0x4d +0xc3 0x50 0x20 0x0d +0xe4 0x90 0x20 0x4d + +# CHECK: st2.b { v1, v2 }[2], [x3] +# CHECK: st2.d { v2, v3 }[1], [x4] +# CHECK: st2.h { v3, v4 }[2], [x6] +# CHECK: st2.s { v4, v5 }[3], [x7] + +0x61 0x08 0xbf 0x0d +0x82 0x84 0xbf 0x4d +0xa3 0x58 0xbf 0x0d +0xc4 0x80 0xbf 0x4d + +# CHECK: st2.b { v1, v2 }[2], [x3], #2 +# CHECK: st2.d { v2, v3 }[1], [x4], #16 +# CHECK: st2.h { v3, v4 }[3], [x5], #4 +# CHECK: st2.s { v4, v5 }[2], [x6], #8 + +0x61 0x08 0x60 0x0d +0x82 0x84 0x60 0x4d +0xc3 0x50 0x60 0x0d +0xe4 0x90 0x60 0x4d + +# CHECK: ld2.b { v1, v2 }[2], [x3] +# CHECK: ld2.d { v2, v3 }[1], [x4] +# CHECK: ld2.h { v3, v4 }[2], [x6] +# CHECK: ld2.s { v4, v5 }[3], [x7] + +0x61 0x08 0xff 0x0d +0x82 0x84 0xff 0x4d +0xa3 0x58 0xff 0x0d +0xc4 0x80 0xff 0x4d + +# CHECK: ld2.b { v1, v2 }[2], [x3], #2 +# CHECK: ld2.d { v2, v3 }[1], [x4], #16 +# CHECK: ld2.h { v3, v4 }[3], [x5], #4 +# CHECK: ld2.s { v4, v5 }[2], [x6], #8 + +0x61 0x08 0xe4 0x0d +0x82 0x84 0xe6 0x4d +0xa3 0x58 0xe8 0x0d +0xc4 0x80 0xea 0x4d + +# CHECK: ld2.b { v1, v2 }[2], [x3], x4 +# CHECK: ld2.d { v2, v3 }[1], [x4], x6 +# CHECK: ld2.h { v3, v4 }[3], [x5], x8 +# CHECK: ld2.s { v4, v5 }[2], [x6], x10 + +0x61 0x08 0xa4 0x0d +0x82 0x84 0xa6 0x4d +0xa3 0x58 0xa8 0x0d +0xc4 0x80 0xaa 0x4d + +# CHECK: st2.b { v1, v2 }[2], [x3], x4 +# CHECK: st2.d { v2, v3 }[1], [x4], x6 +# CHECK: st2.h { v3, v4 }[3], [x5], x8 +# CHECK: st2.s { v4, v5 }[2], [x6], x10 + +0x64 0x84 0xc5 0x0c +0x0c 0x88 0xc7 0x0c + +# CHECK: ld2.4h { v4, v5 }, [x3], x5 +# CHECK: ld2.2s { v12, v13 }, [x0], x7 + +0x00 0x80 0xdf 0x0c +0x00 0x80 0xdf 0x4c +0x00 0x84 0xdf 0x0c +0x00 0x84 0xdf 0x4c +0x00 0x88 0xdf 0x0c +0x00 0x88 0xdf 0x4c +0x00 0x8c 0xdf 0x4c + +# CHECK: ld2.8b { v0, v1 }, [x0], #16 +# CHECK: ld2.16b { v0, v1 }, [x0], #32 +# CHECK: ld2.4h { v0, v1 }, [x0], #16 +# CHECK: ld2.8h { v0, v1 }, [x0], #32 +# CHECK: ld2.2s { v0, v1 }, [x0], #16 +# CHECK: ld2.4s { v0, v1 }, [x0], #32 +# CHECK: ld2.2d { v0, v1 }, [x0], #32 + +0x64 0x84 0x85 0x0c +0x0c 0x88 0x87 0x0c + +# CHECK: st2.4h { v4, v5 }, [x3], x5 +# CHECK: st2.2s { v12, v13 }, [x0], x7 + +0x00 0x80 0x9f 0x0c +0x00 0x80 0x9f 0x4c +0x00 0x84 0x9f 0x0c +0x00 0x84 0x9f 0x4c +0x00 0x88 0x9f 0x0c +0x00 0x88 0x9f 0x4c +0x00 0x8c 0x9f 0x4c + +# CHECK: st2.8b { v0, v1 }, [x0], #16 +# CHECK: st2.16b { v0, v1 }, [x0], #32 +# CHECK: st2.4h { v0, v1 }, [x0], #16 +# CHECK: st2.8h { v0, v1 }, [x0], #32 +# CHECK: st2.2s { v0, v1 }, [x0], #16 +# CHECK: st2.4s { v0, v1 }, [x0], #32 +# CHECK: st2.2d { v0, v1 }, [x0], #32 + +0x21 0xc0 0x60 0x0d +0x21 0xc0 0xe2 0x0d +0x21 0xc0 0x60 0x4d +0x21 0xc0 0xe2 0x4d +0x21 0xc4 0x60 0x0d +0x21 0xc4 0xe2 0x0d +0x21 0xc4 0x60 0x4d +0x21 0xc4 0xe2 0x4d +0x21 0xc8 0x60 0x0d +0x21 0xc8 0xe2 0x0d +0x21 0xcc 0x60 0x4d +0x21 0xcc 0xe2 0x4d +0x21 0xcc 0x60 0x0d +0x21 0xcc 0xe2 0x0d + +# CHECK: ld2r.8b { v1, v2 }, [x1] +# CHECK: ld2r.8b { v1, v2 }, [x1], x2 +# CHECK: ld2r.16b { v1, v2 }, [x1] +# CHECK: ld2r.16b { v1, v2 }, [x1], x2 +# CHECK: ld2r.4h { v1, v2 }, [x1] +# CHECK: ld2r.4h { v1, v2 }, [x1], x2 +# CHECK: ld2r.8h { v1, v2 }, [x1] +# CHECK: ld2r.8h { v1, v2 }, [x1], x2 +# CHECK: ld2r.2s { v1, v2 }, [x1] +# CHECK: ld2r.2s { v1, v2 }, [x1], x2 +# CHECK: ld2r.2d { v1, v2 }, [x1] +# CHECK: ld2r.2d { v1, v2 }, [x1], x2 +# CHECK: ld2r.1d { v1, v2 }, [x1] +# CHECK: ld2r.1d { v1, v2 }, [x1], x2 + +0x21 0xc0 0xff 0x0d +0x21 0xc0 0xff 0x4d +0x21 0xc4 0xff 0x0d +0x21 0xc4 0xff 0x4d +0x21 0xc8 0xff 0x0d +0x21 0xcc 0xff 0x4d +0x21 0xcc 0xff 0x0d + +# CHECK: ld2r.8b { v1, v2 }, [x1], #2 +# CHECK: ld2r.16b { v1, v2 }, [x1], #2 +# CHECK: ld2r.4h { v1, v2 }, [x1], #4 +# CHECK: ld2r.8h { v1, v2 }, [x1], #4 +# CHECK: ld2r.2s { v1, v2 }, [x1], #8 +# CHECK: ld2r.2d { v1, v2 }, [x1], #16 +# CHECK: ld2r.1d { v1, v2 }, [x1], #16 + +0x21 0x40 0x40 0x0c +0x45 0x40 0x40 0x4c +0x0a 0x48 0x40 0x0c + +# CHECK: ld3.8b { v1, v2, v3 }, [x1] +# CHECK: ld3.16b { v5, v6, v7 }, [x2] +# CHECK: ld3.2s { v10, v11, v12 }, [x0] + +0x21 0x40 0x00 0x0c +0x45 0x40 0x00 0x4c +0x0a 0x48 0x00 0x0c + +# CHECK: st3.8b { v1, v2, v3 }, [x1] +# CHECK: st3.16b { v5, v6, v7 }, [x2] +# CHECK: st3.2s { v10, v11, v12 }, [x0] + +0x61 0x28 0xc4 0x0d +0x82 0xa4 0xc5 0x4d +0xa3 0x78 0xc6 0x0d +0xc4 0xa0 0xc7 0x4d + +# CHECK: ld3.b { v1, v2, v3 }[2], [x3], x4 +# CHECK: ld3.d { v2, v3, v4 }[1], [x4], x5 +# CHECK: ld3.h { v3, v4, v5 }[3], [x5], x6 +# CHECK: ld3.s { v4, v5, v6 }[2], [x6], x7 + +0x61 0x28 0x84 0x0d +0x82 0xa4 0x85 0x4d +0xa3 0x78 0x86 0x0d +0xc4 0xa0 0x87 0x4d + +# CHECK: st3.b { v1, v2, v3 }[2], [x3], x4 +# CHECK: st3.d { v2, v3, v4 }[1], [x4], x5 +# CHECK: st3.h { v3, v4, v5 }[3], [x5], x6 +# CHECK: st3.s { v4, v5, v6 }[2], [x6], x7 + +0x61 0x28 0x9f 0x0d +0x82 0xa4 0x9f 0x4d +0xa3 0x78 0x9f 0x0d +0xc4 0xa0 0x9f 0x4d + +# CHECK: st3.b { v1, v2, v3 }[2], [x3], #3 +# CHECK: st3.d { v2, v3, v4 }[1], [x4], #24 +# CHECK: st3.h { v3, v4, v5 }[3], [x5], #6 +# CHECK: st3.s { v4, v5, v6 }[2], [x6], #12 + +0x41 0x40 0xc3 0x0c +0x42 0x40 0xc4 0x4c +0x64 0x44 0xc5 0x0c +0x87 0x44 0xc6 0x4c +0x0c 0x48 0xc7 0x0c +0x0a 0x48 0xc8 0x4c +0x4f 0x4c 0xca 0x4c + +# CHECK: ld3.8b { v1, v2, v3 }, [x2], x3 +# CHECK: ld3.16b { v2, v3, v4 }, [x2], x4 +# CHECK: ld3.4h { v4, v5, v6 }, [x3], x5 +# CHECK: ld3.8h { v7, v8, v9 }, [x4], x6 +# CHECK: ld3.2s { v12, v13, v14 }, [x0], x7 +# CHECK: ld3.4s { v10, v11, v12 }, [x0], x8 +# CHECK: ld3.2d { v15, v16, v17 }, [x2], x10 + +0x00 0x40 0xdf 0x0c +0x00 0x40 0xdf 0x4c +0x00 0x44 0xdf 0x0c +0x00 0x44 0xdf 0x4c +0x00 0x48 0xdf 0x0c +0x00 0x48 0xdf 0x4c +0x00 0x4c 0xdf 0x4c + +# CHECK: ld3.8b { v0, v1, v2 }, [x0], #24 +# CHECK: ld3.16b { v0, v1, v2 }, [x0], #48 +# CHECK: ld3.4h { v0, v1, v2 }, [x0], #24 +# CHECK: ld3.8h { v0, v1, v2 }, [x0], #48 +# CHECK: ld3.2s { v0, v1, v2 }, [x0], #24 +# CHECK: ld3.4s { v0, v1, v2 }, [x0], #48 +# CHECK: ld3.2d { v0, v1, v2 }, [x0], #48 + +0x41 0x40 0x83 0x0c +0x42 0x40 0x84 0x4c +0x64 0x44 0x85 0x0c +0x87 0x44 0x86 0x4c +0x0c 0x48 0x87 0x0c +0x0a 0x48 0x88 0x4c +0x4f 0x4c 0x8a 0x4c + +# CHECK: st3.8b { v1, v2, v3 }, [x2], x3 +# CHECK: st3.16b { v2, v3, v4 }, [x2], x4 +# CHECK: st3.4h { v4, v5, v6 }, [x3], x5 +# CHECK: st3.8h { v7, v8, v9 }, [x4], x6 +# CHECK: st3.2s { v12, v13, v14 }, [x0], x7 +# CHECK: st3.4s { v10, v11, v12 }, [x0], x8 +# CHECK: st3.2d { v15, v16, v17 }, [x2], x10 + +0x00 0x40 0x9f 0x0c +0x00 0x40 0x9f 0x4c +0x00 0x44 0x9f 0x0c +0x00 0x44 0x9f 0x4c +0x00 0x48 0x9f 0x0c +0x00 0x48 0x9f 0x4c +0x00 0x4c 0x9f 0x4c + +# CHECK: st3.8b { v0, v1, v2 }, [x0], #24 +# CHECK: st3.16b { v0, v1, v2 }, [x0], #48 +# CHECK: st3.4h { v0, v1, v2 }, [x0], #24 +# CHECK: st3.8h { v0, v1, v2 }, [x0], #48 +# CHECK: st3.2s { v0, v1, v2 }, [x0], #24 +# CHECK: st3.4s { v0, v1, v2 }, [x0], #48 +# CHECK: st3.2d { v0, v1, v2 }, [x0], #48 + +0x61 0x28 0x40 0x0d +0x82 0xa4 0x40 0x4d +0xc3 0x70 0x40 0x0d +0xe4 0xb0 0x40 0x4d + +# CHECK: ld3.b { v1, v2, v3 }[2], [x3] +# CHECK: ld3.d { v2, v3, v4 }[1], [x4] +# CHECK: ld3.h { v3, v4, v5 }[2], [x6] +# CHECK: ld3.s { v4, v5, v6 }[3], [x7] + +0x61 0x28 0xdf 0x0d +0x82 0xa4 0xdf 0x4d +0xa3 0x78 0xdf 0x0d +0xc4 0xa0 0xdf 0x4d + +# CHECK: ld3.b { v1, v2, v3 }[2], [x3], #3 +# CHECK: ld3.d { v2, v3, v4 }[1], [x4], #24 +# CHECK: ld3.h { v3, v4, v5 }[3], [x5], #6 +# CHECK: ld3.s { v4, v5, v6 }[2], [x6], #12 + +0x61 0x28 0x00 0x0d +0x82 0xa4 0x00 0x4d +0xc3 0x70 0x00 0x0d +0xe4 0xb0 0x00 0x4d + +# CHECK: st3.b { v1, v2, v3 }[2], [x3] +# CHECK: st3.d { v2, v3, v4 }[1], [x4] +# CHECK: st3.h { v3, v4, v5 }[2], [x6] +# CHECK: st3.s { v4, v5, v6 }[3], [x7] + +0x21 0xe0 0x40 0x0d +0x21 0xe0 0xc2 0x0d +0x21 0xe0 0x40 0x4d +0x21 0xe0 0xc2 0x4d +0x21 0xe4 0x40 0x0d +0x21 0xe4 0xc2 0x0d +0x21 0xe4 0x40 0x4d +0x21 0xe4 0xc2 0x4d +0x21 0xe8 0x40 0x0d +0x21 0xe8 0xc2 0x0d +0x21 0xec 0x40 0x4d +0x21 0xec 0xc2 0x4d +0x21 0xec 0x40 0x0d +0x21 0xec 0xc2 0x0d + +# CHECK: ld3r.8b { v1, v2, v3 }, [x1] +# CHECK: ld3r.8b { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.16b { v1, v2, v3 }, [x1] +# CHECK: ld3r.16b { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.4h { v1, v2, v3 }, [x1] +# CHECK: ld3r.4h { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.8h { v1, v2, v3 }, [x1] +# CHECK: ld3r.8h { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.2s { v1, v2, v3 }, [x1] +# CHECK: ld3r.2s { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.2d { v1, v2, v3 }, [x1] +# CHECK: ld3r.2d { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.1d { v1, v2, v3 }, [x1] +# CHECK: ld3r.1d { v1, v2, v3 }, [x1], x2 + +0x21 0xe0 0xdf 0x0d +0x21 0xe0 0xdf 0x4d +0x21 0xe4 0xdf 0x0d +0x21 0xe4 0xdf 0x4d +0x21 0xe8 0xdf 0x0d +0x21 0xec 0xdf 0x4d +0x21 0xec 0xdf 0x0d + +# CHECK: ld3r.8b { v1, v2, v3 }, [x1], #3 +# CHECK: ld3r.16b { v1, v2, v3 }, [x1], #3 +# CHECK: ld3r.4h { v1, v2, v3 }, [x1], #6 +# CHECK: ld3r.8h { v1, v2, v3 }, [x1], #6 +# CHECK: ld3r.2s { v1, v2, v3 }, [x1], #12 +# CHECK: ld3r.2d { v1, v2, v3 }, [x1], #24 +# CHECK: ld3r.1d { v1, v2, v3 }, [x1], #24 + +0x21 0x00 0x40 0x0c +0x45 0x00 0x40 0x4c +0x0a 0x08 0x40 0x0c + +# CHECK: ld4.8b { v1, v2, v3, v4 }, [x1] +# CHECK: ld4.16b { v5, v6, v7, v8 }, [x2] +# CHECK: ld4.2s { v10, v11, v12, v13 }, [x0] + +0x21 0x00 0x00 0x0c +0x45 0x00 0x00 0x4c +0x0a 0x08 0x00 0x0c + +# CHECK: st4.8b { v1, v2, v3, v4 }, [x1] +# CHECK: st4.16b { v5, v6, v7, v8 }, [x2] +# CHECK: st4.2s { v10, v11, v12, v13 }, [x0] + +0x61 0x28 0xe4 0x0d +0x82 0xa4 0xe5 0x4d +0xa3 0x78 0xe6 0x0d +0xc4 0xa0 0xe7 0x4d + +# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3], x4 +# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4], x5 +# CHECK: ld4.h { v3, v4, v5, v6 }[3], [x5], x6 +# CHECK: ld4.s { v4, v5, v6, v7 }[2], [x6], x7 + +0x61 0x28 0xff 0x0d +0x82 0xa4 0xff 0x4d +0xa3 0x78 0xff 0x0d +0xc4 0xa0 0xff 0x4d + +# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3], #4 +# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4], #32 +# CHECK: ld4.h { v3, v4, v5, v6 }[3], [x5], #8 +# CHECK: ld4.s { v4, v5, v6, v7 }[2], [x6], #16 + +0x61 0x28 0xa4 0x0d +0x82 0xa4 0xa5 0x4d +0xa3 0x78 0xa6 0x0d +0xc4 0xa0 0xa7 0x4d + +# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3], x4 +# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4], x5 +# CHECK: st4.h { v3, v4, v5, v6 }[3], [x5], x6 +# CHECK: st4.s { v4, v5, v6, v7 }[2], [x6], x7 + +0x61 0x28 0xbf 0x0d +0x82 0xa4 0xbf 0x4d +0xa3 0x78 0xbf 0x0d +0xc4 0xa0 0xbf 0x4d + +# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3], #4 +# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4], #32 +# CHECK: st4.h { v3, v4, v5, v6 }[3], [x5], #8 +# CHECK: st4.s { v4, v5, v6, v7 }[2], [x6], #16 + +0x41 0x00 0xc3 0x0c +0x42 0x00 0xc4 0x4c +0x64 0x04 0xc5 0x0c +0x87 0x04 0xc6 0x4c +0x0c 0x08 0xc7 0x0c +0x0a 0x08 0xc8 0x4c +0x4f 0x0c 0xca 0x4c + +# CHECK: ld4.8b { v1, v2, v3, v4 }, [x2], x3 +# CHECK: ld4.16b { v2, v3, v4, v5 }, [x2], x4 +# CHECK: ld4.4h { v4, v5, v6, v7 }, [x3], x5 +# CHECK: ld4.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: ld4.2s { v12, v13, v14, v15 }, [x0], x7 +# CHECK: ld4.4s { v10, v11, v12, v13 }, [x0], x8 +# CHECK: ld4.2d { v15, v16, v17, v18 }, [x2], x10 + +0x00 0x00 0xdf 0x0c +0x00 0x00 0xdf 0x4c +0x00 0x04 0xdf 0x0c +0x00 0x04 0xdf 0x4c +0x00 0x08 0xdf 0x0c +0x00 0x08 0xdf 0x4c +0x00 0x0c 0xdf 0x4c + +# CHECK: ld4.8b { v0, v1, v2, v3 }, [x0], #32 +# CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], #64 +# CHECK: ld4.4h { v0, v1, v2, v3 }, [x0], #32 +# CHECK: ld4.8h { v0, v1, v2, v3 }, [x0], #64 +# CHECK: ld4.2s { v0, v1, v2, v3 }, [x0], #32 +# CHECK: ld4.4s { v0, v1, v2, v3 }, [x0], #64 +# CHECK: ld4.2d { v0, v1, v2, v3 }, [x0], #64 + +0x00 0x00 0x9f 0x0c +0x00 0x00 0x9f 0x4c +0x00 0x04 0x9f 0x0c +0x00 0x04 0x9f 0x4c +0x00 0x08 0x9f 0x0c +0x00 0x08 0x9f 0x4c +0x00 0x0c 0x9f 0x4c + +# CHECK: st4.8b { v0, v1, v2, v3 }, [x0], #32 +# CHECK: st4.16b { v0, v1, v2, v3 }, [x0], #64 +# CHECK: st4.4h { v0, v1, v2, v3 }, [x0], #32 +# CHECK: st4.8h { v0, v1, v2, v3 }, [x0], #64 +# CHECK: st4.2s { v0, v1, v2, v3 }, [x0], #32 +# CHECK: st4.4s { v0, v1, v2, v3 }, [x0], #64 +# CHECK: st4.2d { v0, v1, v2, v3 }, [x0], #64 + +0x41 0x00 0x83 0x0c +0x42 0x00 0x84 0x4c +0x64 0x04 0x85 0x0c +0x87 0x04 0x86 0x4c +0x0c 0x08 0x87 0x0c +0x0a 0x08 0x88 0x4c +0x4f 0x0c 0x8a 0x4c + +# CHECK: st4.8b { v1, v2, v3, v4 }, [x2], x3 +# CHECK: st4.16b { v2, v3, v4, v5 }, [x2], x4 +# CHECK: st4.4h { v4, v5, v6, v7 }, [x3], x5 +# CHECK: st4.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: st4.2s { v12, v13, v14, v15 }, [x0], x7 +# CHECK: st4.4s { v10, v11, v12, v13 }, [x0], x8 +# CHECK: st4.2d { v15, v16, v17, v18 }, [x2], x10 + +0x61 0x28 0x60 0x0d +0x82 0xa4 0x60 0x4d +0xc3 0x70 0x60 0x0d +0xe4 0xb0 0x60 0x4d + +# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3] +# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4] +# CHECK: ld4.h { v3, v4, v5, v6 }[2], [x6] +# CHECK: ld4.s { v4, v5, v6, v7 }[3], [x7] + +0x61 0x28 0x20 0x0d +0x82 0xa4 0x20 0x4d +0xc3 0x70 0x20 0x0d +0xe4 0xb0 0x20 0x4d + +# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3] +# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4] +# CHECK: st4.h { v3, v4, v5, v6 }[2], [x6] +# CHECK: st4.s { v4, v5, v6, v7 }[3], [x7] + +0x21 0xe0 0x60 0x0d +0x21 0xe0 0xe2 0x0d +0x21 0xe0 0x60 0x4d +0x21 0xe0 0xe2 0x4d +0x21 0xe4 0x60 0x0d +0x21 0xe4 0xe2 0x0d +0x21 0xe4 0x60 0x4d +0x21 0xe4 0xe2 0x4d +0x21 0xe8 0x60 0x0d +0x21 0xe8 0xe2 0x0d +0x21 0xec 0x60 0x4d +0x21 0xec 0xe2 0x4d +0x21 0xec 0x60 0x0d +0x21 0xec 0xe2 0x0d + +# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1], x2 + +0x21 0xe0 0xff 0x0d +0x21 0xe0 0xff 0x4d +0x21 0xe4 0xff 0x0d +0x21 0xe4 0xff 0x4d +0x21 0xe8 0xff 0x0d +0x21 0xec 0xff 0x4d +0x21 0xec 0xff 0x0d + +# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1], #4 +# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1], #4 +# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1], #8 +# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1], #8 +# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1], #16 +# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1], #32 +# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1], #32 + +0x20 0xe4 0x00 0x2f +0x20 0xe4 0x00 0x6f +0x20 0xe4 0x00 0x0f +0x20 0xe4 0x00 0x4f + +# CHECK: movi d0, #0x000000000000ff +# CHECK: movi.2d v0, #0x000000000000ff +# CHECK: movi.8b v0, #1 +# CHECK: movi.16b v0, #1 + +0x20 0x04 0x00 0x0f +0x20 0x24 0x00 0x0f +0x20 0x44 0x00 0x0f +0x20 0x64 0x00 0x0f + +# CHECK: movi.2s v0, #1 +# CHECK: movi.2s v0, #1, lsl #8 +# CHECK: movi.2s v0, #1, lsl #16 +# CHECK: movi.2s v0, #1, lsl #24 + +0x20 0x04 0x00 0x4f +0x20 0x24 0x00 0x4f +0x20 0x44 0x00 0x4f +0x20 0x64 0x00 0x4f + +# CHECK: movi.4s v0, #1 +# CHECK: movi.4s v0, #1, lsl #8 +# CHECK: movi.4s v0, #1, lsl #16 +# CHECK: movi.4s v0, #1, lsl #24 + +0x20 0x84 0x00 0x0f +0x20 0xa4 0x00 0x0f + +# CHECK: movi.4h v0, #1 +# CHECK: movi.4h v0, #1, lsl #8 + +0x20 0x84 0x00 0x4f +0x20 0xa4 0x00 0x4f + +# CHECK: movi.8h v0, #1 +# CHECK: movi.8h v0, #1, lsl #8 + +0x20 0x04 0x00 0x2f +0x20 0x24 0x00 0x2f +0x20 0x44 0x00 0x2f +0x20 0x64 0x00 0x2f + +# CHECK: mvni.2s v0, #1 +# CHECK: mvni.2s v0, #1, lsl #8 +# CHECK: mvni.2s v0, #1, lsl #16 +# CHECK: mvni.2s v0, #1, lsl #24 + +0x20 0x04 0x00 0x6f +0x20 0x24 0x00 0x6f +0x20 0x44 0x00 0x6f +0x20 0x64 0x00 0x6f + +# CHECK: mvni.4s v0, #1 +# CHECK: mvni.4s v0, #1, lsl #8 +# CHECK: mvni.4s v0, #1, lsl #16 +# CHECK: mvni.4s v0, #1, lsl #24 + +0x20 0x84 0x00 0x2f +0x20 0xa4 0x00 0x2f + +# CHECK: mvni.4h v0, #1 +# CHECK: mvni.4h v0, #1, lsl #8 + +0x20 0x84 0x00 0x6f +0x20 0xa4 0x00 0x6f + +# CHECK: mvni.8h v0, #1 +# CHECK: mvni.8h v0, #1, lsl #8 + +0x20 0xc4 0x00 0x2f +0x20 0xd4 0x00 0x2f +0x20 0xc4 0x00 0x6f +0x20 0xd4 0x00 0x6f + +# CHECK: mvni.2s v0, #1, msl #8 +# CHECK: mvni.2s v0, #1, msl #16 +# CHECK: mvni.4s v0, #1, msl #8 +# CHECK: mvni.4s v0, #1, msl #16 + +0x00 0x88 0x21 0x2e +0x00 0x98 0x21 0x2e +0x00 0x98 0xa1 0x2e +0x00 0x98 0x21 0x0e +0x00 0x88 0x21 0x0e +0x00 0x88 0xa1 0x0e +0x00 0x98 0xa1 0x0e + +# CHECK: frinta.2s v0, v0 +# CHECK: frintx.2s v0, v0 +# CHECK: frinti.2s v0, v0 +# CHECK: frintm.2s v0, v0 +# CHECK: frintn.2s v0, v0 +# CHECK: frintp.2s v0, v0 +# CHECK: frintz.2s v0, v0 + +#===-------------------------------------------------------------------------=== +# AdvSIMD scalar x index instructions +#===-------------------------------------------------------------------------=== + +0x00 0x18 0xa0 0x5f +0x00 0x18 0xc0 0x5f +0x00 0x58 0xa0 0x5f +0x00 0x58 0xc0 0x5f +0x00 0x98 0xa0 0x7f +0x00 0x98 0xc0 0x7f +0x00 0x98 0xa0 0x5f +0x00 0x98 0xc0 0x5f +0x00 0x38 0x70 0x5f +0x00 0x38 0xa0 0x5f +0x00 0x78 0x70 0x5f +0x00 0xc8 0x70 0x5f +0x00 0xc8 0xa0 0x5f +0x00 0xb8 0x70 0x5f +0x00 0xb8 0xa0 0x5f +0x00 0xd8 0x70 0x5f +0x00 0xd8 0xa0 0x5f + +# CHECK: fmla.s s0, s0, v0[3] +# CHECK: fmla.d d0, d0, v0[1] +# CHECK: fmls.s s0, s0, v0[3] +# CHECK: fmls.d d0, d0, v0[1] +# CHECK: fmulx.s s0, s0, v0[3] +# CHECK: fmulx.d d0, d0, v0[1] +# CHECK: fmul.s s0, s0, v0[3] +# CHECK: fmul.d d0, d0, v0[1] +# CHECK: sqdmlal.h s0, h0, v0[7] +# CHECK: sqdmlal.s d0, s0, v0[3] +# CHECK: sqdmlsl.h s0, h0, v0[7] +# CHECK: sqdmulh.h h0, h0, v0[7] +# CHECK: sqdmulh.s s0, s0, v0[3] +# CHECK: sqdmull.h s0, h0, v0[7] +# CHECK: sqdmull.s d0, s0, v0[3] +# CHECK: sqrdmulh.h h0, h0, v0[7] +# CHECK: sqrdmulh.s s0, s0, v0[3] + +#===-------------------------------------------------------------------------=== +# AdvSIMD vector x index instructions +#===-------------------------------------------------------------------------=== + + 0x00 0x10 0x80 0x0f + 0x00 0x10 0xa0 0x4f + 0x00 0x18 0xc0 0x4f + 0x00 0x50 0x80 0x0f + 0x00 0x50 0xa0 0x4f + 0x00 0x58 0xc0 0x4f + 0x00 0x90 0x80 0x2f + 0x00 0x90 0xa0 0x6f + 0x00 0x98 0xc0 0x6f + 0x00 0x90 0x80 0x0f + 0x00 0x90 0xa0 0x4f + 0x00 0x98 0xc0 0x4f + 0x00 0x00 0x40 0x2f + 0x00 0x00 0x50 0x6f + 0x00 0x08 0x80 0x2f + 0x00 0x08 0xa0 0x6f + 0x00 0x40 0x40 0x2f + 0x00 0x40 0x50 0x6f + 0x00 0x48 0x80 0x2f + 0x00 0x48 0xa0 0x6f + 0x00 0x80 0x40 0x0f + 0x00 0x80 0x50 0x4f + 0x00 0x88 0x80 0x0f + 0x00 0x88 0xa0 0x4f + 0x00 0x20 0x40 0x0f + 0x00 0x20 0x50 0x4f + 0x00 0x28 0x80 0x0f + 0x00 0x28 0xa0 0x4f + 0x00 0x60 0x40 0x0f + 0x00 0x60 0x50 0x4f + 0x00 0x68 0x80 0x0f + 0x00 0x68 0xa0 0x4f + 0x00 0xa0 0x40 0x0f + 0x00 0xa0 0x50 0x4f + 0x00 0xa8 0x80 0x0f + 0x00 0xa8 0xa0 0x4f + 0x00 0x30 0x40 0x0f + 0x00 0x30 0x50 0x4f + 0x00 0x38 0x80 0x0f + 0x00 0x38 0xa0 0x4f + 0x00 0x70 0x40 0x0f + 0x00 0x70 0x50 0x4f + 0x00 0x78 0x80 0x0f + 0x00 0x78 0xa0 0x4f + 0x00 0xc0 0x40 0x0f + 0x00 0xc0 0x50 0x4f + 0x00 0xc8 0x80 0x0f + 0x00 0xc8 0xa0 0x4f + 0x00 0xb0 0x40 0x0f + 0x00 0xb0 0x50 0x4f + 0x00 0xb8 0x80 0x0f + 0x00 0xb8 0xa0 0x4f + 0x00 0xd0 0x40 0x0f + 0x00 0xd0 0x50 0x4f + 0x00 0xd8 0x80 0x0f + 0x00 0xd8 0xa0 0x4f + 0x00 0x20 0x40 0x2f + 0x00 0x20 0x50 0x6f + 0x00 0x28 0x80 0x2f + 0x00 0x28 0xa0 0x6f + 0x00 0x60 0x40 0x2f + 0x00 0x60 0x50 0x6f + 0x00 0x68 0x80 0x2f + 0x00 0x68 0xa0 0x6f + 0x00 0xa0 0x40 0x2f + 0x00 0xa0 0x50 0x6f + 0x00 0xa8 0x80 0x2f + 0x00 0xa8 0xa0 0x6f + +# CHECK: fmla.2s v0, v0, v0[0] +# CHECK: fmla.4s v0, v0, v0[1] +# CHECK: fmla.2d v0, v0, v0[1] +# CHECK: fmls.2s v0, v0, v0[0] +# CHECK: fmls.4s v0, v0, v0[1] +# CHECK: fmls.2d v0, v0, v0[1] +# CHECK: fmulx.2s v0, v0, v0[0] +# CHECK: fmulx.4s v0, v0, v0[1] +# CHECK: fmulx.2d v0, v0, v0[1] +# CHECK: fmul.2s v0, v0, v0[0] +# CHECK: fmul.4s v0, v0, v0[1] +# CHECK: fmul.2d v0, v0, v0[1] +# CHECK: mla.4h v0, v0, v0[0] +# CHECK: mla.8h v0, v0, v0[1] +# CHECK: mla.2s v0, v0, v0[2] +# CHECK: mla.4s v0, v0, v0[3] +# CHECK: mls.4h v0, v0, v0[0] +# CHECK: mls.8h v0, v0, v0[1] +# CHECK: mls.2s v0, v0, v0[2] +# CHECK: mls.4s v0, v0, v0[3] +# CHECK: mul.4h v0, v0, v0[0] +# CHECK: mul.8h v0, v0, v0[1] +# CHECK: mul.2s v0, v0, v0[2] +# CHECK: mul.4s v0, v0, v0[3] +# CHECK: smlal.4s v0, v0, v0[0] +# CHECK: smlal2.4s v0, v0, v0[1] +# CHECK: smlal.2d v0, v0, v0[2] +# CHECK: smlal2.2d v0, v0, v0[3] +# CHECK: smlsl.4s v0, v0, v0[0] +# CHECK: smlsl2.4s v0, v0, v0[1] +# CHECK: smlsl.2d v0, v0, v0[2] +# CHECK: smlsl2.2d v0, v0, v0[3] +# CHECK: smull.4s v0, v0, v0[0] +# CHECK: smull2.4s v0, v0, v0[1] +# CHECK: smull.2d v0, v0, v0[2] +# CHECK: smull2.2d v0, v0, v0[3] +# CHECK: sqdmlal.4s v0, v0, v0[0] +# CHECK: sqdmlal2.4s v0, v0, v0[1] +# CHECK: sqdmlal.2d v0, v0, v0[2] +# CHECK: sqdmlal2.2d v0, v0, v0[3] +# CHECK: sqdmlsl.4s v0, v0, v0[0] +# CHECK: sqdmlsl2.4s v0, v0, v0[1] +# CHECK: sqdmlsl.2d v0, v0, v0[2] +# CHECK: sqdmlsl2.2d v0, v0, v0[3] +# CHECK: sqdmulh.4h v0, v0, v0[0] +# CHECK: sqdmulh.8h v0, v0, v0[1] +# CHECK: sqdmulh.2s v0, v0, v0[2] +# CHECK: sqdmulh.4s v0, v0, v0[3] +# CHECK: sqdmull.4s v0, v0, v0[0] +# CHECK: sqdmull2.4s v0, v0, v0[1] +# CHECK: sqdmull.2d v0, v0, v0[2] +# CHECK: sqdmull2.2d v0, v0, v0[3] +# CHECK: sqrdmulh.4h v0, v0, v0[0] +# CHECK: sqrdmulh.8h v0, v0, v0[1] +# CHECK: sqrdmulh.2s v0, v0, v0[2] +# CHECK: sqrdmulh.4s v0, v0, v0[3] +# CHECK: umlal.4s v0, v0, v0[0] +# CHECK: umlal2.4s v0, v0, v0[1] +# CHECK: umlal.2d v0, v0, v0[2] +# CHECK: umlal2.2d v0, v0, v0[3] +# CHECK: umlsl.4s v0, v0, v0[0] +# CHECK: umlsl2.4s v0, v0, v0[1] +# CHECK: umlsl.2d v0, v0, v0[2] +# CHECK: umlsl2.2d v0, v0, v0[3] +# CHECK: umull.4s v0, v0, v0[0] +# CHECK: umull2.4s v0, v0, v0[1] +# CHECK: umull.2d v0, v0, v0[2] +# CHECK: umull2.2d v0, v0, v0[3] + + +#===-------------------------------------------------------------------------=== +# AdvSIMD scalar + shift instructions +#===-------------------------------------------------------------------------=== + + 0x00 0x54 0x41 0x5f + 0x00 0x54 0x41 0x7f + 0x00 0x9c 0x09 0x5f + 0x00 0x9c 0x12 0x5f + 0x00 0x9c 0x23 0x5f + 0x00 0x8c 0x09 0x7f + 0x00 0x8c 0x12 0x7f + 0x00 0x8c 0x23 0x7f + 0x00 0x64 0x09 0x7f + 0x00 0x64 0x12 0x7f + 0x00 0x64 0x23 0x7f + 0x00 0x64 0x44 0x7f + 0x00 0x74 0x09 0x5f + 0x00 0x74 0x12 0x5f + 0x00 0x74 0x23 0x5f + 0x00 0x74 0x44 0x5f + 0x00 0x94 0x09 0x5f + 0x00 0x94 0x12 0x5f + 0x00 0x94 0x23 0x5f + 0x00 0x84 0x09 0x7f + 0x00 0x84 0x12 0x7f + 0x00 0x84 0x23 0x7f + 0x00 0x44 0x41 0x7f + 0x00 0x24 0x41 0x5f + 0x00 0x34 0x41 0x5f + 0x00 0x04 0x41 0x5f + 0x00 0xe4 0x21 0x7f + 0x00 0xe4 0x42 0x7f + 0x00 0x9c 0x09 0x7f + 0x00 0x9c 0x12 0x7f + 0x00 0x9c 0x23 0x7f + 0x00 0x74 0x09 0x7f + 0x00 0x74 0x12 0x7f + 0x00 0x74 0x23 0x7f + 0x00 0x74 0x44 0x7f + 0x00 0x94 0x09 0x7f + 0x00 0x94 0x12 0x7f + 0x00 0x94 0x23 0x7f + 0x00 0x24 0x41 0x7f + 0x00 0x34 0x41 0x7f + 0x00 0x04 0x41 0x7f + 0x00 0x14 0x41 0x7f + +# CHECK: shl d0, d0, #1 +# CHECK: sli d0, d0, #1 +# CHECK: sqrshrn b0, h0, #7 +# CHECK: sqrshrn h0, s0, #14 +# CHECK: sqrshrn s0, d0, #29 +# CHECK: sqrshrun b0, h0, #7 +# CHECK: sqrshrun h0, s0, #14 +# CHECK: sqrshrun s0, d0, #29 +# CHECK: sqshlu b0, b0, #1 +# CHECK: sqshlu h0, h0, #2 +# CHECK: sqshlu s0, s0, #3 +# CHECK: sqshlu d0, d0, #4 +# CHECK: sqshl b0, b0, #1 +# CHECK: sqshl h0, h0, #2 +# CHECK: sqshl s0, s0, #3 +# CHECK: sqshl d0, d0, #4 +# CHECK: sqshrn b0, h0, #7 +# CHECK: sqshrn h0, s0, #14 +# CHECK: sqshrn s0, d0, #29 +# CHECK: sqshrun b0, h0, #7 +# CHECK: sqshrun h0, s0, #14 +# CHECK: sqshrun s0, d0, #29 +# CHECK: sri d0, d0, #63 +# CHECK: srshr d0, d0, #63 +# CHECK: srsra d0, d0, #63 +# CHECK: sshr d0, d0, #63 +# CHECK: ucvtf s0, s0, #31 +# CHECK: ucvtf d0, d0, #62 +# CHECK: uqrshrn b0, h0, #7 +# CHECK: uqrshrn h0, s0, #14 +# CHECK: uqrshrn s0, d0, #29 +# CHECK: uqshl b0, b0, #1 +# CHECK: uqshl h0, h0, #2 +# CHECK: uqshl s0, s0, #3 +# CHECK: uqshl d0, d0, #4 +# CHECK: uqshrn b0, h0, #7 +# CHECK: uqshrn h0, s0, #14 +# CHECK: uqshrn s0, d0, #29 +# CHECK: urshr d0, d0, #63 +# CHECK: ursra d0, d0, #63 +# CHECK: ushr d0, d0, #63 +# CHECK: usra d0, d0, #63 + +#===-------------------------------------------------------------------------=== +# AdvSIMD vector + shift instructions +#===-------------------------------------------------------------------------=== + + 0x00 0xfc 0x21 0x0f + 0x00 0xfc 0x22 0x4f + 0x00 0xfc 0x43 0x4f + 0x00 0xfc 0x21 0x2f + 0x00 0xfc 0x22 0x6f + 0x00 0xfc 0x43 0x6f + 0x00 0x8c 0x09 0x0f + 0x00 0x8c 0x0a 0x4f + 0x00 0x8c 0x13 0x0f + 0x00 0x8c 0x14 0x4f + 0x00 0x8c 0x25 0x0f + 0x00 0x8c 0x26 0x4f + 0x00 0xe4 0x21 0x0f + 0x00 0xe4 0x22 0x4f + 0x00 0xe4 0x43 0x4f + 0x00 0x54 0x09 0x0f + 0x00 0x54 0x0a 0x4f + 0x00 0x54 0x13 0x0f + 0x00 0x54 0x14 0x4f + 0x00 0x54 0x25 0x0f + 0x00 0x54 0x26 0x4f + 0x00 0x54 0x47 0x4f + 0x00 0x84 0x09 0x0f + 0x00 0x84 0x0a 0x4f + 0x00 0x84 0x13 0x0f + 0x00 0x84 0x14 0x4f + 0x00 0x84 0x25 0x0f + 0x00 0x84 0x26 0x4f + 0x00 0x54 0x09 0x2f + 0x00 0x54 0x0a 0x6f + 0x00 0x54 0x13 0x2f + 0x00 0x54 0x14 0x6f + 0x00 0x54 0x25 0x2f + 0x00 0x54 0x26 0x6f + 0x00 0x54 0x47 0x6f + 0x00 0x9c 0x09 0x0f + 0x00 0x9c 0x0a 0x4f + 0x00 0x9c 0x13 0x0f + 0x00 0x9c 0x14 0x4f + 0x00 0x9c 0x25 0x0f + 0x00 0x9c 0x26 0x4f + 0x00 0x8c 0x09 0x2f + 0x00 0x8c 0x0a 0x6f + 0x00 0x8c 0x13 0x2f + 0x00 0x8c 0x14 0x6f + 0x00 0x8c 0x25 0x2f + 0x00 0x8c 0x26 0x6f + 0x00 0x64 0x09 0x2f + 0x00 0x64 0x0a 0x6f + 0x00 0x64 0x13 0x2f + 0x00 0x64 0x14 0x6f + 0x00 0x64 0x25 0x2f + 0x00 0x64 0x26 0x6f + 0x00 0x64 0x47 0x6f + 0x00 0x74 0x09 0x0f + 0x00 0x74 0x0a 0x4f + 0x00 0x74 0x13 0x0f + 0x00 0x74 0x14 0x4f + 0x00 0x74 0x25 0x0f + 0x00 0x74 0x26 0x4f + 0x00 0x74 0x47 0x4f + 0x00 0x94 0x09 0x0f + 0x00 0x94 0x0a 0x4f + 0x00 0x94 0x13 0x0f + 0x00 0x94 0x14 0x4f + 0x00 0x94 0x25 0x0f + 0x00 0x94 0x26 0x4f + 0x00 0x84 0x09 0x2f + 0x00 0x84 0x0a 0x6f + 0x00 0x84 0x13 0x2f + 0x00 0x84 0x14 0x6f + 0x00 0x84 0x25 0x2f + 0x00 0x84 0x26 0x6f + 0x00 0x44 0x09 0x2f + 0x00 0x44 0x0a 0x6f + 0x00 0x44 0x13 0x2f + 0x00 0x44 0x14 0x6f + 0x00 0x44 0x25 0x2f + 0x00 0x44 0x26 0x6f + 0x00 0x44 0x47 0x6f + 0x00 0x24 0x09 0x0f + 0x00 0x24 0x0a 0x4f + 0x00 0x24 0x13 0x0f + 0x00 0x24 0x14 0x4f + 0x00 0x24 0x25 0x0f + 0x00 0x24 0x26 0x4f + 0x00 0x24 0x47 0x4f + 0x00 0x34 0x09 0x0f + 0x00 0x34 0x0a 0x4f + 0x00 0x34 0x13 0x0f + 0x00 0x34 0x14 0x4f + 0x00 0x34 0x25 0x0f + 0x00 0x34 0x26 0x4f + 0x00 0x34 0x47 0x4f + 0x00 0xa4 0x09 0x0f + 0x00 0xa4 0x0a 0x4f + 0x00 0xa4 0x13 0x0f + 0x00 0xa4 0x14 0x4f + 0x00 0xa4 0x25 0x0f + 0x00 0xa4 0x26 0x4f + 0x00 0x04 0x09 0x0f + 0x00 0x04 0x0a 0x4f + 0x00 0x04 0x13 0x0f + 0x00 0x04 0x14 0x4f + 0x00 0x04 0x25 0x0f + 0x00 0x04 0x26 0x4f + 0x00 0x04 0x47 0x4f + 0x00 0x04 0x09 0x0f + 0x00 0x14 0x0a 0x4f + 0x00 0x14 0x13 0x0f + 0x00 0x14 0x14 0x4f + 0x00 0x14 0x25 0x0f + 0x00 0x14 0x26 0x4f + 0x00 0x14 0x47 0x4f + 0x00 0x14 0x40 0x5f + 0x00 0xe4 0x21 0x2f + 0x00 0xe4 0x22 0x6f + 0x00 0xe4 0x43 0x6f + 0x00 0x9c 0x09 0x2f + 0x00 0x9c 0x0a 0x6f + 0x00 0x9c 0x13 0x2f + 0x00 0x9c 0x14 0x6f + 0x00 0x9c 0x25 0x2f + 0x00 0x9c 0x26 0x6f + 0x00 0x74 0x09 0x2f + 0x00 0x74 0x0a 0x6f + 0x00 0x74 0x13 0x2f + 0x00 0x74 0x14 0x6f + 0x00 0x74 0x25 0x2f + 0x00 0x74 0x26 0x6f + 0x00 0x74 0x47 0x6f + 0x00 0x94 0x09 0x2f + 0x00 0x94 0x0a 0x6f + 0x00 0x94 0x13 0x2f + 0x00 0x94 0x14 0x6f + 0x00 0x94 0x25 0x2f + 0x00 0x94 0x26 0x6f + 0x00 0x24 0x09 0x2f + 0x00 0x24 0x0a 0x6f + 0x00 0x24 0x13 0x2f + 0x00 0x24 0x14 0x6f + 0x00 0x24 0x25 0x2f + 0x00 0x24 0x26 0x6f + 0x00 0x24 0x47 0x6f + 0x00 0x34 0x09 0x2f + 0x00 0x34 0x0a 0x6f + 0x00 0x34 0x13 0x2f + 0x00 0x34 0x14 0x6f + 0x00 0x34 0x25 0x2f + 0x00 0x34 0x26 0x6f + 0x00 0x34 0x47 0x6f + 0x00 0xa4 0x09 0x2f + 0x00 0xa4 0x0a 0x6f + 0x00 0xa4 0x13 0x2f + 0x00 0xa4 0x14 0x6f + 0x00 0xa4 0x25 0x2f + 0x00 0xa4 0x26 0x6f + 0x00 0x04 0x09 0x2f + 0x00 0x04 0x0a 0x6f + 0x00 0x04 0x13 0x2f + 0x00 0x04 0x14 0x6f + 0x00 0x04 0x25 0x2f + 0x00 0x04 0x26 0x6f + 0x00 0x04 0x47 0x6f + 0x00 0x14 0x09 0x2f + 0x00 0x14 0x0a 0x6f + 0x00 0x14 0x13 0x2f + 0x00 0x14 0x14 0x6f + 0x00 0x14 0x25 0x2f + 0x00 0x14 0x26 0x6f + 0x00 0x14 0x47 0x6f + +# CHECK: fcvtzs.2s v0, v0, #31 +# CHECK: fcvtzs.4s v0, v0, #30 +# CHECK: fcvtzs.2d v0, v0, #61 +# CHECK: fcvtzu.2s v0, v0, #31 +# CHECK: fcvtzu.4s v0, v0, #30 +# CHECK: fcvtzu.2d v0, v0, #61 +# CHECK: rshrn.8b v0, v0, #7 +# CHECK: rshrn2.16b v0, v0, #6 +# CHECK: rshrn.4h v0, v0, #13 +# CHECK: rshrn2.8h v0, v0, #12 +# CHECK: rshrn.2s v0, v0, #27 +# CHECK: rshrn2.4s v0, v0, #26 +# CHECK: scvtf.2s v0, v0, #31 +# CHECK: scvtf.4s v0, v0, #30 +# CHECK: scvtf.2d v0, v0, #61 +# CHECK: shl.8b v0, v0, #1 +# CHECK: shl.16b v0, v0, #2 +# CHECK: shl.4h v0, v0, #3 +# CHECK: shl.8h v0, v0, #4 +# CHECK: shl.2s v0, v0, #5 +# CHECK: shl.4s v0, v0, #6 +# CHECK: shl.2d v0, v0, #7 +# CHECK: shrn.8b v0, v0, #7 +# CHECK: shrn2.16b v0, v0, #6 +# CHECK: shrn.4h v0, v0, #13 +# CHECK: shrn2.8h v0, v0, #12 +# CHECK: shrn.2s v0, v0, #27 +# CHECK: shrn2.4s v0, v0, #26 +# CHECK: sli.8b v0, v0, #1 +# CHECK: sli.16b v0, v0, #2 +# CHECK: sli.4h v0, v0, #3 +# CHECK: sli.8h v0, v0, #4 +# CHECK: sli.2s v0, v0, #5 +# CHECK: sli.4s v0, v0, #6 +# CHECK: sli.2d v0, v0, #7 +# CHECK: sqrshrn.8b v0, v0, #7 +# CHECK: sqrshrn2.16b v0, v0, #6 +# CHECK: sqrshrn.4h v0, v0, #13 +# CHECK: sqrshrn2.8h v0, v0, #12 +# CHECK: sqrshrn.2s v0, v0, #27 +# CHECK: sqrshrn2.4s v0, v0, #26 +# CHECK: sqrshrun.8b v0, v0, #7 +# CHECK: sqrshrun2.16b v0, v0, #6 +# CHECK: sqrshrun.4h v0, v0, #13 +# CHECK: sqrshrun2.8h v0, v0, #12 +# CHECK: sqrshrun.2s v0, v0, #27 +# CHECK: sqrshrun2.4s v0, v0, #26 +# CHECK: sqshlu.8b v0, v0, #1 +# CHECK: sqshlu.16b v0, v0, #2 +# CHECK: sqshlu.4h v0, v0, #3 +# CHECK: sqshlu.8h v0, v0, #4 +# CHECK: sqshlu.2s v0, v0, #5 +# CHECK: sqshlu.4s v0, v0, #6 +# CHECK: sqshlu.2d v0, v0, #7 +# CHECK: sqshl.8b v0, v0, #1 +# CHECK: sqshl.16b v0, v0, #2 +# CHECK: sqshl.4h v0, v0, #3 +# CHECK: sqshl.8h v0, v0, #4 +# CHECK: sqshl.2s v0, v0, #5 +# CHECK: sqshl.4s v0, v0, #6 +# CHECK: sqshl.2d v0, v0, #7 +# CHECK: sqshrn.8b v0, v0, #7 +# CHECK: sqshrn2.16b v0, v0, #6 +# CHECK: sqshrn.4h v0, v0, #13 +# CHECK: sqshrn2.8h v0, v0, #12 +# CHECK: sqshrn.2s v0, v0, #27 +# CHECK: sqshrn2.4s v0, v0, #26 +# CHECK: sqshrun.8b v0, v0, #7 +# CHECK: sqshrun2.16b v0, v0, #6 +# CHECK: sqshrun.4h v0, v0, #13 +# CHECK: sqshrun2.8h v0, v0, #12 +# CHECK: sqshrun.2s v0, v0, #27 +# CHECK: sqshrun2.4s v0, v0, #26 +# CHECK: sri.8b v0, v0, #7 +# CHECK: sri.16b v0, v0, #6 +# CHECK: sri.4h v0, v0, #13 +# CHECK: sri.8h v0, v0, #12 +# CHECK: sri.2s v0, v0, #27 +# CHECK: sri.4s v0, v0, #26 +# CHECK: sri.2d v0, v0, #57 +# CHECK: srshr.8b v0, v0, #7 +# CHECK: srshr.16b v0, v0, #6 +# CHECK: srshr.4h v0, v0, #13 +# CHECK: srshr.8h v0, v0, #12 +# CHECK: srshr.2s v0, v0, #27 +# CHECK: srshr.4s v0, v0, #26 +# CHECK: srshr.2d v0, v0, #57 +# CHECK: srsra.8b v0, v0, #7 +# CHECK: srsra.16b v0, v0, #6 +# CHECK: srsra.4h v0, v0, #13 +# CHECK: srsra.8h v0, v0, #12 +# CHECK: srsra.2s v0, v0, #27 +# CHECK: srsra.4s v0, v0, #26 +# CHECK: srsra.2d v0, v0, #57 +# CHECK: sshll.8h v0, v0, #1 +# CHECK: sshll2.8h v0, v0, #2 +# CHECK: sshll.4s v0, v0, #3 +# CHECK: sshll2.4s v0, v0, #4 +# CHECK: sshll.2d v0, v0, #5 +# CHECK: sshll2.2d v0, v0, #6 +# CHECK: sshr.8b v0, v0, #7 +# CHECK: sshr.16b v0, v0, #6 +# CHECK: sshr.4h v0, v0, #13 +# CHECK: sshr.8h v0, v0, #12 +# CHECK: sshr.2s v0, v0, #27 +# CHECK: sshr.4s v0, v0, #26 +# CHECK: sshr.2d v0, v0, #57 +# CHECK: sshr.8b v0, v0, #7 +# CHECK: ssra.16b v0, v0, #6 +# CHECK: ssra.4h v0, v0, #13 +# CHECK: ssra.8h v0, v0, #12 +# CHECK: ssra.2s v0, v0, #27 +# CHECK: ssra.4s v0, v0, #26 +# CHECK: ssra.2d v0, v0, #57 +# CHECK: ssra d0, d0, #64 +# CHECK: ucvtf.2s v0, v0, #31 +# CHECK: ucvtf.4s v0, v0, #30 +# CHECK: ucvtf.2d v0, v0, #61 +# CHECK: uqrshrn.8b v0, v0, #7 +# CHECK: uqrshrn2.16b v0, v0, #6 +# CHECK: uqrshrn.4h v0, v0, #13 +# CHECK: uqrshrn2.8h v0, v0, #12 +# CHECK: uqrshrn.2s v0, v0, #27 +# CHECK: uqrshrn2.4s v0, v0, #26 +# CHECK: uqshl.8b v0, v0, #1 +# CHECK: uqshl.16b v0, v0, #2 +# CHECK: uqshl.4h v0, v0, #3 +# CHECK: uqshl.8h v0, v0, #4 +# CHECK: uqshl.2s v0, v0, #5 +# CHECK: uqshl.4s v0, v0, #6 +# CHECK: uqshl.2d v0, v0, #7 +# CHECK: uqshrn.8b v0, v0, #7 +# CHECK: uqshrn2.16b v0, v0, #6 +# CHECK: uqshrn.4h v0, v0, #13 +# CHECK: uqshrn2.8h v0, v0, #12 +# CHECK: uqshrn.2s v0, v0, #27 +# CHECK: uqshrn2.4s v0, v0, #26 +# CHECK: urshr.8b v0, v0, #7 +# CHECK: urshr.16b v0, v0, #6 +# CHECK: urshr.4h v0, v0, #13 +# CHECK: urshr.8h v0, v0, #12 +# CHECK: urshr.2s v0, v0, #27 +# CHECK: urshr.4s v0, v0, #26 +# CHECK: urshr.2d v0, v0, #57 +# CHECK: ursra.8b v0, v0, #7 +# CHECK: ursra.16b v0, v0, #6 +# CHECK: ursra.4h v0, v0, #13 +# CHECK: ursra.8h v0, v0, #12 +# CHECK: ursra.2s v0, v0, #27 +# CHECK: ursra.4s v0, v0, #26 +# CHECK: ursra.2d v0, v0, #57 +# CHECK: ushll.8h v0, v0, #1 +# CHECK: ushll2.8h v0, v0, #2 +# CHECK: ushll.4s v0, v0, #3 +# CHECK: ushll2.4s v0, v0, #4 +# CHECK: ushll.2d v0, v0, #5 +# CHECK: ushll2.2d v0, v0, #6 +# CHECK: ushr.8b v0, v0, #7 +# CHECK: ushr.16b v0, v0, #6 +# CHECK: ushr.4h v0, v0, #13 +# CHECK: ushr.8h v0, v0, #12 +# CHECK: ushr.2s v0, v0, #27 +# CHECK: ushr.4s v0, v0, #26 +# CHECK: ushr.2d v0, v0, #57 +# CHECK: usra.8b v0, v0, #7 +# CHECK: usra.16b v0, v0, #6 +# CHECK: usra.4h v0, v0, #13 +# CHECK: usra.8h v0, v0, #12 +# CHECK: usra.2s v0, v0, #27 +# CHECK: usra.4s v0, v0, #26 +# CHECK: usra.2d v0, v0, #57 + + + 0x00 0xe0 0x20 0x0e + 0x00 0xe0 0x20 0x4e + 0x00 0xe0 0xe0 0x0e + 0x00 0xe0 0xe0 0x4e + +# CHECK: pmull.8h v0, v0, v0 +# CHECK: pmull2.8h v0, v0, v0 +# CHECK: pmull.1q v0, v0, v0 +# CHECK: pmull2.1q v0, v0, v0 + + 0x41 0xd8 0x70 0x7e + 0x83 0xd8 0x30 0x7e +# CHECK: faddp.2d d1, v2 +# CHECK: faddp.2s s3, v4 + + 0x82 0x60 0x01 0x4e + 0x80 0x60 0x01 0x0e + 0xa2 0x00 0x01 0x4e + 0xa0 0x00 0x01 0x0e + 0xa2 0x40 0x01 0x4e + 0xa0 0x40 0x01 0x0e + 0xc2 0x20 0x01 0x4e + 0xc0 0x20 0x01 0x0e + +# CHECK: tbl.16b v2, { v4, v5, v6, v7 }, v1 +# CHECK: tbl.8b v0, { v4, v5, v6, v7 }, v1 +# CHECK: tbl.16b v2, { v5 }, v1 +# CHECK: tbl.8b v0, { v5 }, v1 +# CHECK: tbl.16b v2, { v5, v6, v7 }, v1 +# CHECK: tbl.8b v0, { v5, v6, v7 }, v1 +# CHECK: tbl.16b v2, { v6, v7 }, v1 +# CHECK: tbl.8b v0, { v6, v7 }, v1 +# + 0x82 0x70 0x01 0x4e + 0x80 0x70 0x01 0x0e + 0xa2 0x10 0x01 0x4e + 0xa0 0x10 0x01 0x0e + 0xa2 0x50 0x01 0x4e + 0xa0 0x50 0x01 0x0e + 0xc2 0x30 0x01 0x4e + 0xc0 0x30 0x01 0x0e + +# CHECK: tbx.16b v2, { v4, v5, v6, v7 }, v1 +# CHECK: tbx.8b v0, { v4, v5, v6, v7 }, v1 +# CHECK: tbx.16b v2, { v5 }, v1 +# CHECK: tbx.8b v0, { v5 }, v1 +# CHECK: tbx.16b v2, { v5, v6, v7 }, v1 +# CHECK: tbx.8b v0, { v5, v6, v7 }, v1 +# CHECK: tbx.16b v2, { v6, v7 }, v1 +# CHECK: tbx.8b v0, { v6, v7 }, v1 +# + +0x00 0x80 0x20 0x0e +0x00 0x80 0x20 0x4e +0x00 0x80 0xa0 0x0e +0x00 0x80 0xa0 0x4e + +# CHECK: smlal.8h v0, v0, v0 +# CHECK: smlal2.8h v0, v0, v0 +# CHECK: smlal.2d v0, v0, v0 +# CHECK: smlal2.2d v0, v0, v0 + +0x00 0x80 0x20 0x2e +0x00 0x80 0x20 0x6e +0x00 0x80 0xa0 0x2e +0x00 0x80 0xa0 0x6e + +# CHECK: umlal.8h v0, v0, v0 +# CHECK: umlal2.8h v0, v0, v0 +# CHECK: umlal.2d v0, v0, v0 +# CHECK: umlal2.2d v0, v0, v0 + +0x00 0x90 0x60 0x5e +0x00 0x90 0xa0 0x5e +0x00 0xb0 0x60 0x5e +0x00 0xb0 0xa0 0x5e + +# CHECK: sqdmlal s0, h0, h0 +# CHECK: sqdmlal d0, s0, s0 +# CHECK: sqdmlsl s0, h0, h0 +# CHECK: sqdmlsl d0, s0, s0 + +0xaa 0xc5 0xc7 0x4d +0xaa 0xc9 0xc7 0x4d +0xaa 0xc1 0xc7 0x4d + +# CHECK: ld1r.8h { v10 }, [x13], x7 +# CHECK: ld1r.4s { v10 }, [x13], x7 +# CHECK: ld1r.16b { v10 }, [x13], x7 + +0x00 0xd0 0x60 0x5e +0x00 0xd0 0xa0 0x5e +# CHECK: sqdmull s0, h0, h0 +# CHECK: sqdmull d0, s0, s0 + +0x00 0xd8 0xa1 0x7e +0x00 0xd8 0xe1 0x7e + +# CHECK: frsqrte s0, s0 +# CHECK: frsqrte d0, d0 + +0xca 0xcd 0xc7 0x4d +0xea 0xc9 0xe7 0x4d +0xea 0xe9 0xc7 0x4d +0xea 0xe9 0xe7 0x4d +# CHECK: ld1r.2d { v10 }, [x14], x7 +# CHECK: ld2r.4s { v10, v11 }, [x15], x7 +# CHECK: ld3r.4s { v10, v11, v12 }, [x15], x7 +# CHECK: ld4r.4s { v10, v11, v12, v13 }, [x15], x7 + +#===-------------------------------------------------------------------------=== +# AdvSIMD scalar three same +#===-------------------------------------------------------------------------=== +0x62 0xdc 0x21 0x5e +# CHECK: fmulx s2, s3, s1 +0x62 0xdc 0x61 0x5e +# CHECK: fmulx d2, d3, d1 + + +# rdar://12511369 +0xe8 0x6b 0xdf 0x4c +# CHECK: ld1.4s { v8, v9, v10 }, [sp], #48 diff --git a/test/MC/Disassembler/ARM64/arithmetic.txt b/test/MC/Disassembler/ARM64/arithmetic.txt new file mode 100644 index 0000000..3981219 --- /dev/null +++ b/test/MC/Disassembler/ARM64/arithmetic.txt @@ -0,0 +1,522 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#==---------------------------------------------------------------------------== +# Add/Subtract with carry/borrow +#==---------------------------------------------------------------------------== + +0x41 0x00 0x03 0x1a +0x41 0x00 0x03 0x9a +0x85 0x00 0x03 0x3a +0x85 0x00 0x03 0xba + +# CHECK: adc w1, w2, w3 +# CHECK: adc x1, x2, x3 +# CHECK: adcs w5, w4, w3 +# CHECK: adcs x5, x4, x3 + +0x41 0x00 0x03 0x5a +0x41 0x00 0x03 0xda +0x41 0x00 0x03 0x7a +0x41 0x00 0x03 0xfa + +# CHECK: sbc w1, w2, w3 +# CHECK: sbc x1, x2, x3 +# CHECK: sbcs w1, w2, w3 +# CHECK: sbcs x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Add/Subtract with (optionally shifted) immediate +#==---------------------------------------------------------------------------== + +0x83 0x00 0x10 0x11 +0x83 0x00 0x10 0x91 + +# CHECK: add w3, w4, #1024 +# CHECK: add x3, x4, #1024 + +0x83 0x00 0x50 0x11 +0x83 0x00 0x40 0x11 +0x83 0x00 0x50 0x91 +0x83 0x00 0x40 0x91 +0xff 0x83 0x00 0x91 + +# CHECK: add w3, w4, #4194304 +# CHECK: add x3, x4, #4194304 +# CHECK: add x3, x4, #0, lsl #12 +# CHECK: add sp, sp, #32 + +0x83 0x00 0x10 0x31 +0x83 0x00 0x50 0x31 +0x83 0x00 0x10 0xb1 +0x83 0x00 0x50 0xb1 + +# CHECK: adds w3, w4, #1024 +# CHECK: adds w3, w4, #4194304 +# CHECK: adds x3, x4, #1024 +# CHECK: adds x3, x4, #4194304 + +0x83 0x00 0x10 0x51 +0x83 0x00 0x50 0x51 +0x83 0x00 0x10 0xd1 +0x83 0x00 0x50 0xd1 +0xff 0x83 0x00 0xd1 + +# CHECK: sub w3, w4, #1024 +# CHECK: sub w3, w4, #4194304 +# CHECK: sub x3, x4, #1024 +# CHECK: sub x3, x4, #4194304 +# CHECK: sub sp, sp, #32 + +0x83 0x00 0x10 0x71 +0x83 0x00 0x50 0x71 +0x83 0x00 0x10 0xf1 +0x83 0x00 0x50 0xf1 + +# CHECK: subs w3, w4, #1024 +# CHECK: subs w3, w4, #4194304 +# CHECK: subs x3, x4, #1024 +# CHECK: subs x3, x4, #4194304 + +#==---------------------------------------------------------------------------== +# Add/Subtract register with (optional) shift +#==---------------------------------------------------------------------------== + +0xac 0x01 0x0e 0x0b +0xac 0x01 0x0e 0x8b +0xac 0x31 0x0e 0x0b +0xac 0x31 0x0e 0x8b +0xac 0xa9 0x4e 0x0b +0xac 0xa9 0x4e 0x8b +0xac 0x9d 0x8e 0x0b +0xac 0x9d 0x8e 0x8b + +# CHECK: add w12, w13, w14 +# CHECK: add x12, x13, x14 +# CHECK: add w12, w13, w14, lsl #12 +# CHECK: add x12, x13, x14, lsl #12 +# CHECK: add w12, w13, w14, lsr #42 +# CHECK: add x12, x13, x14, lsr #42 +# CHECK: add w12, w13, w14, asr #39 +# CHECK: add x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x4b +0xac 0x01 0x0e 0xcb +0xac 0x31 0x0e 0x4b +0xac 0x31 0x0e 0xcb +0xac 0xa9 0x4e 0x4b +0xac 0xa9 0x4e 0xcb +0xac 0x9d 0x8e 0x4b +0xac 0x9d 0x8e 0xcb + +# CHECK: sub w12, w13, w14 +# CHECK: sub x12, x13, x14 +# CHECK: sub w12, w13, w14, lsl #12 +# CHECK: sub x12, x13, x14, lsl #12 +# CHECK: sub w12, w13, w14, lsr #42 +# CHECK: sub x12, x13, x14, lsr #42 +# CHECK: sub w12, w13, w14, asr #39 +# CHECK: sub x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x2b +0xac 0x01 0x0e 0xab +0xac 0x31 0x0e 0x2b +0xac 0x31 0x0e 0xab +0xac 0xa9 0x4e 0x2b +0xac 0xa9 0x4e 0xab +0xac 0x9d 0x8e 0x2b +0xac 0x9d 0x8e 0xab + +# CHECK: adds w12, w13, w14 +# CHECK: adds x12, x13, x14 +# CHECK: adds w12, w13, w14, lsl #12 +# CHECK: adds x12, x13, x14, lsl #12 +# CHECK: adds w12, w13, w14, lsr #42 +# CHECK: adds x12, x13, x14, lsr #42 +# CHECK: adds w12, w13, w14, asr #39 +# CHECK: adds x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x6b +0xac 0x01 0x0e 0xeb +0xac 0x31 0x0e 0x6b +0xac 0x31 0x0e 0xeb +0xac 0xa9 0x4e 0x6b +0xac 0xa9 0x4e 0xeb +0xac 0x9d 0x8e 0x6b +0xac 0x9d 0x8e 0xeb + +# CHECK: subs w12, w13, w14 +# CHECK: subs x12, x13, x14 +# CHECK: subs w12, w13, w14, lsl #12 +# CHECK: subs x12, x13, x14, lsl #12 +# CHECK: subs w12, w13, w14, lsr #42 +# CHECK: subs x12, x13, x14, lsr #42 +# CHECK: subs w12, w13, w14, asr #39 +# CHECK: subs x12, x13, x14, asr #39 + +#==---------------------------------------------------------------------------== +# Add/Subtract with (optional) extend +#==---------------------------------------------------------------------------== + +0x41 0x00 0x23 0x0b +0x41 0x20 0x23 0x0b +0x41 0x40 0x23 0x0b +0x41 0x60 0x23 0x0b +0x41 0x80 0x23 0x0b +0x41 0xa0 0x23 0x0b +0x41 0xc0 0x23 0x0b +0x41 0xe0 0x23 0x0b + +# CHECK: add w1, w2, w3, uxtb +# CHECK: add w1, w2, w3, uxth +# CHECK: add w1, w2, w3, uxtw +# CHECK: add w1, w2, w3, uxtx +# CHECK: add w1, w2, w3, sxtb +# CHECK: add w1, w2, w3, sxth +# CHECK: add w1, w2, w3, sxtw +# CHECK: add w1, w2, w3, sxtx + +0x41 0x00 0x23 0x8b +0x41 0x20 0x23 0x8b +0x41 0x40 0x23 0x8b +0x41 0x80 0x23 0x8b +0x41 0xa0 0x23 0x8b +0x41 0xc0 0x23 0x8b + +# CHECK: add x1, x2, w3, uxtb +# CHECK: add x1, x2, w3, uxth +# CHECK: add x1, x2, w3, uxtw +# CHECK: add x1, x2, w3, sxtb +# CHECK: add x1, x2, w3, sxth +# CHECK: add x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x0b +0xe1 0x43 0x23 0x0b +0x5f 0x60 0x23 0x8b +0x5f 0x60 0x23 0x8b + +# CHECK: add w1, wsp, w3 +# CHECK: add w1, wsp, w3 +# CHECK: add sp, x2, x3 +# CHECK: add sp, x2, x3 + +0x41 0x00 0x23 0x4b +0x41 0x20 0x23 0x4b +0x41 0x40 0x23 0x4b +0x41 0x60 0x23 0x4b +0x41 0x80 0x23 0x4b +0x41 0xa0 0x23 0x4b +0x41 0xc0 0x23 0x4b +0x41 0xe0 0x23 0x4b + +# CHECK: sub w1, w2, w3, uxtb +# CHECK: sub w1, w2, w3, uxth +# CHECK: sub w1, w2, w3, uxtw +# CHECK: sub w1, w2, w3, uxtx +# CHECK: sub w1, w2, w3, sxtb +# CHECK: sub w1, w2, w3, sxth +# CHECK: sub w1, w2, w3, sxtw +# CHECK: sub w1, w2, w3, sxtx + +0x41 0x00 0x23 0xcb +0x41 0x20 0x23 0xcb +0x41 0x40 0x23 0xcb +0x41 0x80 0x23 0xcb +0x41 0xa0 0x23 0xcb +0x41 0xc0 0x23 0xcb + +# CHECK: sub x1, x2, w3, uxtb +# CHECK: sub x1, x2, w3, uxth +# CHECK: sub x1, x2, w3, uxtw +# CHECK: sub x1, x2, w3, sxtb +# CHECK: sub x1, x2, w3, sxth +# CHECK: sub x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x4b +0xe1 0x43 0x23 0x4b +0x5f 0x60 0x23 0xcb +0x5f 0x60 0x23 0xcb + +# CHECK: sub w1, wsp, w3 +# CHECK: sub w1, wsp, w3 +# CHECK: sub sp, x2, x3 +# CHECK: sub sp, x2, x3 + +0x41 0x00 0x23 0x2b +0x41 0x20 0x23 0x2b +0x41 0x40 0x23 0x2b +0x41 0x60 0x23 0x2b +0x41 0x80 0x23 0x2b +0x41 0xa0 0x23 0x2b +0x41 0xc0 0x23 0x2b +0x41 0xe0 0x23 0x2b + +# CHECK: adds w1, w2, w3, uxtb +# CHECK: adds w1, w2, w3, uxth +# CHECK: adds w1, w2, w3, uxtw +# CHECK: adds w1, w2, w3, uxtx +# CHECK: adds w1, w2, w3, sxtb +# CHECK: adds w1, w2, w3, sxth +# CHECK: adds w1, w2, w3, sxtw +# CHECK: adds w1, w2, w3, sxtx + +0x41 0x00 0x23 0xab +0x41 0x20 0x23 0xab +0x41 0x40 0x23 0xab +0x41 0x80 0x23 0xab +0x41 0xa0 0x23 0xab +0x41 0xc0 0x23 0xab + +# CHECK: adds x1, x2, w3, uxtb +# CHECK: adds x1, x2, w3, uxth +# CHECK: adds x1, x2, w3, uxtw +# CHECK: adds x1, x2, w3, sxtb +# CHECK: adds x1, x2, w3, sxth +# CHECK: adds x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x2b +0xe1 0x43 0x23 0x2b + +# CHECK: adds w1, wsp, w3 +# CHECK: adds w1, wsp, w3 + +0x41 0x00 0x23 0x6b +0x41 0x20 0x23 0x6b +0x41 0x40 0x23 0x6b +0x41 0x60 0x23 0x6b +0x41 0x80 0x23 0x6b +0x41 0xa0 0x23 0x6b +0x41 0xc0 0x23 0x6b +0x41 0xe0 0x23 0x6b + +# CHECK: subs w1, w2, w3, uxtb +# CHECK: subs w1, w2, w3, uxth +# CHECK: subs w1, w2, w3, uxtw +# CHECK: subs w1, w2, w3, uxtx +# CHECK: subs w1, w2, w3, sxtb +# CHECK: subs w1, w2, w3, sxth +# CHECK: subs w1, w2, w3, sxtw +# CHECK: subs w1, w2, w3, sxtx + +0x41 0x00 0x23 0xeb +0x41 0x20 0x23 0xeb +0x41 0x40 0x23 0xeb +0x41 0x80 0x23 0xeb +0x41 0xa0 0x23 0xeb +0x41 0xc0 0x23 0xeb + +# CHECK: subs x1, x2, w3, uxtb +# CHECK: subs x1, x2, w3, uxth +# CHECK: subs x1, x2, w3, uxtw +# CHECK: subs x1, x2, w3, sxtb +# CHECK: subs x1, x2, w3, sxth +# CHECK: subs x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x6b +0xe1 0x43 0x23 0x6b + +# CHECK: subs w1, wsp, w3 +# CHECK: subs w1, wsp, w3 + +0x1f 0x41 0x28 0xeb +0x3f 0x41 0x28 0x6b +0xff 0x43 0x28 0x6b +0xff 0x43 0x28 0xeb + +# CHECK: cmp x8, w8, uxtw +# CHECK: cmp w9, w8, uxtw +# CHECK: cmp wsp, w8 +# CHECK: cmp sp, w8 + +0x3f 0x41 0x28 0x4b +0xe1 0x43 0x28 0x4b +0xff 0x43 0x28 0x4b +0x3f 0x41 0x28 0xcb +0xe1 0x43 0x28 0xcb +0xff 0x43 0x28 0xcb +0xe1 0x43 0x28 0x6b +0xe1 0x43 0x28 0xeb + +# CHECK: sub wsp, w9, w8 +# CHECK: sub w1, wsp, w8 +# CHECK: sub wsp, wsp, w8 +# CHECK: sub sp, x9, w8 +# CHECK: sub x1, sp, w8 +# CHECK: sub sp, sp, w8 +# CHECK: subs w1, wsp, w8 +# CHECK: subs x1, sp, w8 + +#==---------------------------------------------------------------------------== +# Signed/Unsigned divide +#==---------------------------------------------------------------------------== + +0x41 0x0c 0xc3 0x1a +0x41 0x0c 0xc3 0x9a +0x41 0x08 0xc3 0x1a +0x41 0x08 0xc3 0x9a + +# CHECK: sdiv w1, w2, w3 +# CHECK: sdiv x1, x2, x3 +# CHECK: udiv w1, w2, w3 +# CHECK: udiv x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Variable shifts +#==---------------------------------------------------------------------------== + + 0x41 0x28 0xc3 0x1a +# CHECK: asrv w1, w2, w3 + 0x41 0x28 0xc3 0x9a +# CHECK: asrv x1, x2, x3 + 0x41 0x20 0xc3 0x1a +# CHECK: lslv w1, w2, w3 + 0x41 0x20 0xc3 0x9a +# CHECK: lslv x1, x2, x3 + 0x41 0x24 0xc3 0x1a +# CHECK: lsrv w1, w2, w3 + 0x41 0x24 0xc3 0x9a +# CHECK: lsrv x1, x2, x3 + 0x41 0x2c 0xc3 0x1a +# CHECK: rorv w1, w2, w3 + 0x41 0x2c 0xc3 0x9a +# CHECK: rorv x1, x2, x3 + +#==---------------------------------------------------------------------------== +# One operand instructions +#==---------------------------------------------------------------------------== + + 0x41 0x14 0xc0 0x5a +# CHECK: cls w1, w2 + 0x41 0x14 0xc0 0xda +# CHECK: cls x1, x2 + 0x41 0x10 0xc0 0x5a +# CHECK: clz w1, w2 + 0x41 0x10 0xc0 0xda +# CHECK: clz x1, x2 + 0x41 0x00 0xc0 0x5a +# CHECK: rbit w1, w2 + 0x41 0x00 0xc0 0xda +# CHECK: rbit x1, x2 + 0x41 0x08 0xc0 0x5a +# CHECK: rev w1, w2 + 0x41 0x0c 0xc0 0xda +# CHECK: rev x1, x2 + 0x41 0x04 0xc0 0x5a +# CHECK: rev16 w1, w2 + 0x41 0x04 0xc0 0xda +# CHECK: rev16 x1, x2 + 0x41 0x08 0xc0 0xda +# CHECK: rev32 x1, x2 + +#==---------------------------------------------------------------------------== +# 6.6.1 Multiply-add instructions +#==---------------------------------------------------------------------------== + +0x41 0x10 0x03 0x1b +0x41 0x10 0x03 0x9b +0x41 0x90 0x03 0x1b +0x41 0x90 0x03 0x9b +0x41 0x10 0x23 0x9b +0x41 0x90 0x23 0x9b +0x41 0x10 0xa3 0x9b +0x41 0x90 0xa3 0x9b + +# CHECK: madd w1, w2, w3, w4 +# CHECK: madd x1, x2, x3, x4 +# CHECK: msub w1, w2, w3, w4 +# CHECK: msub x1, x2, x3, x4 +# CHECK: smaddl x1, w2, w3, x4 +# CHECK: smsubl x1, w2, w3, x4 +# CHECK: umaddl x1, w2, w3, x4 +# CHECK: umsubl x1, w2, w3, x4 + +#==---------------------------------------------------------------------------== +# Multiply-high instructions +#==---------------------------------------------------------------------------== + +0x41 0x7c 0x43 0x9b +0x41 0x7c 0xc3 0x9b + +# CHECK: smulh x1, x2, x3 +# CHECK: umulh x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Move immediate instructions +#==---------------------------------------------------------------------------== + +0x20 0x00 0x80 0x52 +0x20 0x00 0x80 0xd2 +0x20 0x00 0xa0 0x52 +0x20 0x00 0xa0 0xd2 + +# CHECK: movz w0, #1 +# CHECK: movz x0, #1 +# CHECK: movz w0, #1, lsl #16 +# CHECK: movz x0, #1, lsl #16 + +0x40 0x00 0x80 0x12 +0x40 0x00 0x80 0x92 +0x40 0x00 0xa0 0x12 +0x40 0x00 0xa0 0x92 + +# CHECK: movn w0, #2 +# CHECK: movn x0, #2 +# CHECK: movn w0, #2, lsl #16 +# CHECK: movn x0, #2, lsl #16 + +0x20 0x00 0x80 0x72 +0x20 0x00 0x80 0xf2 +0x20 0x00 0xa0 0x72 +0x20 0x00 0xa0 0xf2 + +# CHECK: movk w0, #1 +# CHECK: movk x0, #1 +# CHECK: movk w0, #1, lsl #16 +# CHECK: movk x0, #1, lsl #16 + +#==---------------------------------------------------------------------------== +# Conditionally set flags instructions +#==---------------------------------------------------------------------------== + + 0x1f 0x00 0x00 0x31 +# CHECK: cmn w0, #0 + 0x1f 0xfc 0x03 0xb1 +# CHECK: x0, #255 + + 0x23 0x08 0x42 0x3a +# CHECK: ccmn w1, #2, #3, eq + 0x23 0x08 0x42 0xba +# CHECK: ccmn x1, #2, #3, eq + 0x23 0x08 0x42 0x7a +# CHECK: ccmp w1, #2, #3, eq + 0x23 0x08 0x42 0xfa +# CHECK: ccmp x1, #2, #3, eq + + 0x23 0x00 0x42 0x3a +# CHECK: ccmn w1, w2, #3, eq + 0x23 0x00 0x42 0xba +# CHECK: ccmn x1, x2, #3, eq + 0x23 0x00 0x42 0x7a +# CHECK: ccmp w1, w2, #3, eq + 0x23 0x00 0x42 0xfa +# CHECK: ccmp x1, x2, #3, eq + +#==---------------------------------------------------------------------------== +# Conditional select instructions +#==---------------------------------------------------------------------------== + + 0x41 0x00 0x83 0x1a +# CHECK: csel w1, w2, w3, eq + 0x41 0x00 0x83 0x9a +# CHECK: csel x1, x2, x3, eq + 0x41 0x04 0x83 0x1a +# CHECK: csinc w1, w2, w3, eq + 0x41 0x04 0x83 0x9a +# CHECK: csinc x1, x2, x3, eq + 0x41 0x00 0x83 0x5a +# CHECK: csinv w1, w2, w3, eq + 0x41 0x00 0x83 0xda +# CHECK: csinv x1, x2, x3, eq + 0x41 0x04 0x83 0x5a +# CHECK: csneg w1, w2, w3, eq + 0x41 0x04 0x83 0xda +# CHECK: csneg x1, x2, x3, eq diff --git a/test/MC/Disassembler/ARM64/bitfield.txt b/test/MC/Disassembler/ARM64/bitfield.txt new file mode 100644 index 0000000..99e7af1 --- /dev/null +++ b/test/MC/Disassembler/ARM64/bitfield.txt @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#==---------------------------------------------------------------------------== +# 5.4.4 Bitfield Operations +#==---------------------------------------------------------------------------== + +0x41 0x3c 0x01 0x33 +0x41 0x3c 0x41 0xb3 +0x41 0x3c 0x01 0x13 +0x41 0x3c 0x41 0x93 +0x41 0x3c 0x01 0x53 +0x41 0x3c 0x41 0xd3 + +# CHECK: bfm w1, w2, #1, #15 +# CHECK: bfm x1, x2, #1, #15 +# CHECK: sbfm w1, w2, #1, #15 +# CHECK: sbfm x1, x2, #1, #15 +# CHECK: ubfm w1, w2, #1, #15 +# CHECK: ubfm x1, x2, #1, #15 + +#==---------------------------------------------------------------------------== +# 5.4.5 Extract (immediate) +#==---------------------------------------------------------------------------== + +0x41 0x3c 0x83 0x13 +0x62 0x04 0xc4 0x93 + +# CHECK: extr w1, w2, w3, #15 +# CHECK: extr x2, x3, x4, #1 diff --git a/test/MC/Disassembler/ARM64/branch.txt b/test/MC/Disassembler/ARM64/branch.txt new file mode 100644 index 0000000..c5b254b --- /dev/null +++ b/test/MC/Disassembler/ARM64/branch.txt @@ -0,0 +1,75 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#----------------------------------------------------------------------------- +# Unconditional branch (register) instructions. +#----------------------------------------------------------------------------- + + 0xc0 0x03 0x5f 0xd6 +# CHECK: ret + 0x20 0x00 0x5f 0xd6 +# CHECK: ret x1 + 0xe0 0x03 0xbf 0xd6 +# CHECK: drps + 0xe0 0x03 0x9f 0xd6 +# CHECK: eret + 0xa0 0x00 0x1f 0xd6 +# CHECK: br x5 + 0x20 0x01 0x3f 0xd6 +# CHECK: blr x9 + 0x0B 0x00 0x18 0x37 +# CHECK: tbnz w11, #3, #0 + +#----------------------------------------------------------------------------- +# Exception generation instructions. +#----------------------------------------------------------------------------- + + 0x20 0x00 0x20 0xd4 +# CHECK: brk #1 + 0x41 0x00 0xa0 0xd4 +# CHECK: dcps1 #2 + 0x62 0x00 0xa0 0xd4 +# CHECK: dcps2 #3 + 0x83 0x00 0xa0 0xd4 +# CHECK: dcps3 #4 + 0xa0 0x00 0x40 0xd4 +# CHECK: hlt #5 + 0xc2 0x00 0x00 0xd4 +# CHECK: hvc #6 + 0xe3 0x00 0x00 0xd4 +# CHECK: smc #7 + 0x01 0x01 0x00 0xd4 +# CHECK: svc #8 + +#----------------------------------------------------------------------------- +# PC-relative branches (both positive and negative displacement) +#----------------------------------------------------------------------------- + + 0x07 0x00 0x00 0x14 +# CHECK: b #28 + 0x06 0x00 0x00 0x94 +# CHECK: bl #24 + 0xa1 0x00 0x00 0x54 +# CHECK: b.ne #20 + 0x80 0x00 0x08 0x36 +# CHECK: tbz w0, #1, #16 + 0xe1 0xff 0xf7 0x36 +# CHECK: tbz w1, #30, #-4 + 0x60 0x00 0x08 0x37 +# CHECK: tbnz w0, #1, #12 + 0x40 0x00 0x00 0xb4 +# CHECK: cbz x0, #8 + 0x20 0x00 0x00 0xb5 +# CHECK: cbnz x0, #4 + 0x1f 0x20 0x03 0xd5 +# CHECK: nop + 0xff 0xff 0xff 0x17 +# CHECK: b #-4 + 0xc1 0xff 0xff 0x54 +# CHECK: b.ne #-8 + 0xa0 0xff 0x0f 0x36 +# CHECK: tbz w0, #1, #-12 + 0x80 0xff 0xff 0xb4 +# CHECK: cbz x0, #-16 + 0x1f 0x20 0x03 0xd5 +# CHECK: nop + diff --git a/test/MC/Disassembler/ARM64/crc32.txt b/test/MC/Disassembler/ARM64/crc32.txt new file mode 100644 index 0000000..ef0a26e --- /dev/null +++ b/test/MC/Disassembler/ARM64/crc32.txt @@ -0,0 +1,18 @@ +# RUN: llvm-mc -triple=arm64 -disassemble < %s | FileCheck %s + +# CHECK: crc32b w5, w7, w20 +# CHECK: crc32h w28, wzr, w30 +# CHECK: crc32w w0, w1, w2 +# CHECK: crc32x w7, w9, x20 +# CHECK: crc32cb w9, w5, w4 +# CHECK: crc32ch w13, w17, w25 +# CHECK: crc32cw wzr, w3, w5 +# CHECK: crc32cx w18, w16, xzr +0xe5 0x40 0xd4 0x1a +0xfc 0x47 0xde 0x1a +0x20 0x48 0xc2 0x1a +0x27 0x4d 0xd4 0x9a +0xa9 0x50 0xc4 0x1a +0x2d 0x56 0xd9 0x1a +0x7f 0x58 0xc5 0x1a +0x12 0x5e 0xdf 0x9a diff --git a/test/MC/Disassembler/ARM64/crypto.txt b/test/MC/Disassembler/ARM64/crypto.txt new file mode 100644 index 0000000..e163b2c --- /dev/null +++ b/test/MC/Disassembler/ARM64/crypto.txt @@ -0,0 +1,47 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 --disassemble < %s | FileCheck %s --check-prefix=CHECK-APPLE + + 0x20 0x48 0x28 0x4e + 0x20 0x58 0x28 0x4e + 0x20 0x68 0x28 0x4e + 0x20 0x78 0x28 0x4e + 0x20 0x00 0x02 0x5e + 0x20 0x10 0x02 0x5e + 0x20 0x20 0x02 0x5e + 0x20 0x30 0x02 0x5e + 0x20 0x40 0x02 0x5e + 0x20 0x50 0x02 0x5e + 0x20 0x60 0x02 0x5e + 0x20 0x08 0x28 0x5e + 0x20 0x18 0x28 0x5e + 0x20 0x28 0x28 0x5e + +# CHECK: aese v0.16b, v1.16b +# CHECK: aesd v0.16b, v1.16b +# CHECK: aesmc v0.16b, v1.16b +# CHECK: aesimc v0.16b, v1.16b +# CHECK: sha1c q0, s1, v2.4s +# CHECK: sha1p q0, s1, v2.4s +# CHECK: sha1m q0, s1, v2.4s +# CHECK: sha1su0 v0.4s, v1.4s, v2 +# CHECK: sha256h q0, q1, v2.4s +# CHECK: sha256h2 q0, q1, v2.4s +# CHECK: sha256su1 v0.4s, v1.4s, v2.4s +# CHECK: sha1h s0, s1 +# CHECK: sha1su1 v0.4s, v1.4s +# CHECK: sha256su0 v0.4s, v1.4s + +# CHECK-APPLE: aese.16b v0, v1 +# CHECK-APPLE: aesd.16b v0, v1 +# CHECK-APPLE: aesmc.16b v0, v1 +# CHECK-APPLE: aesimc.16b v0, v1 +# CHECK-APPLE: sha1c.4s q0, s1, v2 +# CHECK-APPLE: sha1p.4s q0, s1, v2 +# CHECK-APPLE: sha1m.4s q0, s1, v2 +# CHECK-APPLE: sha1su0.4s v0, v1, v2 +# CHECK-APPLE: sha256h.4s q0, q1, v2 +# CHECK-APPLE: sha256h2.4s q0, q1, v2 +# CHECK-APPLE: sha256su1.4s v0, v1, v2 +# CHECK-APPLE: sha1h s0, s1 +# CHECK-APPLE: sha1su1.4s v0, v1 +# CHECK-APPLE: sha256su0.4s v0, v1 diff --git a/test/MC/Disassembler/ARM64/invalid-logical.txt b/test/MC/Disassembler/ARM64/invalid-logical.txt new file mode 100644 index 0000000..8a4ecb6 --- /dev/null +++ b/test/MC/Disassembler/ARM64/invalid-logical.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc -triple arm64-apple-darwin -disassemble < %s 2>&1 | FileCheck %s + +# rdar://15226511 +0x7b 0xbf 0x25 0x72 +# CHECK: invalid instruction encoding +# CHECK-NEXT: 0x7b 0xbf 0x25 0x72 diff --git a/test/MC/Disassembler/ARM64/lit.local.cfg b/test/MC/Disassembler/ARM64/lit.local.cfg new file mode 100644 index 0000000..46a9468 --- /dev/null +++ b/test/MC/Disassembler/ARM64/lit.local.cfg @@ -0,0 +1,5 @@ +config.suffixes = ['.txt'] + +targets = set(config.root.targets_to_build.split()) +if not 'ARM64' in targets: + config.unsupported = True diff --git a/test/MC/Disassembler/ARM64/logical.txt b/test/MC/Disassembler/ARM64/logical.txt new file mode 100644 index 0000000..29db8cb --- /dev/null +++ b/test/MC/Disassembler/ARM64/logical.txt @@ -0,0 +1,217 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#==---------------------------------------------------------------------------== +# 5.4.2 Logical (immediate) +#==---------------------------------------------------------------------------== + +0x00 0x00 0x00 0x12 +0x00 0x00 0x40 0x92 +0x41 0x0c 0x00 0x12 +0x41 0x0c 0x40 0x92 +0xbf 0xec 0x7c 0x92 +0x00 0x00 0x00 0x72 +0x00 0x00 0x40 0xf2 +0x41 0x0c 0x00 0x72 +0x41 0x0c 0x40 0xf2 + +# CHECK: and w0, w0, #0x1 +# CHECK: and x0, x0, #0x1 +# CHECK: and w1, w2, #0xf +# CHECK: and x1, x2, #0xf +# CHECK: and sp, x5, #0xfffffffffffffff0 +# CHECK: ands w0, w0, #0x1 +# CHECK: ands x0, x0, #0x1 +# CHECK: ands w1, w2, #0xf +# CHECK: ands x1, x2, #0xf + +0x41 0x00 0x12 0x52 +0x41 0x00 0x71 0xd2 + +# CHECK: eor w1, w2, #0x4000 +# CHECK: eor x1, x2, #0x8000 + +0x41 0x00 0x12 0x32 +0x41 0x00 0x71 0xb2 + +# CHECK: orr w1, w2, #0x4000 +# CHECK: orr x1, x2, #0x8000 + +#==---------------------------------------------------------------------------== +# 5.5.3 Logical (shifted register) +#==---------------------------------------------------------------------------== + +0x41 0x00 0x03 0x0a +0x41 0x00 0x03 0x8a +0x41 0x08 0x03 0x0a +0x41 0x08 0x03 0x8a +0x41 0x08 0x43 0x0a +0x41 0x08 0x43 0x8a +0x41 0x08 0x83 0x0a +0x41 0x08 0x83 0x8a +0x41 0x08 0xc3 0x0a +0x41 0x08 0xc3 0x8a + +# CHECK: and w1, w2, w3 +# CHECK: and x1, x2, x3 +# CHECK: and w1, w2, w3, lsl #2 +# CHECK: and x1, x2, x3, lsl #2 +# CHECK: and w1, w2, w3, lsr #2 +# CHECK: and x1, x2, x3, lsr #2 +# CHECK: and w1, w2, w3, asr #2 +# CHECK: and x1, x2, x3, asr #2 +# CHECK: and w1, w2, w3, ror #2 +# CHECK: and x1, x2, x3, ror #2 + +0x41 0x00 0x03 0x6a +0x41 0x00 0x03 0xea +0x41 0x08 0x03 0x6a +0x41 0x08 0x03 0xea +0x41 0x08 0x43 0x6a +0x41 0x08 0x43 0xea +0x41 0x08 0x83 0x6a +0x41 0x08 0x83 0xea +0x41 0x08 0xc3 0x6a +0x41 0x08 0xc3 0xea + +# CHECK: ands w1, w2, w3 +# CHECK: ands x1, x2, x3 +# CHECK: ands w1, w2, w3, lsl #2 +# CHECK: ands x1, x2, x3, lsl #2 +# CHECK: ands w1, w2, w3, lsr #2 +# CHECK: ands x1, x2, x3, lsr #2 +# CHECK: ands w1, w2, w3, asr #2 +# CHECK: ands x1, x2, x3, asr #2 +# CHECK: ands w1, w2, w3, ror #2 +# CHECK: ands x1, x2, x3, ror #2 + +0x41 0x00 0x23 0x0a +0x41 0x00 0x23 0x8a +0x41 0x0c 0x23 0x0a +0x41 0x0c 0x23 0x8a +0x41 0x0c 0x63 0x0a +0x41 0x0c 0x63 0x8a +0x41 0x0c 0xa3 0x0a +0x41 0x0c 0xa3 0x8a +0x41 0x0c 0xe3 0x0a +0x41 0x0c 0xe3 0x8a + +# CHECK: bic w1, w2, w3 +# CHECK: bic x1, x2, x3 +# CHECK: bic w1, w2, w3, lsl #3 +# CHECK: bic x1, x2, x3, lsl #3 +# CHECK: bic w1, w2, w3, lsr #3 +# CHECK: bic x1, x2, x3, lsr #3 +# CHECK: bic w1, w2, w3, asr #3 +# CHECK: bic x1, x2, x3, asr #3 +# CHECK: bic w1, w2, w3, ror #3 +# CHECK: bic x1, x2, x3, ror #3 + +0x41 0x00 0x23 0x6a +0x41 0x00 0x23 0xea +0x41 0x0c 0x23 0x6a +0x41 0x0c 0x23 0xea +0x41 0x0c 0x63 0x6a +0x41 0x0c 0x63 0xea +0x41 0x0c 0xa3 0x6a +0x41 0x0c 0xa3 0xea +0x41 0x0c 0xe3 0x6a +0x41 0x0c 0xe3 0xea + +# CHECK: bics w1, w2, w3 +# CHECK: bics x1, x2, x3 +# CHECK: bics w1, w2, w3, lsl #3 +# CHECK: bics x1, x2, x3, lsl #3 +# CHECK: bics w1, w2, w3, lsr #3 +# CHECK: bics x1, x2, x3, lsr #3 +# CHECK: bics w1, w2, w3, asr #3 +# CHECK: bics x1, x2, x3, asr #3 +# CHECK: bics w1, w2, w3, ror #3 +# CHECK: bics x1, x2, x3, ror #3 + +0x41 0x00 0x23 0x4a +0x41 0x00 0x23 0xca +0x41 0x10 0x23 0x4a +0x41 0x10 0x23 0xca +0x41 0x10 0x63 0x4a +0x41 0x10 0x63 0xca +0x41 0x10 0xa3 0x4a +0x41 0x10 0xa3 0xca +0x41 0x10 0xe3 0x4a +0x41 0x10 0xe3 0xca + +# CHECK: eon w1, w2, w3 +# CHECK: eon x1, x2, x3 +# CHECK: eon w1, w2, w3, lsl #4 +# CHECK: eon x1, x2, x3, lsl #4 +# CHECK: eon w1, w2, w3, lsr #4 +# CHECK: eon x1, x2, x3, lsr #4 +# CHECK: eon w1, w2, w3, asr #4 +# CHECK: eon x1, x2, x3, asr #4 +# CHECK: eon w1, w2, w3, ror #4 +# CHECK: eon x1, x2, x3, ror #4 + +0x41 0x00 0x03 0x4a +0x41 0x00 0x03 0xca +0x41 0x14 0x03 0x4a +0x41 0x14 0x03 0xca +0x41 0x14 0x43 0x4a +0x41 0x14 0x43 0xca +0x41 0x14 0x83 0x4a +0x41 0x14 0x83 0xca +0x41 0x14 0xc3 0x4a +0x41 0x14 0xc3 0xca + +# CHECK: eor w1, w2, w3 +# CHECK: eor x1, x2, x3 +# CHECK: eor w1, w2, w3, lsl #5 +# CHECK: eor x1, x2, x3, lsl #5 +# CHECK: eor w1, w2, w3, lsr #5 +# CHECK: eor x1, x2, x3, lsr #5 +# CHECK: eor w1, w2, w3, asr #5 +# CHECK: eor x1, x2, x3, asr #5 +# CHECK: eor w1, w2, w3, ror #5 +# CHECK: eor x1, x2, x3, ror #5 + +0x41 0x00 0x03 0x2a +0x41 0x00 0x03 0xaa +0x41 0x18 0x03 0x2a +0x41 0x18 0x03 0xaa +0x41 0x18 0x43 0x2a +0x41 0x18 0x43 0xaa +0x41 0x18 0x83 0x2a +0x41 0x18 0x83 0xaa +0x41 0x18 0xc3 0x2a +0x41 0x18 0xc3 0xaa + +# CHECK: orr w1, w2, w3 +# CHECK: orr x1, x2, x3 +# CHECK: orr w1, w2, w3, lsl #6 +# CHECK: orr x1, x2, x3, lsl #6 +# CHECK: orr w1, w2, w3, lsr #6 +# CHECK: orr x1, x2, x3, lsr #6 +# CHECK: orr w1, w2, w3, asr #6 +# CHECK: orr x1, x2, x3, asr #6 +# CHECK: orr w1, w2, w3, ror #6 +# CHECK: orr x1, x2, x3, ror #6 + +0x41 0x00 0x23 0x2a +0x41 0x00 0x23 0xaa +0x41 0x1c 0x23 0x2a +0x41 0x1c 0x23 0xaa +0x41 0x1c 0x63 0x2a +0x41 0x1c 0x63 0xaa +0x41 0x1c 0xa3 0x2a +0x41 0x1c 0xa3 0xaa +0x41 0x1c 0xe3 0x2a +0x41 0x1c 0xe3 0xaa + +# CHECK: orn w1, w2, w3 +# CHECK: orn x1, x2, x3 +# CHECK: orn w1, w2, w3, lsl #7 +# CHECK: orn x1, x2, x3, lsl #7 +# CHECK: orn w1, w2, w3, lsr #7 +# CHECK: orn x1, x2, x3, lsr #7 +# CHECK: orn w1, w2, w3, asr #7 +# CHECK: orn x1, x2, x3, asr #7 +# CHECK: orn w1, w2, w3, ror #7 +# CHECK: orn x1, x2, x3, ror #7 diff --git a/test/MC/Disassembler/ARM64/memory.txt b/test/MC/Disassembler/ARM64/memory.txt new file mode 100644 index 0000000..031bfa6 --- /dev/null +++ b/test/MC/Disassembler/ARM64/memory.txt @@ -0,0 +1,558 @@ +# RUN: llvm-mc --disassemble -triple arm64-apple-darwin < %s | FileCheck %s + +#----------------------------------------------------------------------------- +# Indexed loads +#----------------------------------------------------------------------------- + + 0x85 0x14 0x40 0xb9 + 0x64 0x00 0x40 0xf9 + 0xe2 0x13 0x40 0xf9 + 0xe5 0x07 0x40 0x3d + 0xe6 0x07 0x40 0x7d + 0xe7 0x07 0x40 0xbd + 0xe8 0x07 0x40 0xfd + 0xe9 0x07 0xc0 0x3d + 0x64 0x00 0x40 0x39 + 0x20 0x78 0xa0 0xb8 + 0x85 0x50 0x40 0x39 + +# CHECK: ldr w5, [x4, #20] +# CHECK: ldr x4, [x3] +# CHECK: ldr x2, [sp, #32] +# CHECK: ldr b5, [sp, #1] +# CHECK: ldr h6, [sp, #2] +# CHECK: ldr s7, [sp, #4] +# CHECK: ldr d8, [sp, #8] +# CHECK: ldr q9, [sp, #16] +# CHECK: ldrb w4, [x3] +# CHECK: ldrsw x0, [x1, x0, lsl #2] +# CHECK: ldrb w5, [x4, #20] +# CHECK: ldrsb w9, [x3] +# CHECK: ldrsb x2, [sp, #128] +# CHECK: ldrh w2, [sp, #32] +# CHECK: ldrsh w3, [sp, #32] +# CHECK: ldrsh x5, [x9, #24] +# CHECK: ldrsw x9, [sp, #512] +# CHECK: prfm pldl3strm, [sp, #32] + + 0x69 0x00 0xc0 0x39 + 0xe2 0x03 0x82 0x39 + 0xe2 0x43 0x40 0x79 + 0xe3 0x43 0xc0 0x79 + 0x25 0x31 0x80 0x79 + 0xe9 0x03 0x82 0xb9 + 0xe5 0x13 0x80 0xf9 + 0x40 0x00 0x80 0xf9 + 0x41 0x00 0x80 0xf9 + 0x42 0x00 0x80 0xf9 + 0x43 0x00 0x80 0xf9 + 0x44 0x00 0x80 0xf9 + 0x45 0x00 0x80 0xf9 + 0x50 0x00 0x80 0xf9 + 0x51 0x00 0x80 0xf9 + 0x52 0x00 0x80 0xf9 + 0x53 0x00 0x80 0xf9 + 0x54 0x00 0x80 0xf9 + 0x55 0x00 0x80 0xf9 + +# CHECK: prfm pldl1keep, [x2] +# CHECK: prfm pldl1strm, [x2] +# CHECK: prfm pldl2keep, [x2] +# CHECK: prfm pldl2strm, [x2] +# CHECK: prfm pldl3keep, [x2] +# CHECK: prfm pldl3strm, [x2] +# CHECK: prfm pstl1keep, [x2] +# CHECK: prfm pstl1strm, [x2] +# CHECK: prfm pstl2keep, [x2] +# CHECK: prfm pstl2strm, [x2] +# CHECK: prfm pstl3keep, [x2] +# CHECK: prfm pstl3strm, [x2] + +#----------------------------------------------------------------------------- +# Indexed stores +#----------------------------------------------------------------------------- + + 0x64 0x00 0x00 0xf9 + 0xe2 0x13 0x00 0xf9 + 0x85 0x14 0x00 0xb9 + 0xe5 0x07 0x00 0x3d + 0xe6 0x07 0x00 0x7d + 0xe7 0x07 0x00 0xbd + 0xe8 0x07 0x00 0xfd + 0xe9 0x07 0x80 0x3d + 0x64 0x00 0x00 0x39 + 0x85 0x50 0x00 0x39 + 0xe2 0x43 0x00 0x79 + +# CHECK: str x4, [x3] +# CHECK: str x2, [sp, #32] +# CHECK: str w5, [x4, #20] +# CHECK: str b5, [sp, #1] +# CHECK: str h6, [sp, #2] +# CHECK: str s7, [sp, #4] +# CHECK: str d8, [sp, #8] +# CHECK: str q9, [sp, #16] +# CHECK: strb w4, [x3] +# CHECK: strb w5, [x4, #20] +# CHECK: strh w2, [sp, #32] + +#----------------------------------------------------------------------------- +# Unscaled immediate loads and stores +#----------------------------------------------------------------------------- + + 0x62 0x00 0x40 0xb8 + 0xe2 0x83 0x41 0xb8 + 0x62 0x00 0x40 0xf8 + 0xe2 0x83 0x41 0xf8 + 0xe5 0x13 0x40 0x3c + 0xe6 0x23 0x40 0x7c + 0xe7 0x43 0x40 0xbc + 0xe8 0x83 0x40 0xfc + 0xe9 0x03 0xc1 0x3c + 0x69 0x00 0xc0 0x38 + 0xe2 0x03 0x88 0x38 + 0xe3 0x03 0xc2 0x78 + 0x25 0x81 0x81 0x78 + 0xe9 0x03 0x98 0xb8 + +# CHECK: ldur w2, [x3] +# CHECK: ldur w2, [sp, #24] +# CHECK: ldur x2, [x3] +# CHECK: ldur x2, [sp, #24] +# CHECK: ldur b5, [sp, #1] +# CHECK: ldur h6, [sp, #2] +# CHECK: ldur s7, [sp, #4] +# CHECK: ldur d8, [sp, #8] +# CHECK: ldur q9, [sp, #16] +# CHECK: ldursb w9, [x3] +# CHECK: ldursb x2, [sp, #128] +# CHECK: ldursh w3, [sp, #32] +# CHECK: ldursh x5, [x9, #24] +# CHECK: ldursw x9, [sp, #-128] + + 0x64 0x00 0x00 0xb8 + 0xe2 0x03 0x02 0xb8 + 0x64 0x00 0x00 0xf8 + 0xe2 0x03 0x02 0xf8 + 0x85 0x40 0x01 0xb8 + 0xe5 0x13 0x00 0x3c + 0xe6 0x23 0x00 0x7c + 0xe7 0x43 0x00 0xbc + 0xe8 0x83 0x00 0xfc + 0xe9 0x03 0x81 0x3c + 0x64 0x00 0x00 0x38 + 0x85 0x40 0x01 0x38 + 0xe2 0x03 0x02 0x78 + 0xe5 0x03 0x82 0xf8 + +# CHECK: stur w4, [x3] +# CHECK: stur w2, [sp, #32] +# CHECK: stur x4, [x3] +# CHECK: stur x2, [sp, #32] +# CHECK: stur w5, [x4, #20] +# CHECK: stur b5, [sp, #1] +# CHECK: stur h6, [sp, #2] +# CHECK: stur s7, [sp, #4] +# CHECK: stur d8, [sp, #8] +# CHECK: stur q9, [sp, #16] +# CHECK: sturb w4, [x3] +# CHECK: sturb w5, [x4, #20] +# CHECK: sturh w2, [sp, #32] +# CHECK: prfum pldl3strm, [sp, #32] + +#----------------------------------------------------------------------------- +# Unprivileged loads and stores +#----------------------------------------------------------------------------- + + 0x83 0x08 0x41 0xb8 + 0x83 0x08 0x41 0xf8 + 0x83 0x08 0x41 0x38 + 0x69 0x08 0xc0 0x38 + 0xe2 0x0b 0x88 0x38 + 0x83 0x08 0x41 0x78 + 0xe3 0x0b 0xc2 0x78 + 0x25 0x89 0x81 0x78 + 0xe9 0x0b 0x98 0xb8 + +# CHECK: ldtr w3, [x4, #16] +# CHECK: ldtr x3, [x4, #16] +# CHECK: ldtrb w3, [x4, #16] +# CHECK: ldtrsb w9, [x3] +# CHECK: ldtrsb x2, [sp, #128] +# CHECK: ldtrh w3, [x4, #16] +# CHECK: ldtrsh w3, [sp, #32] +# CHECK: ldtrsh x5, [x9, #24] +# CHECK: ldtrsw x9, [sp, #-128] + + 0x85 0x48 0x01 0xb8 + 0x64 0x08 0x00 0xf8 + 0xe2 0x0b 0x02 0xf8 + 0x64 0x08 0x00 0x38 + 0x85 0x48 0x01 0x38 + 0xe2 0x0b 0x02 0x78 + +# CHECK: sttr w5, [x4, #20] +# CHECK: sttr x4, [x3] +# CHECK: sttr x2, [sp, #32] +# CHECK: sttrb w4, [x3] +# CHECK: sttrb w5, [x4, #20] +# CHECK: sttrh w2, [sp, #32] + +#----------------------------------------------------------------------------- +# Pre-indexed loads and stores +#----------------------------------------------------------------------------- + + 0xfd 0x8c 0x40 0xf8 + 0xfe 0x8c 0x40 0xf8 + 0x05 0x1c 0x40 0x3c + 0x06 0x2c 0x40 0x7c + 0x07 0x4c 0x40 0xbc + 0x08 0x8c 0x40 0xfc + 0x09 0x0c 0xc1 0x3c + +# CHECK: ldr fp, [x7, #8]! +# CHECK: ldr lr, [x7, #8]! +# CHECK: ldr b5, [x0, #1]! +# CHECK: ldr h6, [x0, #2]! +# CHECK: ldr s7, [x0, #4]! +# CHECK: ldr d8, [x0, #8]! +# CHECK: ldr q9, [x0, #16]! + + 0xfe 0x8c 0x1f 0xf8 + 0xfd 0x8c 0x1f 0xf8 + 0x05 0xfc 0x1f 0x3c + 0x06 0xec 0x1f 0x7c + 0x07 0xcc 0x1f 0xbc + 0x08 0x8c 0x1f 0xfc + 0x09 0x0c 0x9f 0x3c + +# CHECK: str lr, [x7, #-8]! +# CHECK: str fp, [x7, #-8]! +# CHECK: str b5, [x0, #-1]! +# CHECK: str h6, [x0, #-2]! +# CHECK: str s7, [x0, #-4]! +# CHECK: str d8, [x0, #-8]! +# CHECK: str q9, [x0, #-16]! + +#----------------------------------------------------------------------------- +# post-indexed loads and stores +#----------------------------------------------------------------------------- + + 0xfe 0x84 0x1f 0xf8 + 0xfd 0x84 0x1f 0xf8 + 0x05 0xf4 0x1f 0x3c + 0x06 0xe4 0x1f 0x7c + 0x07 0xc4 0x1f 0xbc + 0x08 0x84 0x1f 0xfc + 0x09 0x04 0x9f 0x3c + +# CHECK: str lr, [x7], #-8 +# CHECK: str fp, [x7], #-8 +# CHECK: str b5, [x0], #-1 +# CHECK: str h6, [x0], #-2 +# CHECK: str s7, [x0], #-4 +# CHECK: str d8, [x0], #-8 +# CHECK: str q9, [x0], #-16 + + 0xfd 0x84 0x40 0xf8 + 0xfe 0x84 0x40 0xf8 + 0x05 0x14 0x40 0x3c + 0x06 0x24 0x40 0x7c + 0x07 0x44 0x40 0xbc + 0x08 0x84 0x40 0xfc + 0x09 0x04 0xc1 0x3c + +# CHECK: ldr fp, [x7], #8 +# CHECK: ldr lr, [x7], #8 +# CHECK: ldr b5, [x0], #1 +# CHECK: ldr h6, [x0], #2 +# CHECK: ldr s7, [x0], #4 +# CHECK: ldr d8, [x0], #8 +# CHECK: ldr q9, [x0], #16 + +#----------------------------------------------------------------------------- +# Load/Store pair (indexed offset) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0x42 0x29 + 0xe4 0x27 0x7f 0xa9 + 0xc2 0x0d 0x42 0x69 + 0xe2 0x0f 0x7e 0x69 + 0x4a 0x04 0x48 0x2d + 0x4a 0x04 0x40 0x6d + +# CHECK: ldp w3, w2, [x15, #16] +# CHECK: ldp x4, x9, [sp, #-16] +# CHECK: ldpsw x2, x3, [x14, #16] +# CHECK: ldpsw x2, x3, [sp, #-16] +# CHECK: ldp s10, s1, [x2, #64] +# CHECK: ldp d10, d1, [x2] + + 0xe3 0x09 0x02 0x29 + 0xe4 0x27 0x3f 0xa9 + 0x4a 0x04 0x08 0x2d + 0x4a 0x04 0x00 0x6d + +# CHECK: stp w3, w2, [x15, #16] +# CHECK: stp x4, x9, [sp, #-16] +# CHECK: stp s10, s1, [x2, #64] +# CHECK: stp d10, d1, [x2] + +#----------------------------------------------------------------------------- +# Load/Store pair (pre-indexed) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0xc2 0x29 + 0xe4 0x27 0xff 0xa9 + 0xc2 0x0d 0xc2 0x69 + 0xe2 0x0f 0xfe 0x69 + 0x4a 0x04 0xc8 0x2d + 0x4a 0x04 0xc1 0x6d + +# CHECK: ldp w3, w2, [x15, #16]! +# CHECK: ldp x4, x9, [sp, #-16]! +# CHECK: ldpsw x2, x3, [x14, #16]! +# CHECK: ldpsw x2, x3, [sp, #-16]! +# CHECK: ldp s10, s1, [x2, #64]! +# CHECK: ldp d10, d1, [x2, #16]! + + 0xe3 0x09 0x82 0x29 + 0xe4 0x27 0xbf 0xa9 + 0x4a 0x04 0x88 0x2d + 0x4a 0x04 0x81 0x6d + +# CHECK: stp w3, w2, [x15, #16]! +# CHECK: stp x4, x9, [sp, #-16]! +# CHECK: stp s10, s1, [x2, #64]! +# CHECK: stp d10, d1, [x2, #16]! + +#----------------------------------------------------------------------------- +# Load/Store pair (post-indexed) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0xc2 0x28 + 0xe4 0x27 0xff 0xa8 + 0xc2 0x0d 0xc2 0x68 + 0xe2 0x0f 0xfe 0x68 + 0x4a 0x04 0xc8 0x2c + 0x4a 0x04 0xc1 0x6c + +# CHECK: ldp w3, w2, [x15], #16 +# CHECK: ldp x4, x9, [sp], #-16 +# CHECK: ldpsw x2, x3, [x14], #16 +# CHECK: ldpsw x2, x3, [sp], #-16 +# CHECK: ldp s10, s1, [x2], #64 +# CHECK: ldp d10, d1, [x2], #16 + + 0xe3 0x09 0x82 0x28 + 0xe4 0x27 0xbf 0xa8 + 0x4a 0x04 0x88 0x2c + 0x4a 0x04 0x81 0x6c + +# CHECK: stp w3, w2, [x15], #16 +# CHECK: stp x4, x9, [sp], #-16 +# CHECK: stp s10, s1, [x2], #64 +# CHECK: stp d10, d1, [x2], #16 + +#----------------------------------------------------------------------------- +# Load/Store pair (no-allocate) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0x42 0x28 + 0xe4 0x27 0x7f 0xa8 + 0x4a 0x04 0x48 0x2c + 0x4a 0x04 0x40 0x6c + +# CHECK: ldnp w3, w2, [x15, #16] +# CHECK: ldnp x4, x9, [sp, #-16] +# CHECK: ldnp s10, s1, [x2, #64] +# CHECK: ldnp d10, d1, [x2] + + 0xe3 0x09 0x02 0x28 + 0xe4 0x27 0x3f 0xa8 + 0x4a 0x04 0x08 0x2c + 0x4a 0x04 0x00 0x6c + +# CHECK: stnp w3, w2, [x15, #16] +# CHECK: stnp x4, x9, [sp, #-16] +# CHECK: stnp s10, s1, [x2, #64] +# CHECK: stnp d10, d1, [x2] + +#----------------------------------------------------------------------------- +# Load/Store register offset +#----------------------------------------------------------------------------- + + 0x00 0x68 0x60 0xb8 + 0x00 0x78 0x60 0xb8 + 0x00 0x68 0x60 0xf8 + 0x00 0x78 0x60 0xf8 + 0x00 0xe8 0x60 0xf8 + +# CHECK: ldr w0, [x0, x0] +# CHECK: ldr w0, [x0, x0, lsl #2] +# CHECK: ldr x0, [x0, x0] +# CHECK: ldr x0, [x0, x0, lsl #3] +# CHECK: ldr x0, [x0, x0, sxtx] + + 0x21 0x68 0x62 0x3c + 0x21 0x78 0x62 0x3c + 0x21 0x68 0x62 0x7c + 0x21 0x78 0x62 0x7c + 0x21 0x68 0x62 0xbc + 0x21 0x78 0x62 0xbc + 0x21 0x68 0x62 0xfc + 0x21 0x78 0x62 0xfc + 0x21 0x68 0xe2 0x3c + 0x21 0x78 0xe2 0x3c + +# CHECK: ldr b1, [x1, x2] +# CHECK: ldr b1, [x1, x2, lsl #0] +# CHECK: ldr h1, [x1, x2] +# CHECK: ldr h1, [x1, x2, lsl #1] +# CHECK: ldr s1, [x1, x2] +# CHECK: ldr s1, [x1, x2, lsl #2] +# CHECK: ldr d1, [x1, x2] +# CHECK: ldr d1, [x1, x2, lsl #3] +# CHECK: ldr q1, [x1, x2] +# CHECK: ldr q1, [x1, x2, lsl #4] + + 0xe1 0x6b 0x23 0xfc + 0xe1 0x5b 0x23 0xfc + 0xe1 0x6b 0xa3 0x3c + 0xe1 0x5b 0xa3 0x3c + +# CHECK: str d1, [sp, x3] +# CHECK: str d1, [sp, x3, uxtw #3] +# CHECK: str q1, [sp, x3] +# CHECK: str q1, [sp, x3, uxtw #4] + +#----------------------------------------------------------------------------- +# Load/Store exclusive +#----------------------------------------------------------------------------- + + 0x26 0x7c 0x5f 0x08 + 0x26 0x7c 0x5f 0x48 + 0x27 0x0d 0x7f 0x88 + 0x27 0x0d 0x7f 0xc8 + +# CHECK: ldxrb w6, [x1] +# CHECK: ldxrh w6, [x1] +# CHECK: ldxp w7, w3, [x9] +# CHECK: ldxp x7, x3, [x9] + + 0x64 0x7c 0x01 0xc8 + 0x64 0x7c 0x01 0x88 + 0x64 0x7c 0x01 0x08 + 0x64 0x7c 0x01 0x48 + 0x22 0x18 0x21 0xc8 + 0x22 0x18 0x21 0x88 + +# CHECK: stxr w1, x4, [x3] +# CHECK: stxr w1, w4, [x3] +# CHECK: stxrb w1, w4, [x3] +# CHECK: stxrh w1, w4, [x3] +# CHECK: stxp w1, x2, x6, [x1] +# CHECK: stxp w1, w2, w6, [x1] + +#----------------------------------------------------------------------------- +# Load-acquire/Store-release non-exclusive +#----------------------------------------------------------------------------- + + 0xe4 0xff 0xdf 0x88 + 0xe4 0xff 0xdf 0xc8 + 0xe4 0xff 0xdf 0x08 + 0xe4 0xff 0xdf 0x48 + +# CHECK: ldar w4, [sp] +# CHECK: ldar x4, [sp] +# CHECK: ldarb w4, [sp] +# CHECK: ldarh w4, [sp] + + 0xc3 0xfc 0x9f 0x88 + 0xc3 0xfc 0x9f 0xc8 + 0xc3 0xfc 0x9f 0x08 + 0xc3 0xfc 0x9f 0x48 + +# CHECK: stlr w3, [x6] +# CHECK: stlr x3, [x6] +# CHECK: stlrb w3, [x6] +# CHECK: stlrh w3, [x6] + +#----------------------------------------------------------------------------- +# Load-acquire/Store-release exclusive +#----------------------------------------------------------------------------- + + 0x82 0xfc 0x5f 0x88 + 0x82 0xfc 0x5f 0xc8 + 0x82 0xfc 0x5f 0x08 + 0x82 0xfc 0x5f 0x48 + 0x22 0x98 0x7f 0x88 + 0x22 0x98 0x7f 0xc8 + +# CHECK: ldaxr w2, [x4] +# CHECK: ldaxr x2, [x4] +# CHECK: ldaxrb w2, [x4] +# CHECK: ldaxrh w2, [x4] +# CHECK: ldaxp w2, w6, [x1] +# CHECK: ldaxp x2, x6, [x1] + + 0x27 0xfc 0x08 0xc8 + 0x27 0xfc 0x08 0x88 + 0x27 0xfc 0x08 0x08 + 0x27 0xfc 0x08 0x48 + 0x22 0x98 0x21 0xc8 + 0x22 0x98 0x21 0x88 + +# CHECK: stlxr w8, x7, [x1] +# CHECK: stlxr w8, w7, [x1] +# CHECK: stlxrb w8, w7, [x1] +# CHECK: stlxrh w8, w7, [x1] +# CHECK: stlxp w1, x2, x6, [x1] +# CHECK: stlxp w1, w2, w6, [x1] + +#----------------------------------------------------------------------------- +# Load/Store with explicit LSL values +#----------------------------------------------------------------------------- + 0x20 0x78 0xa0 0xb8 + 0x20 0x78 0x60 0xf8 + 0x20 0x78 0x20 0xf8 + 0x20 0x78 0x60 0xb8 + 0x20 0x78 0x20 0xb8 + 0x20 0x78 0xe0 0x3c + 0x20 0x78 0xa0 0x3c + 0x20 0x78 0x60 0xfc + 0x20 0x78 0x20 0xfc + 0x20 0x78 0x60 0xbc + 0x20 0x78 0x20 0xbc + 0x20 0x78 0x60 0x7c + 0x20 0x78 0x60 0x3c + 0x20 0x78 0x60 0x38 + 0x20 0x78 0x20 0x38 + 0x20 0x78 0xe0 0x38 + 0x20 0x78 0x60 0x78 + 0x20 0x78 0x20 0x78 + 0x20 0x78 0xe0 0x78 + 0x20 0x78 0xa0 0x38 + 0x20 0x78 0xa0 0x78 + +# CHECK: ldrsw x0, [x1, x0, lsl #2] +# CHECK: ldr x0, [x1, x0, lsl #3] +# CHECK: str x0, [x1, x0, lsl #3] +# CHECK: ldr w0, [x1, x0, lsl #2] +# CHECK: str w0, [x1, x0, lsl #2] +# CHECK: ldr q0, [x1, x0, lsl #4] +# CHECK: str q0, [x1, x0, lsl #4] +# CHECK: ldr d0, [x1, x0, lsl #3] +# CHECK: str d0, [x1, x0, lsl #3] +# CHECK: ldr s0, [x1, x0, lsl #2] +# CHECK: str s0, [x1, x0, lsl #2] +# CHECK: ldr h0, [x1, x0, lsl #1] +# CHECK: ldr b0, [x1, x0, lsl #0] +# CHECK: ldrb w0, [x1, x0, lsl #0] +# CHECK: strb w0, [x1, x0, lsl #0] +# CHECK: ldrsb w0, [x1, x0, lsl #0] +# CHECK: ldrh w0, [x1, x0, lsl #1] +# CHECK: strh w0, [x1, x0, lsl #1] +# CHECK: ldrsh w0, [x1, x0, lsl #1] +# CHECK: ldrsb x0, [x1, x0, lsl #0] +# CHECK: ldrsh x0, [x1, x0, lsl #1] diff --git a/test/MC/Disassembler/ARM64/scalar-fp.txt b/test/MC/Disassembler/ARM64/scalar-fp.txt new file mode 100644 index 0000000..b242df5 --- /dev/null +++ b/test/MC/Disassembler/ARM64/scalar-fp.txt @@ -0,0 +1,255 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#----------------------------------------------------------------------------- +# Floating-point arithmetic +#----------------------------------------------------------------------------- + +0x41 0xc0 0x20 0x1e +0x41 0xc0 0x60 0x1e + +# CHECK: fabs s1, s2 +# CHECK: fabs d1, d2 + +0x41 0x28 0x23 0x1e +0x41 0x28 0x63 0x1e + +# CHECK: fadd s1, s2, s3 +# CHECK: fadd d1, d2, d3 + +0x41 0x18 0x23 0x1e +0x41 0x18 0x63 0x1e + +# CHECK: fdiv s1, s2, s3 +# CHECK: fdiv d1, d2, d3 + +0x41 0x10 0x03 0x1f +0x41 0x10 0x43 0x1f + +# CHECK: fmadd s1, s2, s3, s4 +# CHECK: fmadd d1, d2, d3, d4 + +0x41 0x48 0x23 0x1e +0x41 0x48 0x63 0x1e +0x41 0x68 0x23 0x1e +0x41 0x68 0x63 0x1e + +# CHECK: fmax s1, s2, s3 +# CHECK: fmax d1, d2, d3 +# CHECK: fmaxnm s1, s2, s3 +# CHECK: fmaxnm d1, d2, d3 + +0x41 0x58 0x23 0x1e +0x41 0x58 0x63 0x1e +0x41 0x78 0x23 0x1e +0x41 0x78 0x63 0x1e + +# CHECK: fmin s1, s2, s3 +# CHECK: fmin d1, d2, d3 +# CHECK: fminnm s1, s2, s3 +# CHECK: fminnm d1, d2, d3 + +0x41 0x90 0x03 0x1f +0x41 0x90 0x43 0x1f + +# CHECK: fmsub s1, s2, s3, s4 +# CHECK: fmsub d1, d2, d3, d4 + +0x41 0x08 0x23 0x1e +0x41 0x08 0x63 0x1e + +# CHECK: fmul s1, s2, s3 +# CHECK: fmul d1, d2, d3 + +0x41 0x40 0x21 0x1e +0x41 0x40 0x61 0x1e + +# CHECK: fneg s1, s2 +# CHECK: fneg d1, d2 + +0x41 0x10 0x23 0x1f +0x41 0x10 0x63 0x1f + +# CHECK: fnmadd s1, s2, s3, s4 +# CHECK: fnmadd d1, d2, d3, d4 + +0x41 0x90 0x23 0x1f +0x41 0x90 0x63 0x1f + +# CHECK: fnmsub s1, s2, s3, s4 +# CHECK: fnmsub d1, d2, d3, d4 + +0x41 0x88 0x23 0x1e +0x41 0x88 0x63 0x1e + +# CHECK: fnmul s1, s2, s3 +# CHECK: fnmul d1, d2, d3 + +0x41 0xc0 0x21 0x1e +0x41 0xc0 0x61 0x1e + +# CHECK: fsqrt s1, s2 +# CHECK: fsqrt d1, d2 + +0x41 0x38 0x23 0x1e +0x41 0x38 0x63 0x1e + +# CHECK: fsub s1, s2, s3 +# CHECK: fsub d1, d2, d3 + +#----------------------------------------------------------------------------- +# Floating-point comparison +#----------------------------------------------------------------------------- + +0x20 0x04 0x22 0x1e +0x20 0x04 0x62 0x1e +0x30 0x04 0x22 0x1e +0x30 0x04 0x62 0x1e + +# CHECK: fccmp s1, s2, #0, eq +# CHECK: fccmp d1, d2, #0, eq +# CHECK: fccmpe s1, s2, #0, eq +# CHECK: fccmpe d1, d2, #0, eq + +0x20 0x20 0x22 0x1e +0x20 0x20 0x62 0x1e +0x28 0x20 0x20 0x1e +0x28 0x20 0x60 0x1e +0x30 0x20 0x22 0x1e +0x30 0x20 0x62 0x1e +0x38 0x20 0x20 0x1e +0x38 0x20 0x60 0x1e + +# CHECK: fcmp s1, s2 +# CHECK: fcmp d1, d2 +# CHECK: fcmp s1, #0.0 +# CHECK: fcmp d1, #0.0 +# CHECK: fcmpe s1, s2 +# CHECK: fcmpe d1, d2 +# CHECK: fcmpe s1, #0.0 +# CHECK: fcmpe d1, #0.0 + +#----------------------------------------------------------------------------- +# Floating-point conditional select +#----------------------------------------------------------------------------- + +0x41 0x0c 0x23 0x1e +0x41 0x0c 0x63 0x1e + +# CHECK: fcsel s1, s2, s3, eq +# CHECK: fcsel d1, d2, d3, eq + +#----------------------------------------------------------------------------- +# Floating-point convert +#----------------------------------------------------------------------------- + +0x41 0xc0 0x63 0x1e +0x41 0x40 0x62 0x1e +0x41 0xc0 0xe2 0x1e +0x41 0x40 0xe2 0x1e +0x41 0xc0 0x22 0x1e +0x41 0xc0 0x23 0x1e + +# CHECK: fcvt h1, d2 +# CHECK: fcvt s1, d2 +# CHECK: fcvt d1, h2 +# CHECK: fcvt s1, h2 +# CHECK: fcvt d1, s2 +# CHECK: fcvt h1, s2 + +0x41 0x00 0x44 0x1e +0x41 0x04 0x44 0x1e +0x41 0x00 0x44 0x9e +0x41 0x04 0x44 0x9e +0x41 0x00 0x04 0x1e +0x41 0x04 0x04 0x1e +0x41 0x00 0x04 0x9e +0x41 0x04 0x04 0x9e + +#----------------------------------------------------------------------------- +# Floating-point move +#----------------------------------------------------------------------------- + +0x41 0x00 0x27 0x1e +0x41 0x00 0x26 0x1e +0x41 0x00 0x67 0x9e +0x41 0x00 0x66 0x9e + +# CHECK: fmov s1, w2 +# CHECK: fmov w1, s2 +# CHECK: fmov d1, x2 +# CHECK: fmov x1, d2 + +0x01 0x10 0x28 0x1e +0x01 0x10 0x68 0x1e +0x01 0xf0 0x7b 0x1e +0x01 0xf0 0x6b 0x1e + +# CHECK: fmov s1, #1.250000e-01 +# CHECK: fmov d1, #1.250000e-01 +# CHECK: fmov d1, #-4.843750e-01 +# CHECK: fmov d1, #4.843750e-01 + +0x41 0x40 0x20 0x1e +0x41 0x40 0x60 0x1e + +# CHECK: fmov s1, s2 +# CHECK: fmov d1, d2 + +#----------------------------------------------------------------------------- +# Floating-point round to integral +#----------------------------------------------------------------------------- + +0x41 0x40 0x26 0x1e +0x41 0x40 0x66 0x1e + +# CHECK: frinta s1, s2 +# CHECK: frinta d1, d2 + +0x41 0xc0 0x27 0x1e +0x41 0xc0 0x67 0x1e + +# CHECK: frinti s1, s2 +# CHECK: frinti d1, d2 + +0x41 0x40 0x25 0x1e +0x41 0x40 0x65 0x1e + +# CHECK: frintm s1, s2 +# CHECK: frintm d1, d2 + +0x41 0x40 0x24 0x1e +0x41 0x40 0x64 0x1e + +# CHECK: frintn s1, s2 +# CHECK: frintn d1, d2 + +0x41 0xc0 0x24 0x1e +0x41 0xc0 0x64 0x1e + +# CHECK: frintp s1, s2 +# CHECK: frintp d1, d2 + +0x41 0x40 0x27 0x1e +0x41 0x40 0x67 0x1e + +# CHECK: frintx s1, s2 +# CHECK: frintx d1, d2 + +0x41 0xc0 0x25 0x1e +0x41 0xc0 0x65 0x1e + +# CHECK: frintz s1, s2 +# CHECK: frintz d1, d2 + + 0x00 0x3c 0xe0 0x7e + 0x00 0x8c 0xe0 0x5e + +# CHECK: cmhs d0, d0, d0 +# CHECK: cmtst d0, d0, d0 + +0x00 0x00 0xaf 0x9e +0x00 0x00 0xae 0x9e + +# CHECK: fmov.d v0[1], x0 +# CHECK: fmov.d x0, v0[1] + diff --git a/test/MC/Disassembler/ARM64/system.txt b/test/MC/Disassembler/ARM64/system.txt new file mode 100644 index 0000000..cefa635 --- /dev/null +++ b/test/MC/Disassembler/ARM64/system.txt @@ -0,0 +1,58 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + + +#----------------------------------------------------------------------------- +# Hint encodings +#----------------------------------------------------------------------------- + + 0x1f 0x20 0x03 0xd5 +# CHECK: nop + 0x9f 0x20 0x03 0xd5 +# CHECK: sev + 0xbf 0x20 0x03 0xd5 +# CHECK: sevl + 0x5f 0x20 0x03 0xd5 +# CHECK: wfe + 0x7f 0x20 0x03 0xd5 +# CHECK: wfi + 0x3f 0x20 0x03 0xd5 +# CHECK: yield + +#----------------------------------------------------------------------------- +# Single-immediate operand instructions +#----------------------------------------------------------------------------- + + 0x5f 0x3a 0x03 0xd5 +# CHECK: clrex #10 + 0xdf 0x3f 0x03 0xd5 +# CHECK: isb{{$}} + 0xbf 0x33 0x03 0xd5 +# CHECK: dmb osh + 0x9f 0x37 0x03 0xd5 +# CHECK: dsb nsh + +#----------------------------------------------------------------------------- +# Generic system instructions +#----------------------------------------------------------------------------- + 0xff 0x05 0x0a 0xd5 + 0xe7 0x6a 0x0f 0xd5 + 0xf4 0x3f 0x2e 0xd5 + 0xbf 0x40 0x00 0xd5 + 0x00 0x00 0x10 0xd5 + 0x00 0x00 0x30 0xd5 + +# CHECK: sys #2, c0, c5, #7 +# CHECK: sys #7, c6, c10, #7, x7 +# CHECK: sysl x20, #6, c3, c15, #7 +# CHECK: msr SPSel, #0 +# CHECK: msr S2_0_C0_C0_0, x0 +# CHECK: mrs x0, S2_0_C0_C0_0 + + 0x40 0xc0 0x1e 0xd5 + 0x40 0xc0 0x1a 0xd5 + 0x40 0xc0 0x19 0xd5 + +# CHECK: msr RMR_EL3, x0 +# CHECK: msr RMR_EL2, x0 +# CHECK: msr RMR_EL1, x0 + diff --git a/test/MC/Disassembler/Mips/micromips.txt b/test/MC/Disassembler/Mips/micromips.txt index b2d0cc0..1458ce2 100644 --- a/test/MC/Disassembler/Mips/micromips.txt +++ b/test/MC/Disassembler/Mips/micromips.txt @@ -145,6 +145,9 @@ # CHECK: sw $5, 4($6) 0xf8 0xa6 0x00 0x04 +# CHECK: lwu $2, 8($4) +0x60 0x44 0xe0 0x08 + # CHECK: lwl $4, 16($5) 0x60 0x85 0x00 0x10 @@ -285,3 +288,9 @@ # CHECK: tnei $9, 17767 0x41 0x89 0x45 0x67 + +# CHECK: ll $2, 8($4) +0x60 0x44 0x30 0x08 + +# CHECK: sc $2, 8($4) +0x60 0x44 0xb0 0x08 diff --git a/test/MC/Disassembler/Mips/micromips_le.txt b/test/MC/Disassembler/Mips/micromips_le.txt index 5b2fe30..bdfe88e 100644 --- a/test/MC/Disassembler/Mips/micromips_le.txt +++ b/test/MC/Disassembler/Mips/micromips_le.txt @@ -145,6 +145,9 @@ # CHECK: sw $5, 4($6) 0xa6 0xf8 0x04 0x00 +# CHECK: lwu $2, 8($4) +0x44 0x60 0x08 0xe0 + # CHECK: lwl $4, 16($5) 0x85 0x60 0x10 0x00 @@ -285,3 +288,9 @@ # CHECK: tnei $9, 17767 0x89 0x41 0x67 0x45 + +# CHECK: ll $2, 8($4) +0x44 0x60 0x08 0x30 + +# CHECK: sc $2, 8($4) +0x44 0x60 0x08 0xb0 diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt index 6d02925..bfb145e 100644 --- a/test/MC/Disassembler/Mips/mips32.txt +++ b/test/MC/Disassembler/Mips/mips32.txt @@ -206,6 +206,9 @@ # CHECK: jal 1328 0x0c 0x00 0x01 0x4c +# CHECK: jalx 1328 +0x74 0x00 0x01 0x4c + # CHECK: jalr $7 0x00 0xe0 0xf8 0x09 diff --git a/test/MC/Disassembler/Mips/mips32_le.txt b/test/MC/Disassembler/Mips/mips32_le.txt index 61e6fc8..533fc69 100644 --- a/test/MC/Disassembler/Mips/mips32_le.txt +++ b/test/MC/Disassembler/Mips/mips32_le.txt @@ -206,6 +206,9 @@ # CHECK: jal 1328 0x4c 0x01 0x00 0x0c +# CHECK: jalx 1328 +0x4c 0x01 0x00 0x74 + # CHECK: jalr $7 0x09 0xf8 0xe0 0x00 diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt index 11d9058..299f6f0 100644 --- a/test/MC/Disassembler/Mips/mips32r2.txt +++ b/test/MC/Disassembler/Mips/mips32r2.txt @@ -215,6 +215,9 @@ # CHECK: jal 1328 0x0c 0x00 0x01 0x4c +# CHECK: jalx 1328 +0x74 0x00 0x01 0x4c + # CHECK: jalr $7 0x00 0xe0 0xf8 0x09 diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt index adafcf1..0362ca6 100644 --- a/test/MC/Disassembler/Mips/mips32r2_le.txt +++ b/test/MC/Disassembler/Mips/mips32r2_le.txt @@ -215,6 +215,9 @@ # CHECK: jal 1328 0x4c 0x01 0x00 0x0c +# CHECK: jalx 1328 +0x4c 0x01 0x00 0x74 + # CHECK: jalr $7 0x09 0xf8 0xe0 0x00 diff --git a/test/MC/Disassembler/PowerPC/lit.local.cfg b/test/MC/Disassembler/PowerPC/lit.local.cfg new file mode 100644 index 0000000..2e46300 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/lit.local.cfg @@ -0,0 +1,4 @@ +targets = set(config.root.targets_to_build.split()) +if not 'PowerPC' in targets: + config.unsupported = True + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt new file mode 100644 index 0000000..5e6033d --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt @@ -0,0 +1,74 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: icbi 2, 3 +0x7c 0x02 0x1f 0xac + +# CHECK: dcbt 2, 3 +0x7c 0x02 0x1a 0x2c + +# CHECK: dcbtst 2, 3 +0x7c 0x02 0x19 0xec + +# CHECK: dcbz 2, 3 +0x7c 0x02 0x1f 0xec + +# CHECK: dcbst 2, 3 +0x7c 0x02 0x18 0x6c + +# CHECK: isync +0x4c 0x00 0x01 0x2c + +# CHECK: stwcx. 2, 3, 4 +0x7c 0x43 0x21 0x2d + +# CHECK: stdcx. 2, 3, 4 +0x7c 0x43 0x21 0xad + +# CHECK: sync 2 +0x7c 0x40 0x04 0xac + +# CHECK: eieio +0x7c 0x00 0x06 0xac + +# CHECK: wait 2 +0x7c 0x40 0x00 0x7c + +# CHECK: dcbf 2, 3 +0x7c 0x02 0x18 0xac + +# CHECK: lwarx 2, 3, 4 +0x7c 0x43 0x20 0x28 + +# CHECK: ldarx 2, 3, 4 +0x7c 0x43 0x20 0xa8 + +# CHECK: sync 0 +0x7c 0x00 0x04 0xac + +# CHECK: sync 0 +0x7c 0x00 0x04 0xac + +# CHECK: sync 1 +0x7c 0x20 0x04 0xac + +# CHECK: sync 2 +0x7c 0x40 0x04 0xac + +# CHECK: wait 0 +0x7c 0x00 0x00 0x7c + +# CHECK: wait 1 +0x7c 0x20 0x00 0x7c + +# CHECK: wait 2 +0x7c 0x40 0x00 0x7c + +# CHECK: mftb 2, 123 +0x7c 0x5b 0x1a 0xe6 + +# CHECK: mftb 2, 268 +0x7c 0x4c 0x42 0xe6 + +# CHECK: mftb 2, 269 +0x7c 0x4d 0x42 0xe6 + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt new file mode 100644 index 0000000..c5d6155 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt @@ -0,0 +1,107 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: mtmsr 4, 0 +0x7c 0x80 0x01 0x24 + +# CHECK: mtmsr 4, 1 +0x7c 0x81 0x01 0x24 + +# CHECK: mfmsr 4 +0x7c 0x80 0x00 0xa6 + +# CHECK: mtmsrd 4, 0 +0x7c 0x80 0x01 0x64 + +# CHECK: mtmsrd 4, 1 +0x7c 0x81 0x01 0x64 + +# CHECK: mfspr 4, 272 +0x7c 0x90 0x42 0xa6 + +# CHECK: mfspr 4, 273 +0x7c 0x91 0x42 0xa6 + +# CHECK: mfspr 4, 274 +0x7c 0x92 0x42 0xa6 + +# CHECK: mfspr 4, 275 +0x7c 0x93 0x42 0xa6 + +# CHECK: mtspr 272, 4 +0x7c 0x90 0x43 0xa6 + +# CHECK: mtspr 273, 4 +0x7c 0x91 0x43 0xa6 + +# CHECK: mtspr 274, 4 +0x7c 0x92 0x43 0xa6 + +# CHECK: mtspr 275, 4 +0x7c 0x93 0x43 0xa6 + +# CHECK: mtspr 272, 4 +0x7c 0x90 0x43 0xa6 + +# CHECK: mtspr 273, 4 +0x7c 0x91 0x43 0xa6 + +# CHECK: mtspr 274, 4 +0x7c 0x92 0x43 0xa6 + +# CHECK: mtspr 275, 4 +0x7c 0x93 0x43 0xa6 + +# CHECK: mtspr 280, 4 +0x7c 0x98 0x43 0xa6 + +# CHECK: mfspr 4, 22 +0x7c 0x96 0x02 0xa6 + +# CHECK: mtspr 22, 4 +0x7c 0x96 0x03 0xa6 + +# CHECK: mfspr 4, 287 +0x7c 0x9f 0x42 0xa6 + +# CHECK: mfspr 4, 25 +0x7c 0x99 0x02 0xa6 + +# CHECK: mtspr 25, 4 +0x7c 0x99 0x03 0xa6 + +# CHECK: mfspr 4, 26 +0x7c 0x9a 0x02 0xa6 + +# CHECK: mtspr 26, 4 +0x7c 0x9a 0x03 0xa6 + +# CHECK: mfspr 4, 27 +0x7c 0x9b 0x02 0xa6 + +# CHECK: mtspr 27, 4 +0x7c 0x9b 0x03 0xa6 + +# CHECK: slbie 4 +0x7c 0x00 0x23 0x64 + +# CHECK: slbmte 4, 5 +0x7c 0x80 0x2b 0x24 + +# CHECK: slbmfee 4, 5 +0x7c 0x80 0x2f 0x26 + +# CHECK: slbia +0x7c 0x00 0x03 0xe4 + +# CHECK: tlbsync +0x7c 0x00 0x04 0x6c + +# CHECK: tlbiel 4 +0x7c 0x00 0x22 0x24 + +# CHECK: tlbie 4,0 +0x7c 0x00 0x22 0x64 + +# CHECK: tlbie 4,0 +0x7c 0x00 0x22 0x64 + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt new file mode 100644 index 0000000..108df30 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt @@ -0,0 +1,2253 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# FIXME: decode as beqlr 0 +# CHECK: bclr 12, 2, 0 +0x4d 0x82 0x00 0x20 + +# FIXME: decode as beqlr 1 +# CHECK: bclr 12, 6, 0 +0x4d 0x86 0x00 0x20 + +# FIXME: decode as beqlr 2 +# CHECK: bclr 12, 10, 0 +0x4d 0x8a 0x00 0x20 + +# FIXME: decode as beqlr 3 +# CHECK: bclr 12, 14, 0 +0x4d 0x8e 0x00 0x20 + +# FIXME: decode as beqlr 4 +# CHECK: bclr 12, 18, 0 +0x4d 0x92 0x00 0x20 + +# FIXME: decode as beqlr 5 +# CHECK: bclr 12, 22, 0 +0x4d 0x96 0x00 0x20 + +# FIXME: decode as beqlr 6 +# CHECK: bclr 12, 26, 0 +0x4d 0x9a 0x00 0x20 + +# FIXME: decode as beqlr 7 +# CHECK: bclr 12, 30, 0 +0x4d 0x9e 0x00 0x20 + +# CHECK: bclr 12, 0, 0 +0x4d 0x80 0x00 0x20 + +# CHECK: bclr 12, 1, 0 +0x4d 0x81 0x00 0x20 + +# CHECK: bclr 12, 2, 0 +0x4d 0x82 0x00 0x20 + +# CHECK: bclr 12, 3, 0 +0x4d 0x83 0x00 0x20 + +# CHECK: bclr 12, 3, 0 +0x4d 0x83 0x00 0x20 + +# CHECK: bclr 12, 4, 0 +0x4d 0x84 0x00 0x20 + +# CHECK: bclr 12, 5, 0 +0x4d 0x85 0x00 0x20 + +# CHECK: bclr 12, 6, 0 +0x4d 0x86 0x00 0x20 + +# CHECK: bclr 12, 7, 0 +0x4d 0x87 0x00 0x20 + +# CHECK: bclr 12, 7, 0 +0x4d 0x87 0x00 0x20 + +# CHECK: bclr 12, 8, 0 +0x4d 0x88 0x00 0x20 + +# CHECK: bclr 12, 9, 0 +0x4d 0x89 0x00 0x20 + +# CHECK: bclr 12, 10, 0 +0x4d 0x8a 0x00 0x20 + +# CHECK: bclr 12, 11, 0 +0x4d 0x8b 0x00 0x20 + +# CHECK: bclr 12, 11, 0 +0x4d 0x8b 0x00 0x20 + +# CHECK: bclr 12, 12, 0 +0x4d 0x8c 0x00 0x20 + +# CHECK: bclr 12, 13, 0 +0x4d 0x8d 0x00 0x20 + +# CHECK: bclr 12, 14, 0 +0x4d 0x8e 0x00 0x20 + +# CHECK: bclr 12, 15, 0 +0x4d 0x8f 0x00 0x20 + +# CHECK: bclr 12, 15, 0 +0x4d 0x8f 0x00 0x20 + +# CHECK: bclr 12, 16, 0 +0x4d 0x90 0x00 0x20 + +# CHECK: bclr 12, 17, 0 +0x4d 0x91 0x00 0x20 + +# CHECK: bclr 12, 18, 0 +0x4d 0x92 0x00 0x20 + +# CHECK: bclr 12, 19, 0 +0x4d 0x93 0x00 0x20 + +# CHECK: bclr 12, 19, 0 +0x4d 0x93 0x00 0x20 + +# CHECK: bclr 12, 20, 0 +0x4d 0x94 0x00 0x20 + +# CHECK: bclr 12, 21, 0 +0x4d 0x95 0x00 0x20 + +# CHECK: bclr 12, 22, 0 +0x4d 0x96 0x00 0x20 + +# CHECK: bclr 12, 23, 0 +0x4d 0x97 0x00 0x20 + +# CHECK: bclr 12, 23, 0 +0x4d 0x97 0x00 0x20 + +# CHECK: bclr 12, 24, 0 +0x4d 0x98 0x00 0x20 + +# CHECK: bclr 12, 25, 0 +0x4d 0x99 0x00 0x20 + +# CHECK: bclr 12, 26, 0 +0x4d 0x9a 0x00 0x20 + +# CHECK: bclr 12, 27, 0 +0x4d 0x9b 0x00 0x20 + +# CHECK: bclr 12, 27, 0 +0x4d 0x9b 0x00 0x20 + +# CHECK: bclr 12, 28, 0 +0x4d 0x9c 0x00 0x20 + +# CHECK: bclr 12, 29, 0 +0x4d 0x9d 0x00 0x20 + +# CHECK: bclr 12, 30, 0 +0x4d 0x9e 0x00 0x20 + +# CHECK: bclr 12, 31, 0 +0x4d 0x9f 0x00 0x20 + +# CHECK: bclr 12, 31, 0 +0x4d 0x9f 0x00 0x20 + +# CHECK: blr +0x4e 0x80 0x00 0x20 + +# CHECK: bctr +0x4e 0x80 0x04 0x20 + +# CHECK: blrl +0x4e 0x80 0x00 0x21 + +# CHECK: bctrl +0x4e 0x80 0x04 0x21 + +# CHECK: bclr 12, 2, 0 +0x4d 0x82 0x00 0x20 + +# CHECK: bcctr 12, 2, 0 +0x4d 0x82 0x04 0x20 + +# CHECK: bclrl 12, 2, 0 +0x4d 0x82 0x00 0x21 + +# CHECK: bcctrl 12, 2, 0 +0x4d 0x82 0x04 0x21 + +# CHECK: bclr 15, 2, 0 +0x4d 0xe2 0x00 0x20 + +# CHECK: bcctr 15, 2, 0 +0x4d 0xe2 0x04 0x20 + +# CHECK: bclrl 15, 2, 0 +0x4d 0xe2 0x00 0x21 + +# CHECK: bcctrl 15, 2, 0 +0x4d 0xe2 0x04 0x21 + +# CHECK: bclr 14, 2, 0 +0x4d 0xc2 0x00 0x20 + +# CHECK: bcctr 14, 2, 0 +0x4d 0xc2 0x04 0x20 + +# CHECK: bclrl 14, 2, 0 +0x4d 0xc2 0x00 0x21 + +# CHECK: bcctrl 14, 2, 0 +0x4d 0xc2 0x04 0x21 + +# CHECK: bclr 4, 2, 0 +0x4c 0x82 0x00 0x20 + +# CHECK: bcctr 4, 2, 0 +0x4c 0x82 0x04 0x20 + +# CHECK: bclrl 4, 2, 0 +0x4c 0x82 0x00 0x21 + +# CHECK: bcctrl 4, 2, 0 +0x4c 0x82 0x04 0x21 + +# CHECK: bclr 7, 2, 0 +0x4c 0xe2 0x00 0x20 + +# CHECK: bcctr 7, 2, 0 +0x4c 0xe2 0x04 0x20 + +# CHECK: bclrl 7, 2, 0 +0x4c 0xe2 0x00 0x21 + +# CHECK: bcctrl 7, 2, 0 +0x4c 0xe2 0x04 0x21 + +# CHECK: bclr 6, 2, 0 +0x4c 0xc2 0x00 0x20 + +# CHECK: bcctr 6, 2, 0 +0x4c 0xc2 0x04 0x20 + +# CHECK: bclrl 6, 2, 0 +0x4c 0xc2 0x00 0x21 + +# CHECK: bcctrl 6, 2, 0 +0x4c 0xc2 0x04 0x21 + +# CHECK: bdnzlr +0x4e 0x00 0x00 0x20 + +# CHECK: bdnzlrl +0x4e 0x00 0x00 0x21 + +# CHECK: bdnzlr+ +0x4f 0x20 0x00 0x20 + +# CHECK: bdnzlrl+ +0x4f 0x20 0x00 0x21 + +# CHECK: bdnzlr- +0x4f 0x00 0x00 0x20 + +# CHECK: bdnzlrl- +0x4f 0x00 0x00 0x21 + +# CHECK: bclr 8, 2, 0 +0x4d 0x02 0x00 0x20 + +# CHECK: bclrl 8, 2, 0 +0x4d 0x02 0x00 0x21 + +# CHECK: bclr 0, 2, 0 +0x4c 0x02 0x00 0x20 + +# CHECK: bclrl 0, 2, 0 +0x4c 0x02 0x00 0x21 + +# CHECK: bdzlr +0x4e 0x40 0x00 0x20 + +# CHECK: bdzlrl +0x4e 0x40 0x00 0x21 + +# CHECK: bdzlr+ +0x4f 0x60 0x00 0x20 + +# CHECK: bdzlrl+ +0x4f 0x60 0x00 0x21 + +# CHECK: bdzlr- +0x4f 0x40 0x00 0x20 + +# CHECK: bdzlrl- +0x4f 0x40 0x00 0x21 + +# CHECK: bclr 10, 2, 0 +0x4d 0x42 0x00 0x20 + +# CHECK: bclrl 10, 2, 0 +0x4d 0x42 0x00 0x21 + +# CHECK: bclr 2, 2, 0 +0x4c 0x42 0x00 0x20 + +# CHECK: bclrl 2, 2, 0 +0x4c 0x42 0x00 0x21 + +# FIXME: decode as bltlr 2 +# CHECK: bclr 12, 8, 0 +0x4d 0x88 0x00 0x20 + +# FIXME: decode as bltlr 0 +# CHECK: bclr 12, 0, 0 +0x4d 0x80 0x00 0x20 + +# FIXME: decode as bltctr 2 +# CHECK: bcctr 12, 8, 0 +0x4d 0x88 0x04 0x20 + +# FIXME: decode as bltctr 0 +# CHECK: bcctr 12, 0, 0 +0x4d 0x80 0x04 0x20 + +# FIXME: decode as bltlrl 2 +# CHECK: bclrl 12, 8, 0 +0x4d 0x88 0x00 0x21 + +# FIXME: decode as bltlrl 0 +# CHECK: bclrl 12, 0, 0 +0x4d 0x80 0x00 0x21 + +# FIXME: decode as bltctrl 2 +# CHECK: bcctrl 12, 8, 0 +0x4d 0x88 0x04 0x21 + +# FIXME: decode as bltctrl 0 +# CHECK: bcctrl 12, 0, 0 +0x4d 0x80 0x04 0x21 + +# FIXME: decode as bltlr+ 2 +# CHECK: bclr 15, 8, 0 +0x4d 0xe8 0x00 0x20 + +# FIXME: decode as bltlr+ 0 +# CHECK: bclr 15, 0, 0 +0x4d 0xe0 0x00 0x20 + +# FIXME: decode as bltctr+ 2 +# CHECK: bcctr 15, 8, 0 +0x4d 0xe8 0x04 0x20 + +# FIXME: decode as bltctr+ 0 +# CHECK: bcctr 15, 0, 0 +0x4d 0xe0 0x04 0x20 + +# FIXME: decode as bltlrl+ 2 +# CHECK: bclrl 15, 8, 0 +0x4d 0xe8 0x00 0x21 + +# FIXME: decode as bltlrl+ 0 +# CHECK: bclrl 15, 0, 0 +0x4d 0xe0 0x00 0x21 + +# FIXME: decode as bltctrl+ 2 +# CHECK: bcctrl 15, 8, 0 +0x4d 0xe8 0x04 0x21 + +# FIXME: decode as bltctrl+ 0 +# CHECK: bcctrl 15, 0, 0 +0x4d 0xe0 0x04 0x21 + +# FIXME: decode as bltlr- 2 +# CHECK: bclr 14, 8, 0 +0x4d 0xc8 0x00 0x20 + +# FIXME: decode as bltlr- 0 +# CHECK: bclr 14, 0, 0 +0x4d 0xc0 0x00 0x20 + +# FIXME: decode as bltctr- 2 +# CHECK: bcctr 14, 8, 0 +0x4d 0xc8 0x04 0x20 + +# FIXME: decode as bltctr- 0 +# CHECK: bcctr 14, 0, 0 +0x4d 0xc0 0x04 0x20 + +# FIXME: decode as bltlrl- 2 +# CHECK: bclrl 14, 8, 0 +0x4d 0xc8 0x00 0x21 + +# FIXME: decode as bltlrl- 0 +# CHECK: bclrl 14, 0, 0 +0x4d 0xc0 0x00 0x21 + +# FIXME: decode as bltctrl- 2 +# CHECK: bcctrl 14, 8, 0 +0x4d 0xc8 0x04 0x21 + +# FIXME: decode as bltctrl- 0 +# CHECK: bcctrl 14, 0, 0 +0x4d 0xc0 0x04 0x21 + +# FIXME: decode as blelr 2 +# CHECK: bclr 4, 9, 0 +0x4c 0x89 0x00 0x20 + +# FIXME: decode as blelr 0 +# CHECK: bclr 4, 1, 0 +0x4c 0x81 0x00 0x20 + +# FIXME: decode as blectr 2 +# CHECK: bcctr 4, 9, 0 +0x4c 0x89 0x04 0x20 + +# FIXME: decode as blectr 0 +# CHECK: bcctr 4, 1, 0 +0x4c 0x81 0x04 0x20 + +# FIXME: decode as blelrl 2 +# CHECK: bclrl 4, 9, 0 +0x4c 0x89 0x00 0x21 + +# FIXME: decode as blelrl 0 +# CHECK: bclrl 4, 1, 0 +0x4c 0x81 0x00 0x21 + +# FIXME: decode as blectrl 2 +# CHECK: bcctrl 4, 9, 0 +0x4c 0x89 0x04 0x21 + +# FIXME: decode as blectrl 0 +# CHECK: bcctrl 4, 1, 0 +0x4c 0x81 0x04 0x21 + +# FIXME: decode as blelr+ 2 +# CHECK: bclr 7, 9, 0 +0x4c 0xe9 0x00 0x20 + +# FIXME: decode as blelr+ 0 +# CHECK: bclr 7, 1, 0 +0x4c 0xe1 0x00 0x20 + +# FIXME: decode as blectr+ 2 +# CHECK: bcctr 7, 9, 0 +0x4c 0xe9 0x04 0x20 + +# FIXME: decode as blectr+ 0 +# CHECK: bcctr 7, 1, 0 +0x4c 0xe1 0x04 0x20 + +# FIXME: decode as blelrl+ 2 +# CHECK: bclrl 7, 9, 0 +0x4c 0xe9 0x00 0x21 + +# FIXME: decode as blelrl+ 0 +# CHECK: bclrl 7, 1, 0 +0x4c 0xe1 0x00 0x21 + +# FIXME: decode as blectrl+ 2 +# CHECK: bcctrl 7, 9, 0 +0x4c 0xe9 0x04 0x21 + +# FIXME: decode as blectrl+ 0 +# CHECK: bcctrl 7, 1, 0 +0x4c 0xe1 0x04 0x21 + +# FIXME: decode as blelr- 2 +# CHECK: bclr 6, 9, 0 +0x4c 0xc9 0x00 0x20 + +# FIXME: decode as blelr- 0 +# CHECK: bclr 6, 1, 0 +0x4c 0xc1 0x00 0x20 + +# FIXME: decode as blectr- 2 +# CHECK: bcctr 6, 9, 0 +0x4c 0xc9 0x04 0x20 + +# FIXME: decode as blectr- 0 +# CHECK: bcctr 6, 1, 0 +0x4c 0xc1 0x04 0x20 + +# FIXME: decode as blelrl- 2 +# CHECK: bclrl 6, 9, 0 +0x4c 0xc9 0x00 0x21 + +# FIXME: decode as blelrl- 0 +# CHECK: bclrl 6, 1, 0 +0x4c 0xc1 0x00 0x21 + +# FIXME: decode as blectrl- 2 +# CHECK: bcctrl 6, 9, 0 +0x4c 0xc9 0x04 0x21 + +# FIXME: decode as blectrl- 0 +# CHECK: bcctrl 6, 1, 0 +0x4c 0xc1 0x04 0x21 + +# FIXME: decode as beqlr 2 +# CHECK: bclr 12, 10, 0 +0x4d 0x8a 0x00 0x20 + +# FIXME: decode as beqlr 0 +# CHECK: bclr 12, 2, 0 +0x4d 0x82 0x00 0x20 + +# FIXME: decode as beqctr 2 +# CHECK: bcctr 12, 10, 0 +0x4d 0x8a 0x04 0x20 + +# FIXME: decode as beqctr 0 +# CHECK: bcctr 12, 2, 0 +0x4d 0x82 0x04 0x20 + +# FIXME: decode as beqlrl 2 +# CHECK: bclrl 12, 10, 0 +0x4d 0x8a 0x00 0x21 + +# FIXME: decode as beqlrl 0 +# CHECK: bclrl 12, 2, 0 +0x4d 0x82 0x00 0x21 + +# FIXME: decode as beqctrl 2 +# CHECK: bcctrl 12, 10, 0 +0x4d 0x8a 0x04 0x21 + +# FIXME: decode as beqctrl 0 +# CHECK: bcctrl 12, 2, 0 +0x4d 0x82 0x04 0x21 + +# FIXME: decode as beqlr+ 2 +# CHECK: bclr 15, 10, 0 +0x4d 0xea 0x00 0x20 + +# FIXME: decode as beqlr+ 0 +# CHECK: bclr 15, 2, 0 +0x4d 0xe2 0x00 0x20 + +# FIXME: decode as beqctr+ 2 +# CHECK: bcctr 15, 10, 0 +0x4d 0xea 0x04 0x20 + +# FIXME: decode as beqctr+ 0 +# CHECK: bcctr 15, 2, 0 +0x4d 0xe2 0x04 0x20 + +# FIXME: decode as beqlrl+ 2 +# CHECK: bclrl 15, 10, 0 +0x4d 0xea 0x00 0x21 + +# FIXME: decode as beqlrl+ 0 +# CHECK: bclrl 15, 2, 0 +0x4d 0xe2 0x00 0x21 + +# FIXME: decode as beqctrl+ 2 +# CHECK: bcctrl 15, 10, 0 +0x4d 0xea 0x04 0x21 + +# FIXME: decode as beqctrl+ 0 +# CHECK: bcctrl 15, 2, 0 +0x4d 0xe2 0x04 0x21 + +# FIXME: decode as beqlr- 2 +# CHECK: bclr 14, 10, 0 +0x4d 0xca 0x00 0x20 + +# FIXME: decode as beqlr- 0 +# CHECK: bclr 14, 2, 0 +0x4d 0xc2 0x00 0x20 + +# FIXME: decode as beqctr- 2 +# CHECK: bcctr 14, 10, 0 +0x4d 0xca 0x04 0x20 + +# FIXME: decode as beqctr- 0 +# CHECK: bcctr 14, 2, 0 +0x4d 0xc2 0x04 0x20 + +# FIXME: decode as beqlrl- 2 +# CHECK: bclrl 14, 10, 0 +0x4d 0xca 0x00 0x21 + +# FIXME: decode as beqlrl- 0 +# CHECK: bclrl 14, 2, 0 +0x4d 0xc2 0x00 0x21 + +# FIXME: decode as beqctrl- 2 +# CHECK: bcctrl 14, 10, 0 +0x4d 0xca 0x04 0x21 + +# FIXME: decode as beqctrl- 0 +# CHECK: bcctrl 14, 2, 0 +0x4d 0xc2 0x04 0x21 + +# FIXME: decode as bgelr 2 +# CHECK: bclr 4, 8, 0 +0x4c 0x88 0x00 0x20 + +# FIXME: decode as bgelr 0 +# CHECK: bclr 4, 0, 0 +0x4c 0x80 0x00 0x20 + +# FIXME: decode as bgectr 2 +# CHECK: bcctr 4, 8, 0 +0x4c 0x88 0x04 0x20 + +# FIXME: decode as bgectr 0 +# CHECK: bcctr 4, 0, 0 +0x4c 0x80 0x04 0x20 + +# FIXME: decode as bgelrl 2 +# CHECK: bclrl 4, 8, 0 +0x4c 0x88 0x00 0x21 + +# FIXME: decode as bgelrl 0 +# CHECK: bclrl 4, 0, 0 +0x4c 0x80 0x00 0x21 + +# FIXME: decode as bgectrl 2 +# CHECK: bcctrl 4, 8, 0 +0x4c 0x88 0x04 0x21 + +# FIXME: decode as bgectrl 0 +# CHECK: bcctrl 4, 0, 0 +0x4c 0x80 0x04 0x21 + +# FIXME: decode as bgelr+ 2 +# CHECK: bclr 7, 8, 0 +0x4c 0xe8 0x00 0x20 + +# FIXME: decode as bgelr+ 0 +# CHECK: bclr 7, 0, 0 +0x4c 0xe0 0x00 0x20 + +# FIXME: decode as bgectr+ 2 +# CHECK: bcctr 7, 8, 0 +0x4c 0xe8 0x04 0x20 + +# FIXME: decode as bgectr+ 0 +# CHECK: bcctr 7, 0, 0 +0x4c 0xe0 0x04 0x20 + +# FIXME: decode as bgelrl+ 2 +# CHECK: bclrl 7, 8, 0 +0x4c 0xe8 0x00 0x21 + +# FIXME: decode as bgelrl+ 0 +# CHECK: bclrl 7, 0, 0 +0x4c 0xe0 0x00 0x21 + +# FIXME: decode as bgectrl+ 2 +# CHECK: bcctrl 7, 8, 0 +0x4c 0xe8 0x04 0x21 + +# FIXME: decode as bgectrl+ 0 +# CHECK: bcctrl 7, 0, 0 +0x4c 0xe0 0x04 0x21 + +# FIXME: decode as bgelr- 2 +# CHECK: bclr 6, 8, 0 +0x4c 0xc8 0x00 0x20 + +# FIXME: decode as bgelr- 0 +# CHECK: bclr 6, 0, 0 +0x4c 0xc0 0x00 0x20 + +# FIXME: decode as bgectr- 2 +# CHECK: bcctr 6, 8, 0 +0x4c 0xc8 0x04 0x20 + +# FIXME: decode as bgectr- 0 +# CHECK: bcctr 6, 0, 0 +0x4c 0xc0 0x04 0x20 + +# FIXME: decode as bgelrl- 2 +# CHECK: bclrl 6, 8, 0 +0x4c 0xc8 0x00 0x21 + +# FIXME: decode as bgelrl- 0 +# CHECK: bclrl 6, 0, 0 +0x4c 0xc0 0x00 0x21 + +# FIXME: decode as bgectrl- 2 +# CHECK: bcctrl 6, 8, 0 +0x4c 0xc8 0x04 0x21 + +# FIXME: decode as bgectrl- 0 +# CHECK: bcctrl 6, 0, 0 +0x4c 0xc0 0x04 0x21 + +# FIXME: decode as bgtlr 2 +# CHECK: bclr 12, 9, 0 +0x4d 0x89 0x00 0x20 + +# FIXME: decode as bgtlr 0 +# CHECK: bclr 12, 1, 0 +0x4d 0x81 0x00 0x20 + +# FIXME: decode as bgtctr 2 +# CHECK: bcctr 12, 9, 0 +0x4d 0x89 0x04 0x20 + +# FIXME: decode as bgtctr 0 +# CHECK: bcctr 12, 1, 0 +0x4d 0x81 0x04 0x20 + +# FIXME: decode as bgtlrl 2 +# CHECK: bclrl 12, 9, 0 +0x4d 0x89 0x00 0x21 + +# FIXME: decode as bgtlrl 0 +# CHECK: bclrl 12, 1, 0 +0x4d 0x81 0x00 0x21 + +# FIXME: decode as bgtctrl 2 +# CHECK: bcctrl 12, 9, 0 +0x4d 0x89 0x04 0x21 + +# FIXME: decode as bgtctrl 0 +# CHECK: bcctrl 12, 1, 0 +0x4d 0x81 0x04 0x21 + +# FIXME: decode as bgtlr+ 2 +# CHECK: bclr 15, 9, 0 +0x4d 0xe9 0x00 0x20 + +# FIXME: decode as bgtlr+ 0 +# CHECK: bclr 15, 1, 0 +0x4d 0xe1 0x00 0x20 + +# FIXME: decode as bgtctr+ 2 +# CHECK: bcctr 15, 9, 0 +0x4d 0xe9 0x04 0x20 + +# FIXME: decode as bgtctr+ 0 +# CHECK: bcctr 15, 1, 0 +0x4d 0xe1 0x04 0x20 + +# FIXME: decode as bgtlrl+ 2 +# CHECK: bclrl 15, 9, 0 +0x4d 0xe9 0x00 0x21 + +# FIXME: decode as bgtlrl+ 0 +# CHECK: bclrl 15, 1, 0 +0x4d 0xe1 0x00 0x21 + +# FIXME: decode as bgtctrl+ 2 +# CHECK: bcctrl 15, 9, 0 +0x4d 0xe9 0x04 0x21 + +# FIXME: decode as bgtctrl+ 0 +# CHECK: bcctrl 15, 1, 0 +0x4d 0xe1 0x04 0x21 + +# FIXME: decode as bgtlr- 2 +# CHECK: bclr 14, 9, 0 +0x4d 0xc9 0x00 0x20 + +# FIXME: decode as bgtlr- 0 +# CHECK: bclr 14, 1, 0 +0x4d 0xc1 0x00 0x20 + +# FIXME: decode as bgtctr- 2 +# CHECK: bcctr 14, 9, 0 +0x4d 0xc9 0x04 0x20 + +# FIXME: decode as bgtctr- 0 +# CHECK: bcctr 14, 1, 0 +0x4d 0xc1 0x04 0x20 + +# FIXME: decode as bgtlrl- 2 +# CHECK: bclrl 14, 9, 0 +0x4d 0xc9 0x00 0x21 + +# FIXME: decode as bgtlrl- 0 +# CHECK: bclrl 14, 1, 0 +0x4d 0xc1 0x00 0x21 + +# FIXME: decode as bgtctrl- 2 +# CHECK: bcctrl 14, 9, 0 +0x4d 0xc9 0x04 0x21 + +# FIXME: decode as bgtctrl- 0 +# CHECK: bcctrl 14, 1, 0 +0x4d 0xc1 0x04 0x21 + +# FIXME: decode as bgelr 2 +# CHECK: bclr 4, 8, 0 +0x4c 0x88 0x00 0x20 + +# FIXME: decode as bgelr 0 +# CHECK: bclr 4, 0, 0 +0x4c 0x80 0x00 0x20 + +# FIXME: decode as bgectr 2 +# CHECK: bcctr 4, 8, 0 +0x4c 0x88 0x04 0x20 + +# FIXME: decode as bgectr 0 +# CHECK: bcctr 4, 0, 0 +0x4c 0x80 0x04 0x20 + +# FIXME: decode as bgelrl 2 +# CHECK: bclrl 4, 8, 0 +0x4c 0x88 0x00 0x21 + +# FIXME: decode as bgelrl 0 +# CHECK: bclrl 4, 0, 0 +0x4c 0x80 0x00 0x21 + +# FIXME: decode as bgectrl 2 +# CHECK: bcctrl 4, 8, 0 +0x4c 0x88 0x04 0x21 + +# FIXME: decode as bgectrl 0 +# CHECK: bcctrl 4, 0, 0 +0x4c 0x80 0x04 0x21 + +# FIXME: decode as bgelr+ 2 +# CHECK: bclr 7, 8, 0 +0x4c 0xe8 0x00 0x20 + +# FIXME: decode as bgelr+ 0 +# CHECK: bclr 7, 0, 0 +0x4c 0xe0 0x00 0x20 + +# FIXME: decode as bgectr+ 2 +# CHECK: bcctr 7, 8, 0 +0x4c 0xe8 0x04 0x20 + +# FIXME: decode as bgectr+ 0 +# CHECK: bcctr 7, 0, 0 +0x4c 0xe0 0x04 0x20 + +# FIXME: decode as bgelrl+ 2 +# CHECK: bclrl 7, 8, 0 +0x4c 0xe8 0x00 0x21 + +# FIXME: decode as bgelrl+ 0 +# CHECK: bclrl 7, 0, 0 +0x4c 0xe0 0x00 0x21 + +# FIXME: decode as bgectrl+ 2 +# CHECK: bcctrl 7, 8, 0 +0x4c 0xe8 0x04 0x21 + +# FIXME: decode as bgectrl+ 0 +# CHECK: bcctrl 7, 0, 0 +0x4c 0xe0 0x04 0x21 + +# FIXME: decode as bgelr- 2 +# CHECK: bclr 6, 8, 0 +0x4c 0xc8 0x00 0x20 + +# FIXME: decode as bgelr- 0 +# CHECK: bclr 6, 0, 0 +0x4c 0xc0 0x00 0x20 + +# FIXME: decode as bgectr- 2 +# CHECK: bcctr 6, 8, 0 +0x4c 0xc8 0x04 0x20 + +# FIXME: decode as bgectr- 0 +# CHECK: bcctr 6, 0, 0 +0x4c 0xc0 0x04 0x20 + +# FIXME: decode as bgelrl- 2 +# CHECK: bclrl 6, 8, 0 +0x4c 0xc8 0x00 0x21 + +# FIXME: decode as bgelrl- 0 +# CHECK: bclrl 6, 0, 0 +0x4c 0xc0 0x00 0x21 + +# FIXME: decode as bgectrl- 2 +# CHECK: bcctrl 6, 8, 0 +0x4c 0xc8 0x04 0x21 + +# FIXME: decode as bgectrl- 0 +# CHECK: bcctrl 6, 0, 0 +0x4c 0xc0 0x04 0x21 + +# FIXME: decode as bnelr 2 +# CHECK: bclr 4, 10, 0 +0x4c 0x8a 0x00 0x20 + +# FIXME: decode as bnelr 0 +# CHECK: bclr 4, 2, 0 +0x4c 0x82 0x00 0x20 + +# FIXME: decode as bnectr 2 +# CHECK: bcctr 4, 10, 0 +0x4c 0x8a 0x04 0x20 + +# FIXME: decode as bnectr 0 +# CHECK: bcctr 4, 2, 0 +0x4c 0x82 0x04 0x20 + +# FIXME: decode as bnelrl 2 +# CHECK: bclrl 4, 10, 0 +0x4c 0x8a 0x00 0x21 + +# FIXME: decode as bnelrl 0 +# CHECK: bclrl 4, 2, 0 +0x4c 0x82 0x00 0x21 + +# FIXME: decode as bnectrl 2 +# CHECK: bcctrl 4, 10, 0 +0x4c 0x8a 0x04 0x21 + +# FIXME: decode as bnectrl 0 +# CHECK: bcctrl 4, 2, 0 +0x4c 0x82 0x04 0x21 + +# FIXME: decode as bnelr+ 2 +# CHECK: bclr 7, 10, 0 +0x4c 0xea 0x00 0x20 + +# FIXME: decode as bnelr+ 0 +# CHECK: bclr 7, 2, 0 +0x4c 0xe2 0x00 0x20 + +# FIXME: decode as bnectr+ 2 +# CHECK: bcctr 7, 10, 0 +0x4c 0xea 0x04 0x20 + +# FIXME: decode as bnectr+ 0 +# CHECK: bcctr 7, 2, 0 +0x4c 0xe2 0x04 0x20 + +# FIXME: decode as bnelrl+ 2 +# CHECK: bclrl 7, 10, 0 +0x4c 0xea 0x00 0x21 + +# FIXME: decode as bnelrl+ 0 +# CHECK: bclrl 7, 2, 0 +0x4c 0xe2 0x00 0x21 + +# FIXME: decode as bnectrl+ 2 +# CHECK: bcctrl 7, 10, 0 +0x4c 0xea 0x04 0x21 + +# FIXME: decode as bnectrl+ 0 +# CHECK: bcctrl 7, 2, 0 +0x4c 0xe2 0x04 0x21 + +# FIXME: decode as bnelr- 2 +# CHECK: bclr 6, 10, 0 +0x4c 0xca 0x00 0x20 + +# FIXME: decode as bnelr- 0 +# CHECK: bclr 6, 2, 0 +0x4c 0xc2 0x00 0x20 + +# FIXME: decode as bnectr- 2 +# CHECK: bcctr 6, 10, 0 +0x4c 0xca 0x04 0x20 + +# FIXME: decode as bnectr- 0 +# CHECK: bcctr 6, 2, 0 +0x4c 0xc2 0x04 0x20 + +# FIXME: decode as bnelrl- 2 +# CHECK: bclrl 6, 10, 0 +0x4c 0xca 0x00 0x21 + +# FIXME: decode as bnelrl- 0 +# CHECK: bclrl 6, 2, 0 +0x4c 0xc2 0x00 0x21 + +# FIXME: decode as bnectrl- 2 +# CHECK: bcctrl 6, 10, 0 +0x4c 0xca 0x04 0x21 + +# FIXME: decode as bnectrl- 0 +# CHECK: bcctrl 6, 2, 0 +0x4c 0xc2 0x04 0x21 + +# FIXME: decode as blelr 2 +# CHECK: bclr 4, 9, 0 +0x4c 0x89 0x00 0x20 + +# FIXME: decode as blelr 0 +# CHECK: bclr 4, 1, 0 +0x4c 0x81 0x00 0x20 + +# FIXME: decode as blectr 2 +# CHECK: bcctr 4, 9, 0 +0x4c 0x89 0x04 0x20 + +# FIXME: decode as blectr 0 +# CHECK: bcctr 4, 1, 0 +0x4c 0x81 0x04 0x20 + +# FIXME: decode as blelrl 2 +# CHECK: bclrl 4, 9, 0 +0x4c 0x89 0x00 0x21 + +# FIXME: decode as blelrl 0 +# CHECK: bclrl 4, 1, 0 +0x4c 0x81 0x00 0x21 + +# FIXME: decode as blectrl 2 +# CHECK: bcctrl 4, 9, 0 +0x4c 0x89 0x04 0x21 + +# FIXME: decode as blectrl 0 +# CHECK: bcctrl 4, 1, 0 +0x4c 0x81 0x04 0x21 + +# FIXME: decode as blelr+ 2 +# CHECK: bclr 7, 9, 0 +0x4c 0xe9 0x00 0x20 + +# FIXME: decode as blelr+ 0 +# CHECK: bclr 7, 1, 0 +0x4c 0xe1 0x00 0x20 + +# FIXME: decode as blectr+ 2 +# CHECK: bcctr 7, 9, 0 +0x4c 0xe9 0x04 0x20 + +# FIXME: decode as blectr+ 0 +# CHECK: bcctr 7, 1, 0 +0x4c 0xe1 0x04 0x20 + +# FIXME: decode as blelrl+ 2 +# CHECK: bclrl 7, 9, 0 +0x4c 0xe9 0x00 0x21 + +# FIXME: decode as blelrl+ 0 +# CHECK: bclrl 7, 1, 0 +0x4c 0xe1 0x00 0x21 + +# FIXME: decode as blectrl+ 2 +# CHECK: bcctrl 7, 9, 0 +0x4c 0xe9 0x04 0x21 + +# FIXME: decode as blectrl+ 0 +# CHECK: bcctrl 7, 1, 0 +0x4c 0xe1 0x04 0x21 + +# FIXME: decode as blelr- 2 +# CHECK: bclr 6, 9, 0 +0x4c 0xc9 0x00 0x20 + +# FIXME: decode as blelr- 0 +# CHECK: bclr 6, 1, 0 +0x4c 0xc1 0x00 0x20 + +# FIXME: decode as blectr- 2 +# CHECK: bcctr 6, 9, 0 +0x4c 0xc9 0x04 0x20 + +# FIXME: decode as blectr- 0 +# CHECK: bcctr 6, 1, 0 +0x4c 0xc1 0x04 0x20 + +# FIXME: decode as blelrl- 2 +# CHECK: bclrl 6, 9, 0 +0x4c 0xc9 0x00 0x21 + +# FIXME: decode as blelrl- 0 +# CHECK: bclrl 6, 1, 0 +0x4c 0xc1 0x00 0x21 + +# FIXME: decode as blectrl- 2 +# CHECK: bcctrl 6, 9, 0 +0x4c 0xc9 0x04 0x21 + +# FIXME: decode as blectrl- 0 +# CHECK: bcctrl 6, 1, 0 +0x4c 0xc1 0x04 0x21 + +# FIXME: decode as bunlr 2 +# CHECK: bclr 12, 11, 0 +0x4d 0x8b 0x00 0x20 + +# FIXME: decode as bunlr 0 +# CHECK: bclr 12, 3, 0 +0x4d 0x83 0x00 0x20 + +# FIXME: decode as bunctr 2 +# CHECK: bcctr 12, 11, 0 +0x4d 0x8b 0x04 0x20 + +# FIXME: decode as bunctr 0 +# CHECK: bcctr 12, 3, 0 +0x4d 0x83 0x04 0x20 + +# FIXME: decode as bunlrl 2 +# CHECK: bclrl 12, 11, 0 +0x4d 0x8b 0x00 0x21 + +# FIXME: decode as bunlrl 0 +# CHECK: bclrl 12, 3, 0 +0x4d 0x83 0x00 0x21 + +# FIXME: decode as bunctrl 2 +# CHECK: bcctrl 12, 11, 0 +0x4d 0x8b 0x04 0x21 + +# FIXME: decode as bunctrl 0 +# CHECK: bcctrl 12, 3, 0 +0x4d 0x83 0x04 0x21 + +# FIXME: decode as bunlr+ 2 +# CHECK: bclr 15, 11, 0 +0x4d 0xeb 0x00 0x20 + +# FIXME: decode as bunlr+ 0 +# CHECK: bclr 15, 3, 0 +0x4d 0xe3 0x00 0x20 + +# FIXME: decode as bunctr+ 2 +# CHECK: bcctr 15, 11, 0 +0x4d 0xeb 0x04 0x20 + +# FIXME: decode as bunctr+ 0 +# CHECK: bcctr 15, 3, 0 +0x4d 0xe3 0x04 0x20 + +# FIXME: decode as bunlrl+ 2 +# CHECK: bclrl 15, 11, 0 +0x4d 0xeb 0x00 0x21 + +# FIXME: decode as bunlrl+ 0 +# CHECK: bclrl 15, 3, 0 +0x4d 0xe3 0x00 0x21 + +# FIXME: decode as bunctrl+ 2 +# CHECK: bcctrl 15, 11, 0 +0x4d 0xeb 0x04 0x21 + +# FIXME: decode as bunctrl+ 0 +# CHECK: bcctrl 15, 3, 0 +0x4d 0xe3 0x04 0x21 + +# FIXME: decode as bunlr- 2 +# CHECK: bclr 14, 11, 0 +0x4d 0xcb 0x00 0x20 + +# FIXME: decode as bunlr- 0 +# CHECK: bclr 14, 3, 0 +0x4d 0xc3 0x00 0x20 + +# FIXME: decode as bunctr- 2 +# CHECK: bcctr 14, 11, 0 +0x4d 0xcb 0x04 0x20 + +# FIXME: decode as bunctr- 0 +# CHECK: bcctr 14, 3, 0 +0x4d 0xc3 0x04 0x20 + +# FIXME: decode as bunlrl- 2 +# CHECK: bclrl 14, 11, 0 +0x4d 0xcb 0x00 0x21 + +# FIXME: decode as bunlrl- 0 +# CHECK: bclrl 14, 3, 0 +0x4d 0xc3 0x00 0x21 + +# FIXME: decode as bunctrl- 2 +# CHECK: bcctrl 14, 11, 0 +0x4d 0xcb 0x04 0x21 + +# FIXME: decode as bunctrl- 0 +# CHECK: bcctrl 14, 3, 0 +0x4d 0xc3 0x04 0x21 + +# FIXME: decode as bnulr 2 +# CHECK: bclr 4, 11, 0 +0x4c 0x8b 0x00 0x20 + +# FIXME: decode as bnulr 0 +# CHECK: bclr 4, 3, 0 +0x4c 0x83 0x00 0x20 + +# FIXME: decode as bnuctr 2 +# CHECK: bcctr 4, 11, 0 +0x4c 0x8b 0x04 0x20 + +# FIXME: decode as bnuctr 0 +# CHECK: bcctr 4, 3, 0 +0x4c 0x83 0x04 0x20 + +# FIXME: decode as bnulrl 2 +# CHECK: bclrl 4, 11, 0 +0x4c 0x8b 0x00 0x21 + +# FIXME: decode as bnulrl 0 +# CHECK: bclrl 4, 3, 0 +0x4c 0x83 0x00 0x21 + +# FIXME: decode as bnuctrl 2 +# CHECK: bcctrl 4, 11, 0 +0x4c 0x8b 0x04 0x21 + +# FIXME: decode as bnuctrl 0 +# CHECK: bcctrl 4, 3, 0 +0x4c 0x83 0x04 0x21 + +# FIXME: decode as bnulr+ 2 +# CHECK: bclr 7, 11, 0 +0x4c 0xeb 0x00 0x20 + +# FIXME: decode as bnulr+ 0 +# CHECK: bclr 7, 3, 0 +0x4c 0xe3 0x00 0x20 + +# FIXME: decode as bnuctr+ 2 +# CHECK: bcctr 7, 11, 0 +0x4c 0xeb 0x04 0x20 + +# FIXME: decode as bnuctr+ 0 +# CHECK: bcctr 7, 3, 0 +0x4c 0xe3 0x04 0x20 + +# FIXME: decode as bnulrl+ 2 +# CHECK: bclrl 7, 11, 0 +0x4c 0xeb 0x00 0x21 + +# FIXME: decode as bnulrl+ 0 +# CHECK: bclrl 7, 3, 0 +0x4c 0xe3 0x00 0x21 + +# FIXME: decode as bnuctrl+ 2 +# CHECK: bcctrl 7, 11, 0 +0x4c 0xeb 0x04 0x21 + +# FIXME: decode as bnuctrl+ 0 +# CHECK: bcctrl 7, 3, 0 +0x4c 0xe3 0x04 0x21 + +# FIXME: decode as bnulr- 2 +# CHECK: bclr 6, 11, 0 +0x4c 0xcb 0x00 0x20 + +# FIXME: decode as bnulr- 0 +# CHECK: bclr 6, 3, 0 +0x4c 0xc3 0x00 0x20 + +# FIXME: decode as bnuctr- 2 +# CHECK: bcctr 6, 11, 0 +0x4c 0xcb 0x04 0x20 + +# FIXME: decode as bnuctr- 0 +# CHECK: bcctr 6, 3, 0 +0x4c 0xc3 0x04 0x20 + +# FIXME: decode as bnulrl- 2 +# CHECK: bclrl 6, 11, 0 +0x4c 0xcb 0x00 0x21 + +# FIXME: decode as bnulrl- 0 +# CHECK: bclrl 6, 3, 0 +0x4c 0xc3 0x00 0x21 + +# FIXME: decode as bnuctrl- 2 +# CHECK: bcctrl 6, 11, 0 +0x4c 0xcb 0x04 0x21 + +# FIXME: decode as bnuctrl- 0 +# CHECK: bcctrl 6, 3, 0 +0x4c 0xc3 0x04 0x21 + +# FIXME: decode as bunlr 2 +# CHECK: bclr 12, 11, 0 +0x4d 0x8b 0x00 0x20 + +# FIXME: decode as bunlr 0 +# CHECK: bclr 12, 3, 0 +0x4d 0x83 0x00 0x20 + +# FIXME: decode as bunctr 2 +# CHECK: bcctr 12, 11, 0 +0x4d 0x8b 0x04 0x20 + +# FIXME: decode as bunctr 0 +# CHECK: bcctr 12, 3, 0 +0x4d 0x83 0x04 0x20 + +# FIXME: decode as bunlrl 2 +# CHECK: bclrl 12, 11, 0 +0x4d 0x8b 0x00 0x21 + +# FIXME: decode as bunlrl 0 +# CHECK: bclrl 12, 3, 0 +0x4d 0x83 0x00 0x21 + +# FIXME: decode as bunctrl 2 +# CHECK: bcctrl 12, 11, 0 +0x4d 0x8b 0x04 0x21 + +# FIXME: decode as bunctrl 0 +# CHECK: bcctrl 12, 3, 0 +0x4d 0x83 0x04 0x21 + +# FIXME: decode as bunlr+ 2 +# CHECK: bclr 15, 11, 0 +0x4d 0xeb 0x00 0x20 + +# FIXME: decode as bunlr+ 0 +# CHECK: bclr 15, 3, 0 +0x4d 0xe3 0x00 0x20 + +# FIXME: decode as bunctr+ 2 +# CHECK: bcctr 15, 11, 0 +0x4d 0xeb 0x04 0x20 + +# FIXME: decode as bunctr+ 0 +# CHECK: bcctr 15, 3, 0 +0x4d 0xe3 0x04 0x20 + +# FIXME: decode as bunlrl+ 2 +# CHECK: bclrl 15, 11, 0 +0x4d 0xeb 0x00 0x21 + +# FIXME: decode as bunlrl+ 0 +# CHECK: bclrl 15, 3, 0 +0x4d 0xe3 0x00 0x21 + +# FIXME: decode as bunctrl+ 2 +# CHECK: bcctrl 15, 11, 0 +0x4d 0xeb 0x04 0x21 + +# FIXME: decode as bunctrl+ 0 +# CHECK: bcctrl 15, 3, 0 +0x4d 0xe3 0x04 0x21 + +# FIXME: decode as bunlr- 2 +# CHECK: bclr 14, 11, 0 +0x4d 0xcb 0x00 0x20 + +# FIXME: decode as bunlr- 0 +# CHECK: bclr 14, 3, 0 +0x4d 0xc3 0x00 0x20 + +# FIXME: decode as bunctr- 2 +# CHECK: bcctr 14, 11, 0 +0x4d 0xcb 0x04 0x20 + +# FIXME: decode as bunctr- 0 +# CHECK: bcctr 14, 3, 0 +0x4d 0xc3 0x04 0x20 + +# FIXME: decode as bunlrl- 2 +# CHECK: bclrl 14, 11, 0 +0x4d 0xcb 0x00 0x21 + +# FIXME: decode as bunlrl- 0 +# CHECK: bclrl 14, 3, 0 +0x4d 0xc3 0x00 0x21 + +# FIXME: decode as bunctrl- 2 +# CHECK: bcctrl 14, 11, 0 +0x4d 0xcb 0x04 0x21 + +# FIXME: decode as bunctrl- 0 +# CHECK: bcctrl 14, 3, 0 +0x4d 0xc3 0x04 0x21 + +# FIXME: decode as bnulr 2 +# CHECK: bclr 4, 11, 0 +0x4c 0x8b 0x00 0x20 + +# FIXME: decode as bnulr 0 +# CHECK: bclr 4, 3, 0 +0x4c 0x83 0x00 0x20 + +# FIXME: decode as bnuctr 2 +# CHECK: bcctr 4, 11, 0 +0x4c 0x8b 0x04 0x20 + +# FIXME: decode as bnuctr 0 +# CHECK: bcctr 4, 3, 0 +0x4c 0x83 0x04 0x20 + +# FIXME: decode as bnulrl 2 +# CHECK: bclrl 4, 11, 0 +0x4c 0x8b 0x00 0x21 + +# FIXME: decode as bnulrl 0 +# CHECK: bclrl 4, 3, 0 +0x4c 0x83 0x00 0x21 + +# FIXME: decode as bnuctrl 2 +# CHECK: bcctrl 4, 11, 0 +0x4c 0x8b 0x04 0x21 + +# FIXME: decode as bnuctrl 0 +# CHECK: bcctrl 4, 3, 0 +0x4c 0x83 0x04 0x21 + +# FIXME: decode as bnulr+ 2 +# CHECK: bclr 7, 11, 0 +0x4c 0xeb 0x00 0x20 + +# FIXME: decode as bnulr+ 0 +# CHECK: bclr 7, 3, 0 +0x4c 0xe3 0x00 0x20 + +# FIXME: decode as bnuctr+ 2 +# CHECK: bcctr 7, 11, 0 +0x4c 0xeb 0x04 0x20 + +# FIXME: decode as bnuctr+ 0 +# CHECK: bcctr 7, 3, 0 +0x4c 0xe3 0x04 0x20 + +# FIXME: decode as bnulrl+ 2 +# CHECK: bclrl 7, 11, 0 +0x4c 0xeb 0x00 0x21 + +# FIXME: decode as bnulrl+ 0 +# CHECK: bclrl 7, 3, 0 +0x4c 0xe3 0x00 0x21 + +# FIXME: decode as bnuctrl+ 2 +# CHECK: bcctrl 7, 11, 0 +0x4c 0xeb 0x04 0x21 + +# FIXME: decode as bnuctrl+ 0 +# CHECK: bcctrl 7, 3, 0 +0x4c 0xe3 0x04 0x21 + +# FIXME: decode as bnulr- 2 +# CHECK: bclr 6, 11, 0 +0x4c 0xcb 0x00 0x20 + +# FIXME: decode as bnulr- 0 +# CHECK: bclr 6, 3, 0 +0x4c 0xc3 0x00 0x20 + +# FIXME: decode as bnuctr- 2 +# CHECK: bcctr 6, 11, 0 +0x4c 0xcb 0x04 0x20 + +# FIXME: decode as bnuctr- 0 +# CHECK: bcctr 6, 3, 0 +0x4c 0xc3 0x04 0x20 + +# FIXME: decode as bnulrl- 2 +# CHECK: bclrl 6, 11, 0 +0x4c 0xcb 0x00 0x21 + +# FIXME: decode as bnulrl- 0 +# CHECK: bclrl 6, 3, 0 +0x4c 0xc3 0x00 0x21 + +# FIXME: decode as bnuctrl- 2 +# CHECK: bcctrl 6, 11, 0 +0x4c 0xcb 0x04 0x21 + +# FIXME: decode as bnuctrl- 0 +# CHECK: bcctrl 6, 3, 0 +0x4c 0xc3 0x04 0x21 + +# FIXME: test bc 12, 2, target +# FIXME: test bca 12, 2, target +# FIXME: test bcl 12, 2, target +# FIXME: test bcla 12, 2, target +# FIXME: test bc 15, 2, target +# FIXME: test bca 15, 2, target +# FIXME: test bcl 15, 2, target +# FIXME: test bcla 15, 2, target +# FIXME: test bc 14, 2, target +# FIXME: test bca 14, 2, target +# FIXME: test bcl 14, 2, target +# FIXME: test bcla 14, 2, target +# FIXME: test bc 4, 2, target +# FIXME: test bca 4, 2, target +# FIXME: test bcl 4, 2, target +# FIXME: test bcla 4, 2, target +# FIXME: test bc 7, 2, target +# FIXME: test bca 7, 2, target +# FIXME: test bcl 7, 2, target +# FIXME: test bcla 7, 2, target +# FIXME: test bc 6, 2, target +# FIXME: test bca 6, 2, target +# FIXME: test bcl 6, 2, target +# FIXME: test bcla 6, 2, target +# FIXME: test bdnz target +# FIXME: test bdnza target +# FIXME: test bdnzl target +# FIXME: test bdnzla target +# FIXME: test bdnz+ target +# FIXME: test bdnza+ target +# FIXME: test bdnzl+ target +# FIXME: test bdnzla+ target +# FIXME: test bdnz- target +# FIXME: test bdnza- target +# FIXME: test bdnzl- target +# FIXME: test bdnzla- target +# FIXME: test bc 8, 2, target +# FIXME: test bca 8, 2, target +# FIXME: test bcl 8, 2, target +# FIXME: test bcla 8, 2, target +# FIXME: test bc 0, 2, target +# FIXME: test bca 0, 2, target +# FIXME: test bcl 0, 2, target +# FIXME: test bcla 0, 2, target +# FIXME: test bdz target +# FIXME: test bdza target +# FIXME: test bdzl target +# FIXME: test bdzla target +# FIXME: test bdz+ target +# FIXME: test bdza+ target +# FIXME: test bdzl+ target +# FIXME: test bdzla+ target +# FIXME: test bdz- target +# FIXME: test bdza- target +# FIXME: test bdzl- target +# FIXME: test bdzla- target +# FIXME: test bc 10, 2, target +# FIXME: test bca 10, 2, target +# FIXME: test bcl 10, 2, target +# FIXME: test bcla 10, 2, target +# FIXME: test bc 2, 2, target +# FIXME: test bca 2, 2, target +# FIXME: test bcl 2, 2, target +# FIXME: test bcla 2, 2, target +# FIXME: test blt 2, target +# FIXME: test blt 0, target +# FIXME: test blta 2, target +# FIXME: test blta 0, target +# FIXME: test bltl 2, target +# FIXME: test bltl 0, target +# FIXME: test bltla 2, target +# FIXME: test bltla 0, target +# FIXME: test blt+ 2, target +# FIXME: test blt+ 0, target +# FIXME: test blta+ 2, target +# FIXME: test blta+ 0, target +# FIXME: test bltl+ 2, target +# FIXME: test bltl+ 0, target +# FIXME: test bltla+ 2, target +# FIXME: test bltla+ 0, target +# FIXME: test blt- 2, target +# FIXME: test blt- 0, target +# FIXME: test blta- 2, target +# FIXME: test blta- 0, target +# FIXME: test bltl- 2, target +# FIXME: test bltl- 0, target +# FIXME: test bltla- 2, target +# FIXME: test bltla- 0, target +# FIXME: test ble 2, target +# FIXME: test ble 0, target +# FIXME: test blea 2, target +# FIXME: test blea 0, target +# FIXME: test blel 2, target +# FIXME: test blel 0, target +# FIXME: test blela 2, target +# FIXME: test blela 0, target +# FIXME: test ble+ 2, target +# FIXME: test ble+ 0, target +# FIXME: test blea+ 2, target +# FIXME: test blea+ 0, target +# FIXME: test blel+ 2, target +# FIXME: test blel+ 0, target +# FIXME: test blela+ 2, target +# FIXME: test blela+ 0, target +# FIXME: test ble- 2, target +# FIXME: test ble- 0, target +# FIXME: test blea- 2, target +# FIXME: test blea- 0, target +# FIXME: test blel- 2, target +# FIXME: test blel- 0, target +# FIXME: test blela- 2, target +# FIXME: test blela- 0, target +# FIXME: test beq 2, target +# FIXME: test beq 0, target +# FIXME: test beqa 2, target +# FIXME: test beqa 0, target +# FIXME: test beql 2, target +# FIXME: test beql 0, target +# FIXME: test beqla 2, target +# FIXME: test beqla 0, target +# FIXME: test beq+ 2, target +# FIXME: test beq+ 0, target +# FIXME: test beqa+ 2, target +# FIXME: test beqa+ 0, target +# FIXME: test beql+ 2, target +# FIXME: test beql+ 0, target +# FIXME: test beqla+ 2, target +# FIXME: test beqla+ 0, target +# FIXME: test beq- 2, target +# FIXME: test beq- 0, target +# FIXME: test beqa- 2, target +# FIXME: test beqa- 0, target +# FIXME: test beql- 2, target +# FIXME: test beql- 0, target +# FIXME: test beqla- 2, target +# FIXME: test beqla- 0, target +# FIXME: test bge 2, target +# FIXME: test bge 0, target +# FIXME: test bgea 2, target +# FIXME: test bgea 0, target +# FIXME: test bgel 2, target +# FIXME: test bgel 0, target +# FIXME: test bgela 2, target +# FIXME: test bgela 0, target +# FIXME: test bge+ 2, target +# FIXME: test bge+ 0, target +# FIXME: test bgea+ 2, target +# FIXME: test bgea+ 0, target +# FIXME: test bgel+ 2, target +# FIXME: test bgel+ 0, target +# FIXME: test bgela+ 2, target +# FIXME: test bgela+ 0, target +# FIXME: test bge- 2, target +# FIXME: test bge- 0, target +# FIXME: test bgea- 2, target +# FIXME: test bgea- 0, target +# FIXME: test bgel- 2, target +# FIXME: test bgel- 0, target +# FIXME: test bgela- 2, target +# FIXME: test bgela- 0, target +# FIXME: test bgt 2, target +# FIXME: test bgt 0, target +# FIXME: test bgta 2, target +# FIXME: test bgta 0, target +# FIXME: test bgtl 2, target +# FIXME: test bgtl 0, target +# FIXME: test bgtla 2, target +# FIXME: test bgtla 0, target +# FIXME: test bgt+ 2, target +# FIXME: test bgt+ 0, target +# FIXME: test bgta+ 2, target +# FIXME: test bgta+ 0, target +# FIXME: test bgtl+ 2, target +# FIXME: test bgtl+ 0, target +# FIXME: test bgtla+ 2, target +# FIXME: test bgtla+ 0, target +# FIXME: test bgt- 2, target +# FIXME: test bgt- 0, target +# FIXME: test bgta- 2, target +# FIXME: test bgta- 0, target +# FIXME: test bgtl- 2, target +# FIXME: test bgtl- 0, target +# FIXME: test bgtla- 2, target +# FIXME: test bgtla- 0, target +# FIXME: test bge 2, target +# FIXME: test bge 0, target +# FIXME: test bgea 2, target +# FIXME: test bgea 0, target +# FIXME: test bgel 2, target +# FIXME: test bgel 0, target +# FIXME: test bgela 2, target +# FIXME: test bgela 0, target +# FIXME: test bge+ 2, target +# FIXME: test bge+ 0, target +# FIXME: test bgea+ 2, target +# FIXME: test bgea+ 0, target +# FIXME: test bgel+ 2, target +# FIXME: test bgel+ 0, target +# FIXME: test bgela+ 2, target +# FIXME: test bgela+ 0, target +# FIXME: test bge- 2, target +# FIXME: test bge- 0, target +# FIXME: test bgea- 2, target +# FIXME: test bgea- 0, target +# FIXME: test bgel- 2, target +# FIXME: test bgel- 0, target +# FIXME: test bgela- 2, target +# FIXME: test bgela- 0, target +# FIXME: test bne 2, target +# FIXME: test bne 0, target +# FIXME: test bnea 2, target +# FIXME: test bnea 0, target +# FIXME: test bnel 2, target +# FIXME: test bnel 0, target +# FIXME: test bnela 2, target +# FIXME: test bnela 0, target +# FIXME: test bne+ 2, target +# FIXME: test bne+ 0, target +# FIXME: test bnea+ 2, target +# FIXME: test bnea+ 0, target +# FIXME: test bnel+ 2, target +# FIXME: test bnel+ 0, target +# FIXME: test bnela+ 2, target +# FIXME: test bnela+ 0, target +# FIXME: test bne- 2, target +# FIXME: test bne- 0, target +# FIXME: test bnea- 2, target +# FIXME: test bnea- 0, target +# FIXME: test bnel- 2, target +# FIXME: test bnel- 0, target +# FIXME: test bnela- 2, target +# FIXME: test bnela- 0, target +# FIXME: test ble 2, target +# FIXME: test ble 0, target +# FIXME: test blea 2, target +# FIXME: test blea 0, target +# FIXME: test blel 2, target +# FIXME: test blel 0, target +# FIXME: test blela 2, target +# FIXME: test blela 0, target +# FIXME: test ble+ 2, target +# FIXME: test ble+ 0, target +# FIXME: test blea+ 2, target +# FIXME: test blea+ 0, target +# FIXME: test blel+ 2, target +# FIXME: test blel+ 0, target +# FIXME: test blela+ 2, target +# FIXME: test blela+ 0, target +# FIXME: test ble- 2, target +# FIXME: test ble- 0, target +# FIXME: test blea- 2, target +# FIXME: test blea- 0, target +# FIXME: test blel- 2, target +# FIXME: test blel- 0, target +# FIXME: test blela- 2, target +# FIXME: test blela- 0, target +# FIXME: test bun 2, target +# FIXME: test bun 0, target +# FIXME: test buna 2, target +# FIXME: test buna 0, target +# FIXME: test bunl 2, target +# FIXME: test bunl 0, target +# FIXME: test bunla 2, target +# FIXME: test bunla 0, target +# FIXME: test bun+ 2, target +# FIXME: test bun+ 0, target +# FIXME: test buna+ 2, target +# FIXME: test buna+ 0, target +# FIXME: test bunl+ 2, target +# FIXME: test bunl+ 0, target +# FIXME: test bunla+ 2, target +# FIXME: test bunla+ 0, target +# FIXME: test bun- 2, target +# FIXME: test bun- 0, target +# FIXME: test buna- 2, target +# FIXME: test buna- 0, target +# FIXME: test bunl- 2, target +# FIXME: test bunl- 0, target +# FIXME: test bunla- 2, target +# FIXME: test bunla- 0, target +# FIXME: test bnu 2, target +# FIXME: test bnu 0, target +# FIXME: test bnua 2, target +# FIXME: test bnua 0, target +# FIXME: test bnul 2, target +# FIXME: test bnul 0, target +# FIXME: test bnula 2, target +# FIXME: test bnula 0, target +# FIXME: test bnu+ 2, target +# FIXME: test bnu+ 0, target +# FIXME: test bnua+ 2, target +# FIXME: test bnua+ 0, target +# FIXME: test bnul+ 2, target +# FIXME: test bnul+ 0, target +# FIXME: test bnula+ 2, target +# FIXME: test bnula+ 0, target +# FIXME: test bnu- 2, target +# FIXME: test bnu- 0, target +# FIXME: test bnua- 2, target +# FIXME: test bnua- 0, target +# FIXME: test bnul- 2, target +# FIXME: test bnul- 0, target +# FIXME: test bnula- 2, target +# FIXME: test bnula- 0, target +# FIXME: test bun 2, target +# FIXME: test bun 0, target +# FIXME: test buna 2, target +# FIXME: test buna 0, target +# FIXME: test bunl 2, target +# FIXME: test bunl 0, target +# FIXME: test bunla 2, target +# FIXME: test bunla 0, target +# FIXME: test bun+ 2, target +# FIXME: test bun+ 0, target +# FIXME: test buna+ 2, target +# FIXME: test buna+ 0, target +# FIXME: test bunl+ 2, target +# FIXME: test bunl+ 0, target +# FIXME: test bunla+ 2, target +# FIXME: test bunla+ 0, target +# FIXME: test bun- 2, target +# FIXME: test bun- 0, target +# FIXME: test buna- 2, target +# FIXME: test buna- 0, target +# FIXME: test bunl- 2, target +# FIXME: test bunl- 0, target +# FIXME: test bunla- 2, target +# FIXME: test bunla- 0, target +# FIXME: test bnu 2, target +# FIXME: test bnu 0, target +# FIXME: test bnua 2, target +# FIXME: test bnua 0, target +# FIXME: test bnul 2, target +# FIXME: test bnul 0, target +# FIXME: test bnula 2, target +# FIXME: test bnula 0, target +# FIXME: test bnu+ 2, target +# FIXME: test bnu+ 0, target +# FIXME: test bnua+ 2, target +# FIXME: test bnua+ 0, target +# FIXME: test bnul+ 2, target +# FIXME: test bnul+ 0, target +# FIXME: test bnula+ 2, target +# FIXME: test bnula+ 0, target +# FIXME: test bnu- 2, target +# FIXME: test bnu- 0, target +# FIXME: test bnua- 2, target +# FIXME: test bnua- 0, target +# FIXME: test bnul- 2, target +# FIXME: test bnul- 0, target +# FIXME: test bnula- 2, target +# FIXME: test bnula- 0, target + +# CHECK: creqv 2, 2, 2 +0x4c 0x42 0x12 0x42 + +# CHECK: crxor 2, 2, 2 +0x4c 0x42 0x11 0x82 + +# CHECK: cror 2, 3, 3 +0x4c 0x43 0x1b 0x82 + +# CHECK: crnor 2, 3, 3 +0x4c 0x43 0x18 0x42 + +# CHECK: addi 2, 3, -128 +0x38 0x43 0xff 0x80 + +# CHECK: addis 2, 3, -128 +0x3c 0x43 0xff 0x80 + +# CHECK: addic 2, 3, -128 +0x30 0x43 0xff 0x80 + +# CHECK: addic. 2, 3, -128 +0x34 0x43 0xff 0x80 + +# CHECK: subf 2, 4, 3 +0x7c 0x44 0x18 0x50 + +# CHECK: subf. 2, 4, 3 +0x7c 0x44 0x18 0x51 + +# CHECK: subfc 2, 4, 3 +0x7c 0x44 0x18 0x10 + +# CHECK: subfc. 2, 4, 3 +0x7c 0x44 0x18 0x11 + +# CHECK: cmpdi 2, 3, 128 +0x2d 0x23 0x00 0x80 + +# CHECK: cmpdi 0, 3, 128 +0x2c 0x23 0x00 0x80 + +# CHECK: cmpd 2, 3, 4 +0x7d 0x23 0x20 0x00 + +# CHECK: cmpd 0, 3, 4 +0x7c 0x23 0x20 0x00 + +# CHECK: cmpldi 2, 3, 128 +0x29 0x23 0x00 0x80 + +# CHECK: cmpldi 0, 3, 128 +0x28 0x23 0x00 0x80 + +# CHECK: cmpld 2, 3, 4 +0x7d 0x23 0x20 0x40 + +# CHECK: cmpld 0, 3, 4 +0x7c 0x23 0x20 0x40 + +# CHECK: cmpwi 2, 3, 128 +0x2d 0x03 0x00 0x80 + +# CHECK: cmpwi 0, 3, 128 +0x2c 0x03 0x00 0x80 + +# CHECK: cmpw 2, 3, 4 +0x7d 0x03 0x20 0x00 + +# CHECK: cmpw 0, 3, 4 +0x7c 0x03 0x20 0x00 + +# CHECK: cmplwi 2, 3, 128 +0x29 0x03 0x00 0x80 + +# CHECK: cmplwi 0, 3, 128 +0x28 0x03 0x00 0x80 + +# CHECK: cmplw 2, 3, 4 +0x7d 0x03 0x20 0x40 + +# CHECK: cmplw 0, 3, 4 +0x7c 0x03 0x20 0x40 + +# CHECK: twi 16, 3, 4 +0x0e 0x03 0x00 0x04 + +# CHECK: tw 16, 3, 4 +0x7e 0x03 0x20 0x08 + +# CHECK: tdi 16, 3, 4 +0x0a 0x03 0x00 0x04 + +# CHECK: td 16, 3, 4 +0x7e 0x03 0x20 0x88 + +# CHECK: twi 20, 3, 4 +0x0e 0x83 0x00 0x04 + +# CHECK: tw 20, 3, 4 +0x7e 0x83 0x20 0x08 + +# CHECK: tdi 20, 3, 4 +0x0a 0x83 0x00 0x04 + +# CHECK: td 20, 3, 4 +0x7e 0x83 0x20 0x88 + +# CHECK: twi 4, 3, 4 +0x0c 0x83 0x00 0x04 + +# CHECK: tw 4, 3, 4 +0x7c 0x83 0x20 0x08 + +# CHECK: tdi 4, 3, 4 +0x08 0x83 0x00 0x04 + +# CHECK: td 4, 3, 4 +0x7c 0x83 0x20 0x88 + +# CHECK: twi 12, 3, 4 +0x0d 0x83 0x00 0x04 + +# CHECK: tw 12, 3, 4 +0x7d 0x83 0x20 0x08 + +# CHECK: tdi 12, 3, 4 +0x09 0x83 0x00 0x04 + +# CHECK: td 12, 3, 4 +0x7d 0x83 0x20 0x88 + +# CHECK: twi 8, 3, 4 +0x0d 0x03 0x00 0x04 + +# CHECK: tw 8, 3, 4 +0x7d 0x03 0x20 0x08 + +# CHECK: tdi 8, 3, 4 +0x09 0x03 0x00 0x04 + +# CHECK: td 8, 3, 4 +0x7d 0x03 0x20 0x88 + +# CHECK: twi 12, 3, 4 +0x0d 0x83 0x00 0x04 + +# CHECK: tw 12, 3, 4 +0x7d 0x83 0x20 0x08 + +# CHECK: tdi 12, 3, 4 +0x09 0x83 0x00 0x04 + +# CHECK: td 12, 3, 4 +0x7d 0x83 0x20 0x88 + +# CHECK: twi 24, 3, 4 +0x0f 0x03 0x00 0x04 + +# CHECK: tw 24, 3, 4 +0x7f 0x03 0x20 0x08 + +# CHECK: tdi 24, 3, 4 +0x0b 0x03 0x00 0x04 + +# CHECK: td 24, 3, 4 +0x7f 0x03 0x20 0x88 + +# CHECK: twi 20, 3, 4 +0x0e 0x83 0x00 0x04 + +# CHECK: tw 20, 3, 4 +0x7e 0x83 0x20 0x08 + +# CHECK: tdi 20, 3, 4 +0x0a 0x83 0x00 0x04 + +# CHECK: td 20, 3, 4 +0x7e 0x83 0x20 0x88 + +# CHECK: twi 2, 3, 4 +0x0c 0x43 0x00 0x04 + +# CHECK: tw 2, 3, 4 +0x7c 0x43 0x20 0x08 + +# CHECK: tdi 2, 3, 4 +0x08 0x43 0x00 0x04 + +# CHECK: td 2, 3, 4 +0x7c 0x43 0x20 0x88 + +# CHECK: twi 6, 3, 4 +0x0c 0xc3 0x00 0x04 + +# CHECK: tw 6, 3, 4 +0x7c 0xc3 0x20 0x08 + +# CHECK: tdi 6, 3, 4 +0x08 0xc3 0x00 0x04 + +# CHECK: td 6, 3, 4 +0x7c 0xc3 0x20 0x88 + +# CHECK: twi 5, 3, 4 +0x0c 0xa3 0x00 0x04 + +# CHECK: tw 5, 3, 4 +0x7c 0xa3 0x20 0x08 + +# CHECK: tdi 5, 3, 4 +0x08 0xa3 0x00 0x04 + +# CHECK: td 5, 3, 4 +0x7c 0xa3 0x20 0x88 + +# CHECK: twi 1, 3, 4 +0x0c 0x23 0x00 0x04 + +# CHECK: tw 1, 3, 4 +0x7c 0x23 0x20 0x08 + +# CHECK: tdi 1, 3, 4 +0x08 0x23 0x00 0x04 + +# CHECK: td 1, 3, 4 +0x7c 0x23 0x20 0x88 + +# CHECK: twi 5, 3, 4 +0x0c 0xa3 0x00 0x04 + +# CHECK: tw 5, 3, 4 +0x7c 0xa3 0x20 0x08 + +# CHECK: tdi 5, 3, 4 +0x08 0xa3 0x00 0x04 + +# CHECK: td 5, 3, 4 +0x7c 0xa3 0x20 0x88 + +# CHECK: twi 6, 3, 4 +0x0c 0xc3 0x00 0x04 + +# CHECK: tw 6, 3, 4 +0x7c 0xc3 0x20 0x08 + +# CHECK: tdi 6, 3, 4 +0x08 0xc3 0x00 0x04 + +# CHECK: td 6, 3, 4 +0x7c 0xc3 0x20 0x88 + +# CHECK: twi 31, 3, 4 +0x0f 0xe3 0x00 0x04 + +# CHECK: tw 31, 3, 4 +0x7f 0xe3 0x20 0x08 + +# CHECK: tdi 31, 3, 4 +0x0b 0xe3 0x00 0x04 + +# CHECK: td 31, 3, 4 +0x7f 0xe3 0x20 0x88 + +# CHECK: trap +0x7f 0xe0 0x00 0x08 + +# CHECK: rldicr 2, 3, 5, 3 +0x78 0x62 0x28 0xc4 + +# CHECK: rldicr. 2, 3, 5, 3 +0x78 0x62 0x28 0xc5 + +# CHECK: rldicl 2, 3, 9, 60 +0x78 0x62 0x4f 0x20 + +# CHECK: rldicl. 2, 3, 9, 60 +0x78 0x62 0x4f 0x21 + +# CHECK: rldimi 2, 3, 55, 5 +0x78 0x62 0xb9 0x4e + +# CHECK: rldimi. 2, 3, 55, 5 +0x78 0x62 0xb9 0x4f + +# CHECK: rldicl 2, 3, 4, 0 +0x78 0x62 0x20 0x00 + +# CHECK: rldicl. 2, 3, 4, 0 +0x78 0x62 0x20 0x01 + +# CHECK: rldicl 2, 3, 60, 0 +0x78 0x62 0xe0 0x02 + +# CHECK: rldicl. 2, 3, 60, 0 +0x78 0x62 0xe0 0x03 + +# CHECK: rldcl 2, 3, 4, 0 +0x78 0x62 0x20 0x10 + +# CHECK: rldcl. 2, 3, 4, 0 +0x78 0x62 0x20 0x11 + +# CHECK: sldi 2, 3, 4 +0x78 0x62 0x26 0xe4 + +# CHECK: rldicr. 2, 3, 4, 59 +0x78 0x62 0x26 0xe5 + +# CHECK: rldicl 2, 3, 60, 4 +0x78 0x62 0xe1 0x02 + +# CHECK: rldicl. 2, 3, 60, 4 +0x78 0x62 0xe1 0x03 + +# CHECK: rldicl 2, 3, 0, 4 +0x78 0x62 0x01 0x00 + +# CHECK: rldicl. 2, 3, 0, 4 +0x78 0x62 0x01 0x01 + +# CHECK: rldicr 2, 3, 0, 59 +0x78 0x62 0x06 0xe4 + +# CHECK: rldicr. 2, 3, 0, 59 +0x78 0x62 0x06 0xe5 + +# CHECK: rldic 2, 3, 4, 1 +0x78 0x62 0x20 0x48 + +# CHECK: rldic. 2, 3, 4, 1 +0x78 0x62 0x20 0x49 + +# CHECK: rlwinm 2, 3, 5, 0, 3 +0x54 0x62 0x28 0x06 + +# CHECK: rlwinm. 2, 3, 5, 0, 3 +0x54 0x62 0x28 0x07 + +# CHECK: rlwinm 2, 3, 9, 28, 31 +0x54 0x62 0x4f 0x3e + +# CHECK: rlwinm. 2, 3, 9, 28, 31 +0x54 0x62 0x4f 0x3f + +# CHECK: rlwimi 2, 3, 27, 5, 8 +0x50 0x62 0xd9 0x50 + +# CHECK: rlwimi. 2, 3, 27, 5, 8 +0x50 0x62 0xd9 0x51 + +# CHECK: rlwimi 2, 3, 23, 5, 8 +0x50 0x62 0xb9 0x50 + +# CHECK: rlwimi. 2, 3, 23, 5, 8 +0x50 0x62 0xb9 0x51 + +# CHECK: rlwinm 2, 3, 4, 0, 31 +0x54 0x62 0x20 0x3e + +# CHECK: rlwinm. 2, 3, 4, 0, 31 +0x54 0x62 0x20 0x3f + +# CHECK: rlwinm 2, 3, 28, 0, 31 +0x54 0x62 0xe0 0x3e + +# CHECK: rlwinm. 2, 3, 28, 0, 31 +0x54 0x62 0xe0 0x3f + +# CHECK: rlwnm 2, 3, 4, 0, 31 +0x5c 0x62 0x20 0x3e + +# CHECK: rlwnm. 2, 3, 4, 0, 31 +0x5c 0x62 0x20 0x3f + +# CHECK: slwi 2, 3, 4 +0x54 0x62 0x20 0x36 + +# CHECK: rlwinm. 2, 3, 4, 0, 27 +0x54 0x62 0x20 0x37 + +# CHECK: srwi 2, 3, 4 +0x54 0x62 0xe1 0x3e + +# CHECK: rlwinm. 2, 3, 28, 4, 31 +0x54 0x62 0xe1 0x3f + +# CHECK: rlwinm 2, 3, 0, 4, 31 +0x54 0x62 0x01 0x3e + +# CHECK: rlwinm. 2, 3, 0, 4, 31 +0x54 0x62 0x01 0x3f + +# CHECK: rlwinm 2, 3, 0, 0, 27 +0x54 0x62 0x00 0x36 + +# CHECK: rlwinm. 2, 3, 0, 0, 27 +0x54 0x62 0x00 0x37 + +# CHECK: rlwinm 2, 3, 4, 1, 27 +0x54 0x62 0x20 0x76 + +# CHECK: rlwinm. 2, 3, 4, 1, 27 +0x54 0x62 0x20 0x77 + +# CHECK: mtspr 1, 2 +0x7c 0x41 0x03 0xa6 + +# CHECK: mfspr 2, 1 +0x7c 0x41 0x02 0xa6 + +# CHECK: mtlr 2 +0x7c 0x48 0x03 0xa6 + +# CHECK: mflr 2 +0x7c 0x48 0x02 0xa6 + +# CHECK: mtctr 2 +0x7c 0x49 0x03 0xa6 + +# CHECK: mfctr 2 +0x7c 0x49 0x02 0xa6 + +# CHECK: nop +0x60 0x00 0x00 0x00 + +# CHECK: xori 0, 0, 0 +0x68 0x00 0x00 0x00 + +# CHECK: li 2, 128 +0x38 0x40 0x00 0x80 + +# CHECK: lis 2, 128 +0x3c 0x40 0x00 0x80 + +# CHECK: mr 2, 3 +0x7c 0x62 0x1b 0x78 + +# CHECK: or. 2, 3, 3 +0x7c 0x62 0x1b 0x79 + +# CHECK: nor 2, 3, 3 +0x7c 0x62 0x18 0xf8 + +# CHECK: nor. 2, 3, 3 +0x7c 0x62 0x18 0xf9 + +# CHECK: mtcrf 255, 2 +0x7c 0x4f 0xf1 0x20 + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-fp.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-fp.txt new file mode 100644 index 0000000..1c01c9d --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-fp.txt @@ -0,0 +1,329 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: lfs 2, 128(4) +0xc0 0x44 0x00 0x80 + +# CHECK: lfsx 2, 3, 4 +0x7c 0x43 0x24 0x2e + +# CHECK: lfsu 2, 128(4) +0xc4 0x44 0x00 0x80 + +# CHECK: lfsux 2, 3, 4 +0x7c 0x43 0x24 0x6e + +# CHECK: lfd 2, 128(4) +0xc8 0x44 0x00 0x80 + +# CHECK: lfdx 2, 3, 4 +0x7c 0x43 0x24 0xae + +# CHECK: lfdu 2, 128(4) +0xcc 0x44 0x00 0x80 + +# CHECK: lfdux 2, 3, 4 +0x7c 0x43 0x24 0xee + +# CHECK: lfiwax 2, 3, 4 +0x7c 0x43 0x26 0xae + +# CHECK: lfiwzx 2, 3, 4 +0x7c 0x43 0x26 0xee + +# CHECK: stfs 2, 128(4) +0xd0 0x44 0x00 0x80 + +# CHECK: stfsx 2, 3, 4 +0x7c 0x43 0x25 0x2e + +# CHECK: stfsu 2, 128(4) +0xd4 0x44 0x00 0x80 + +# CHECK: stfsux 2, 3, 4 +0x7c 0x43 0x25 0x6e + +# CHECK: stfd 2, 128(4) +0xd8 0x44 0x00 0x80 + +# CHECK: stfdx 2, 3, 4 +0x7c 0x43 0x25 0xae + +# CHECK: stfdu 2, 128(4) +0xdc 0x44 0x00 0x80 + +# CHECK: stfdux 2, 3, 4 +0x7c 0x43 0x25 0xee + +# CHECK: stfiwx 2, 3, 4 +0x7c 0x43 0x27 0xae + +# CHECK: fmr 2, 3 +0xfc 0x40 0x18 0x90 + +# CHECK: fmr. 2, 3 +0xfc 0x40 0x18 0x91 + +# CHECK: fneg 2, 3 +0xfc 0x40 0x18 0x50 + +# CHECK: fneg. 2, 3 +0xfc 0x40 0x18 0x51 + +# CHECK: fabs 2, 3 +0xfc 0x40 0x1a 0x10 + +# CHECK: fabs. 2, 3 +0xfc 0x40 0x1a 0x11 + +# CHECK: fnabs 2, 3 +0xfc 0x40 0x19 0x10 + +# CHECK: fnabs. 2, 3 +0xfc 0x40 0x19 0x11 + +# CHECK: fcpsgn 2, 3, 4 +0xfc 0x43 0x20 0x10 + +# CHECK: fcpsgn. 2, 3, 4 +0xfc 0x43 0x20 0x11 + +# CHECK: fadd 2, 3, 4 +0xfc 0x43 0x20 0x2a + +# CHECK: fadd. 2, 3, 4 +0xfc 0x43 0x20 0x2b + +# CHECK: fadds 2, 3, 4 +0xec 0x43 0x20 0x2a + +# CHECK: fadds. 2, 3, 4 +0xec 0x43 0x20 0x2b + +# CHECK: fsub 2, 3, 4 +0xfc 0x43 0x20 0x28 + +# CHECK: fsub. 2, 3, 4 +0xfc 0x43 0x20 0x29 + +# CHECK: fsubs 2, 3, 4 +0xec 0x43 0x20 0x28 + +# CHECK: fsubs. 2, 3, 4 +0xec 0x43 0x20 0x29 + +# CHECK: fmul 2, 3, 4 +0xfc 0x43 0x01 0x32 + +# CHECK: fmul. 2, 3, 4 +0xfc 0x43 0x01 0x33 + +# CHECK: fmuls 2, 3, 4 +0xec 0x43 0x01 0x32 + +# CHECK: fmuls. 2, 3, 4 +0xec 0x43 0x01 0x33 + +# CHECK: fdiv 2, 3, 4 +0xfc 0x43 0x20 0x24 + +# CHECK: fdiv. 2, 3, 4 +0xfc 0x43 0x20 0x25 + +# CHECK: fdivs 2, 3, 4 +0xec 0x43 0x20 0x24 + +# CHECK: fdivs. 2, 3, 4 +0xec 0x43 0x20 0x25 + +# CHECK: fsqrt 2, 3 +0xfc 0x40 0x18 0x2c + +# CHECK: fsqrt. 2, 3 +0xfc 0x40 0x18 0x2d + +# CHECK: fsqrts 2, 3 +0xec 0x40 0x18 0x2c + +# CHECK: fsqrts. 2, 3 +0xec 0x40 0x18 0x2d + +# CHECK: fre 2, 3 +0xfc 0x40 0x18 0x30 + +# CHECK: fre. 2, 3 +0xfc 0x40 0x18 0x31 + +# CHECK: fres 2, 3 +0xec 0x40 0x18 0x30 + +# CHECK: fres. 2, 3 +0xec 0x40 0x18 0x31 + +# CHECK: frsqrte 2, 3 +0xfc 0x40 0x18 0x34 + +# CHECK: frsqrte. 2, 3 +0xfc 0x40 0x18 0x35 + +# CHECK: frsqrtes 2, 3 +0xec 0x40 0x18 0x34 + +# CHECK: frsqrtes. 2, 3 +0xec 0x40 0x18 0x35 + +# CHECK: fmadd 2, 3, 4, 5 +0xfc 0x43 0x29 0x3a + +# CHECK: fmadd. 2, 3, 4, 5 +0xfc 0x43 0x29 0x3b + +# CHECK: fmadds 2, 3, 4, 5 +0xec 0x43 0x29 0x3a + +# CHECK: fmadds. 2, 3, 4, 5 +0xec 0x43 0x29 0x3b + +# CHECK: fmsub 2, 3, 4, 5 +0xfc 0x43 0x29 0x38 + +# CHECK: fmsub. 2, 3, 4, 5 +0xfc 0x43 0x29 0x39 + +# CHECK: fmsubs 2, 3, 4, 5 +0xec 0x43 0x29 0x38 + +# CHECK: fmsubs. 2, 3, 4, 5 +0xec 0x43 0x29 0x39 + +# CHECK: fnmadd 2, 3, 4, 5 +0xfc 0x43 0x29 0x3e + +# CHECK: fnmadd. 2, 3, 4, 5 +0xfc 0x43 0x29 0x3f + +# CHECK: fnmadds 2, 3, 4, 5 +0xec 0x43 0x29 0x3e + +# CHECK: fnmadds. 2, 3, 4, 5 +0xec 0x43 0x29 0x3f + +# CHECK: fnmsub 2, 3, 4, 5 +0xfc 0x43 0x29 0x3c + +# CHECK: fnmsub. 2, 3, 4, 5 +0xfc 0x43 0x29 0x3d + +# CHECK: fnmsubs 2, 3, 4, 5 +0xec 0x43 0x29 0x3c + +# CHECK: fnmsubs. 2, 3, 4, 5 +0xec 0x43 0x29 0x3d + +# CHECK: frsp 2, 3 +0xfc 0x40 0x18 0x18 + +# CHECK: frsp. 2, 3 +0xfc 0x40 0x18 0x19 + +# CHECK: fctid 2, 3 +0xfc 0x40 0x1e 0x5c + +# CHECK: fctid. 2, 3 +0xfc 0x40 0x1e 0x5d + +# CHECK: fctidz 2, 3 +0xfc 0x40 0x1e 0x5e + +# CHECK: fctidz. 2, 3 +0xfc 0x40 0x1e 0x5f + +# CHECK: fctiduz 2, 3 +0xfc 0x40 0x1f 0x5e + +# CHECK: fctiduz. 2, 3 +0xfc 0x40 0x1f 0x5f + +# CHECK: fctiw 2, 3 +0xfc 0x40 0x18 0x1c + +# CHECK: fctiw. 2, 3 +0xfc 0x40 0x18 0x1d + +# CHECK: fctiwz 2, 3 +0xfc 0x40 0x18 0x1e + +# CHECK: fctiwz. 2, 3 +0xfc 0x40 0x18 0x1f + +# CHECK: fctiwuz 2, 3 +0xfc 0x40 0x19 0x1e + +# CHECK: fctiwuz. 2, 3 +0xfc 0x40 0x19 0x1f + +# CHECK: fcfid 2, 3 +0xfc 0x40 0x1e 0x9c + +# CHECK: fcfid. 2, 3 +0xfc 0x40 0x1e 0x9d + +# CHECK: fcfidu 2, 3 +0xfc 0x40 0x1f 0x9c + +# CHECK: fcfidu. 2, 3 +0xfc 0x40 0x1f 0x9d + +# CHECK: fcfids 2, 3 +0xec 0x40 0x1e 0x9c + +# CHECK: fcfids. 2, 3 +0xec 0x40 0x1e 0x9d + +# CHECK: fcfidus 2, 3 +0xec 0x40 0x1f 0x9c + +# CHECK: fcfidus. 2, 3 +0xec 0x40 0x1f 0x9d + +# CHECK: frin 2, 3 +0xfc 0x40 0x1b 0x10 + +# CHECK: frin. 2, 3 +0xfc 0x40 0x1b 0x11 + +# CHECK: frip 2, 3 +0xfc 0x40 0x1b 0x90 + +# CHECK: frip. 2, 3 +0xfc 0x40 0x1b 0x91 + +# CHECK: friz 2, 3 +0xfc 0x40 0x1b 0x50 + +# CHECK: friz. 2, 3 +0xfc 0x40 0x1b 0x51 + +# CHECK: frim 2, 3 +0xfc 0x40 0x1b 0xd0 + +# CHECK: frim. 2, 3 +0xfc 0x40 0x1b 0xd1 + +# CHECK: fcmpu 2, 3, 4 +0xfd 0x03 0x20 0x00 + +# CHECK: fsel 2, 3, 4, 5 +0xfc 0x43 0x29 0x2e + +# CHECK: fsel. 2, 3, 4, 5 +0xfc 0x43 0x29 0x2f + +# CHECK: mffs 2 +0xfc 0x40 0x04 0x8e + +# CHECK: mtfsb0 31 +0xff 0xe0 0x00 0x8c + +# CHECK: mtfsb1 31 +0xff 0xe0 0x00 0x4c + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt new file mode 100644 index 0000000..3896bf7 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt @@ -0,0 +1,509 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: lvebx 2, 3, 4 +0x7c 0x43 0x20 0x0e + +# CHECK: lvehx 2, 3, 4 +0x7c 0x43 0x20 0x4e + +# CHECK: lvewx 2, 3, 4 +0x7c 0x43 0x20 0x8e + +# CHECK: lvx 2, 3, 4 +0x7c 0x43 0x20 0xce + +# CHECK: lvxl 2, 3, 4 +0x7c 0x43 0x22 0xce + +# CHECK: stvebx 2, 3, 4 +0x7c 0x43 0x21 0x0e + +# CHECK: stvehx 2, 3, 4 +0x7c 0x43 0x21 0x4e + +# CHECK: stvewx 2, 3, 4 +0x7c 0x43 0x21 0x8e + +# CHECK: stvx 2, 3, 4 +0x7c 0x43 0x21 0xce + +# CHECK: stvxl 2, 3, 4 +0x7c 0x43 0x23 0xce + +# CHECK: lvsl 2, 3, 4 +0x7c 0x43 0x20 0x0c + +# CHECK: lvsr 2, 3, 4 +0x7c 0x43 0x20 0x4c + +# CHECK: vpkpx 2, 3, 4 +0x10 0x43 0x23 0x0e + +# CHECK: vpkshss 2, 3, 4 +0x10 0x43 0x21 0x8e + +# CHECK: vpkshus 2, 3, 4 +0x10 0x43 0x21 0x0e + +# CHECK: vpkswss 2, 3, 4 +0x10 0x43 0x21 0xce + +# CHECK: vpkswus 2, 3, 4 +0x10 0x43 0x21 0x4e + +# CHECK: vpkuhum 2, 3, 4 +0x10 0x43 0x20 0x0e + +# CHECK: vpkuhus 2, 3, 4 +0x10 0x43 0x20 0x8e + +# CHECK: vpkuwum 2, 3, 4 +0x10 0x43 0x20 0x4e + +# CHECK: vpkuwus 2, 3, 4 +0x10 0x43 0x20 0xce + +# CHECK: vupkhpx 2, 3 +0x10 0x40 0x1b 0x4e + +# CHECK: vupkhsb 2, 3 +0x10 0x40 0x1a 0x0e + +# CHECK: vupkhsh 2, 3 +0x10 0x40 0x1a 0x4e + +# CHECK: vupklpx 2, 3 +0x10 0x40 0x1b 0xce + +# CHECK: vupklsb 2, 3 +0x10 0x40 0x1a 0x8e + +# CHECK: vupklsh 2, 3 +0x10 0x40 0x1a 0xce + +# CHECK: vmrghb 2, 3, 4 +0x10 0x43 0x20 0x0c + +# CHECK: vmrghh 2, 3, 4 +0x10 0x43 0x20 0x4c + +# CHECK: vmrghw 2, 3, 4 +0x10 0x43 0x20 0x8c + +# CHECK: vmrglb 2, 3, 4 +0x10 0x43 0x21 0x0c + +# CHECK: vmrglh 2, 3, 4 +0x10 0x43 0x21 0x4c + +# CHECK: vmrglw 2, 3, 4 +0x10 0x43 0x21 0x8c + +# CHECK: vspltb 2, 3, 1 +0x10 0x41 0x1a 0x0c + +# CHECK: vsplth 2, 3, 1 +0x10 0x41 0x1a 0x4c + +# CHECK: vspltw 2, 3, 1 +0x10 0x41 0x1a 0x8c + +# CHECK: vspltisb 2, 3 +0x10 0x43 0x03 0x0c + +# CHECK: vspltish 2, 3 +0x10 0x43 0x03 0x4c + +# CHECK: vspltisw 2, 3 +0x10 0x43 0x03 0x8c + +# CHECK: vperm 2, 3, 4, 5 +0x10 0x43 0x21 0x6b + +# CHECK: vsel 2, 3, 4, 5 +0x10 0x43 0x21 0x6a + +# CHECK: vsl 2, 3, 4 +0x10 0x43 0x21 0xc4 + +# CHECK: vsldoi 2, 3, 4, 5 +0x10 0x43 0x21 0x6c + +# CHECK: vslo 2, 3, 4 +0x10 0x43 0x24 0x0c + +# CHECK: vsr 2, 3, 4 +0x10 0x43 0x22 0xc4 + +# CHECK: vsro 2, 3, 4 +0x10 0x43 0x24 0x4c + +# CHECK: vaddcuw 2, 3, 4 +0x10 0x43 0x21 0x80 + +# CHECK: vaddsbs 2, 3, 4 +0x10 0x43 0x23 0x00 + +# CHECK: vaddshs 2, 3, 4 +0x10 0x43 0x23 0x40 + +# CHECK: vaddsws 2, 3, 4 +0x10 0x43 0x23 0x80 + +# CHECK: vaddubm 2, 3, 4 +0x10 0x43 0x20 0x00 + +# CHECK: vadduhm 2, 3, 4 +0x10 0x43 0x20 0x40 + +# CHECK: vadduwm 2, 3, 4 +0x10 0x43 0x20 0x80 + +# CHECK: vaddubs 2, 3, 4 +0x10 0x43 0x22 0x00 + +# CHECK: vadduhs 2, 3, 4 +0x10 0x43 0x22 0x40 + +# CHECK: vadduws 2, 3, 4 +0x10 0x43 0x22 0x80 + +# CHECK: vsubcuw 2, 3, 4 +0x10 0x43 0x25 0x80 + +# CHECK: vsubsbs 2, 3, 4 +0x10 0x43 0x27 0x00 + +# CHECK: vsubshs 2, 3, 4 +0x10 0x43 0x27 0x40 + +# CHECK: vsubsws 2, 3, 4 +0x10 0x43 0x27 0x80 + +# CHECK: vsububm 2, 3, 4 +0x10 0x43 0x24 0x00 + +# CHECK: vsubuhm 2, 3, 4 +0x10 0x43 0x24 0x40 + +# CHECK: vsubuwm 2, 3, 4 +0x10 0x43 0x24 0x80 + +# CHECK: vsububs 2, 3, 4 +0x10 0x43 0x26 0x00 + +# CHECK: vsubuhs 2, 3, 4 +0x10 0x43 0x26 0x40 + +# CHECK: vsubuws 2, 3, 4 +0x10 0x43 0x26 0x80 + +# CHECK: vmulesb 2, 3, 4 +0x10 0x43 0x23 0x08 + +# CHECK: vmulesh 2, 3, 4 +0x10 0x43 0x23 0x48 + +# CHECK: vmuleub 2, 3, 4 +0x10 0x43 0x22 0x08 + +# CHECK: vmuleuh 2, 3, 4 +0x10 0x43 0x22 0x48 + +# CHECK: vmulosb 2, 3, 4 +0x10 0x43 0x21 0x08 + +# CHECK: vmulosh 2, 3, 4 +0x10 0x43 0x21 0x48 + +# CHECK: vmuloub 2, 3, 4 +0x10 0x43 0x20 0x08 + +# CHECK: vmulouh 2, 3, 4 +0x10 0x43 0x20 0x48 + +# CHECK: vmhaddshs 2, 3, 4, 5 +0x10 0x43 0x21 0x60 + +# CHECK: vmhraddshs 2, 3, 4, 5 +0x10 0x43 0x21 0x61 + +# CHECK: vmladduhm 2, 3, 4, 5 +0x10 0x43 0x21 0x62 + +# CHECK: vmsumubm 2, 3, 4, 5 +0x10 0x43 0x21 0x64 + +# CHECK: vmsummbm 2, 3, 4, 5 +0x10 0x43 0x21 0x65 + +# CHECK: vmsumshm 2, 3, 4, 5 +0x10 0x43 0x21 0x68 + +# CHECK: vmsumshs 2, 3, 4, 5 +0x10 0x43 0x21 0x69 + +# CHECK: vmsumuhm 2, 3, 4, 5 +0x10 0x43 0x21 0x66 + +# CHECK: vmsumuhs 2, 3, 4, 5 +0x10 0x43 0x21 0x67 + +# CHECK: vsumsws 2, 3, 4 +0x10 0x43 0x27 0x88 + +# CHECK: vsum2sws 2, 3, 4 +0x10 0x43 0x26 0x88 + +# CHECK: vsum4sbs 2, 3, 4 +0x10 0x43 0x27 0x08 + +# CHECK: vsum4shs 2, 3, 4 +0x10 0x43 0x26 0x48 + +# CHECK: vsum4ubs 2, 3, 4 +0x10 0x43 0x26 0x08 + +# CHECK: vavgsb 2, 3, 4 +0x10 0x43 0x25 0x02 + +# CHECK: vavgsh 2, 3, 4 +0x10 0x43 0x25 0x42 + +# CHECK: vavgsw 2, 3, 4 +0x10 0x43 0x25 0x82 + +# CHECK: vavgub 2, 3, 4 +0x10 0x43 0x24 0x02 + +# CHECK: vavguh 2, 3, 4 +0x10 0x43 0x24 0x42 + +# CHECK: vavguw 2, 3, 4 +0x10 0x43 0x24 0x82 + +# CHECK: vmaxsb 2, 3, 4 +0x10 0x43 0x21 0x02 + +# CHECK: vmaxsh 2, 3, 4 +0x10 0x43 0x21 0x42 + +# CHECK: vmaxsw 2, 3, 4 +0x10 0x43 0x21 0x82 + +# CHECK: vmaxub 2, 3, 4 +0x10 0x43 0x20 0x02 + +# CHECK: vmaxuh 2, 3, 4 +0x10 0x43 0x20 0x42 + +# CHECK: vmaxuw 2, 3, 4 +0x10 0x43 0x20 0x82 + +# CHECK: vminsb 2, 3, 4 +0x10 0x43 0x23 0x02 + +# CHECK: vminsh 2, 3, 4 +0x10 0x43 0x23 0x42 + +# CHECK: vminsw 2, 3, 4 +0x10 0x43 0x23 0x82 + +# CHECK: vminub 2, 3, 4 +0x10 0x43 0x22 0x02 + +# CHECK: vminuh 2, 3, 4 +0x10 0x43 0x22 0x42 + +# CHECK: vminuw 2, 3, 4 +0x10 0x43 0x22 0x82 + +# CHECK: vcmpequb 2, 3, 4 +0x10 0x43 0x20 0x06 + +# CHECK: vcmpequb. 2, 3, 4 +0x10 0x43 0x24 0x06 + +# CHECK: vcmpequh 2, 3, 4 +0x10 0x43 0x20 0x46 + +# CHECK: vcmpequh. 2, 3, 4 +0x10 0x43 0x24 0x46 + +# CHECK: vcmpequw 2, 3, 4 +0x10 0x43 0x20 0x86 + +# CHECK: vcmpequw. 2, 3, 4 +0x10 0x43 0x24 0x86 + +# CHECK: vcmpgtsb 2, 3, 4 +0x10 0x43 0x23 0x06 + +# CHECK: vcmpgtsb. 2, 3, 4 +0x10 0x43 0x27 0x06 + +# CHECK: vcmpgtsh 2, 3, 4 +0x10 0x43 0x23 0x46 + +# CHECK: vcmpgtsh. 2, 3, 4 +0x10 0x43 0x27 0x46 + +# CHECK: vcmpgtsw 2, 3, 4 +0x10 0x43 0x23 0x86 + +# CHECK: vcmpgtsw. 2, 3, 4 +0x10 0x43 0x27 0x86 + +# CHECK: vcmpgtub 2, 3, 4 +0x10 0x43 0x22 0x06 + +# CHECK: vcmpgtub. 2, 3, 4 +0x10 0x43 0x26 0x06 + +# CHECK: vcmpgtuh 2, 3, 4 +0x10 0x43 0x22 0x46 + +# CHECK: vcmpgtuh. 2, 3, 4 +0x10 0x43 0x26 0x46 + +# CHECK: vcmpgtuw 2, 3, 4 +0x10 0x43 0x22 0x86 + +# CHECK: vcmpgtuw. 2, 3, 4 +0x10 0x43 0x26 0x86 + +# CHECK: vand 2, 3, 4 +0x10 0x43 0x24 0x04 + +# CHECK: vandc 2, 3, 4 +0x10 0x43 0x24 0x44 + +# CHECK: vnor 2, 3, 4 +0x10 0x43 0x25 0x04 + +# CHECK: vor 2, 3, 4 +0x10 0x43 0x24 0x84 + +# CHECK: vxor 2, 3, 4 +0x10 0x43 0x24 0xc4 + +# CHECK: vrlb 2, 3, 4 +0x10 0x43 0x20 0x04 + +# CHECK: vrlh 2, 3, 4 +0x10 0x43 0x20 0x44 + +# CHECK: vrlw 2, 3, 4 +0x10 0x43 0x20 0x84 + +# CHECK: vslb 2, 3, 4 +0x10 0x43 0x21 0x04 + +# CHECK: vslh 2, 3, 4 +0x10 0x43 0x21 0x44 + +# CHECK: vslw 2, 3, 4 +0x10 0x43 0x21 0x84 + +# CHECK: vsrb 2, 3, 4 +0x10 0x43 0x22 0x04 + +# CHECK: vsrh 2, 3, 4 +0x10 0x43 0x22 0x44 + +# CHECK: vsrw 2, 3, 4 +0x10 0x43 0x22 0x84 + +# CHECK: vsrab 2, 3, 4 +0x10 0x43 0x23 0x04 + +# CHECK: vsrah 2, 3, 4 +0x10 0x43 0x23 0x44 + +# CHECK: vsraw 2, 3, 4 +0x10 0x43 0x23 0x84 + +# CHECK: vaddfp 2, 3, 4 +0x10 0x43 0x20 0x0a + +# CHECK: vsubfp 2, 3, 4 +0x10 0x43 0x20 0x4a + +# CHECK: vmaddfp 2, 3, 4, 5 +0x10 0x43 0x29 0x2e + +# CHECK: vnmsubfp 2, 3, 4, 5 +0x10 0x43 0x29 0x2f + +# CHECK: vmaxfp 2, 3, 4 +0x10 0x43 0x24 0x0a + +# CHECK: vminfp 2, 3, 4 +0x10 0x43 0x24 0x4a + +# CHECK: vctsxs 2, 3, 4 +0x10 0x44 0x1b 0xca + +# CHECK: vctuxs 2, 3, 4 +0x10 0x44 0x1b 0x8a + +# CHECK: vcfsx 2, 3, 4 +0x10 0x44 0x1b 0x4a + +# CHECK: vcfux 2, 3, 4 +0x10 0x44 0x1b 0x0a + +# CHECK: vrfim 2, 3 +0x10 0x40 0x1a 0xca + +# CHECK: vrfin 2, 3 +0x10 0x40 0x1a 0x0a + +# CHECK: vrfip 2, 3 +0x10 0x40 0x1a 0x8a + +# CHECK: vrfiz 2, 3 +0x10 0x40 0x1a 0x4a + +# CHECK: vcmpbfp 2, 3, 4 +0x10 0x43 0x23 0xc6 + +# CHECK: vcmpbfp. 2, 3, 4 +0x10 0x43 0x27 0xc6 + +# CHECK: vcmpeqfp 2, 3, 4 +0x10 0x43 0x20 0xc6 + +# CHECK: vcmpeqfp. 2, 3, 4 +0x10 0x43 0x24 0xc6 + +# CHECK: vcmpgefp 2, 3, 4 +0x10 0x43 0x21 0xc6 + +# CHECK: vcmpgefp. 2, 3, 4 +0x10 0x43 0x25 0xc6 + +# CHECK: vcmpgtfp 2, 3, 4 +0x10 0x43 0x22 0xc6 + +# CHECK: vcmpgtfp. 2, 3, 4 +0x10 0x43 0x26 0xc6 + +# CHECK: vexptefp 2, 3 +0x10 0x40 0x19 0x8a + +# CHECK: vlogefp 2, 3 +0x10 0x40 0x19 0xca + +# CHECK: vrefp 2, 3 +0x10 0x40 0x19 0x0a + +# CHECK: vrsqrtefp 2, 3 +0x10 0x40 0x19 0x4a + +# CHECK: mtvscr 2 +0x10 0x00 0x16 0x44 + +# CHECK: mfvscr 2 +0x10 0x40 0x06 0x04 + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt new file mode 100644 index 0000000..33a8c0e --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt @@ -0,0 +1,621 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# FIXME: test b target + +# FIXME: test ba target + +# FIXME: test bl target + +# FIXME: test bla target + +# FIXME: test bc 4, 10, target + +# FIXME: test bca 4, 10, target + +# FIXME: test bcl 4, 10, target + +# FIXME: test bcla 4, 10, target + +# CHECK: bclr 4, 10, 3 +0x4c 0x8a 0x18 0x20 + +# CHECK: bclr 4, 10, 0 +0x4c 0x8a 0x00 0x20 + +# CHECK: bclrl 4, 10, 3 +0x4c 0x8a 0x18 0x21 + +# CHECK: bclrl 4, 10, 0 +0x4c 0x8a 0x00 0x21 + +# CHECK: bcctr 4, 10, 3 +0x4c 0x8a 0x1c 0x20 + +# CHECK: bcctr 4, 10, 0 +0x4c 0x8a 0x04 0x20 + +# CHECK: bcctrl 4, 10, 3 +0x4c 0x8a 0x1c 0x21 + +# CHECK: bcctrl 4, 10, 0 +0x4c 0x8a 0x04 0x21 + +# CHECK: crand 2, 3, 4 +0x4c 0x43 0x22 0x02 + +# CHECK: crnand 2, 3, 4 +0x4c 0x43 0x21 0xc2 + +# CHECK: cror 2, 3, 4 +0x4c 0x43 0x23 0x82 + +# CHECK: crxor 2, 3, 4 +0x4c 0x43 0x21 0x82 + +# CHECK: crnor 2, 3, 4 +0x4c 0x43 0x20 0x42 + +# CHECK: creqv 2, 3, 4 +0x4c 0x43 0x22 0x42 + +# CHECK: crandc 2, 3, 4 +0x4c 0x43 0x21 0x02 + +# CHECK: crorc 2, 3, 4 +0x4c 0x43 0x23 0x42 + +# CHECK: mcrf 2, 3 +0x4d 0x0c 0x00 0x00 + +# CHECK: sc 1 +0x44 0x00 0x00 0x22 + +# CHECK: sc 0 +0x44 0x00 0x00 0x02 + +# CHECK: lbz 2, 128(4) +0x88 0x44 0x00 0x80 + +# CHECK: lbzx 2, 3, 4 +0x7c 0x43 0x20 0xae + +# CHECK: lbzu 2, 128(4) +0x8c 0x44 0x00 0x80 + +# CHECK: lbzux 2, 3, 4 +0x7c 0x43 0x20 0xee + +# CHECK: lhz 2, 128(4) +0xa0 0x44 0x00 0x80 + +# CHECK: lhzx 2, 3, 4 +0x7c 0x43 0x22 0x2e + +# CHECK: lhzu 2, 128(4) +0xa4 0x44 0x00 0x80 + +# CHECK: lhzux 2, 3, 4 +0x7c 0x43 0x22 0x6e + +# CHECK: lha 2, 128(4) +0xa8 0x44 0x00 0x80 + +# CHECK: lhax 2, 3, 4 +0x7c 0x43 0x22 0xae + +# CHECK: lhau 2, 128(4) +0xac 0x44 0x00 0x80 + +# CHECK: lhaux 2, 3, 4 +0x7c 0x43 0x22 0xee + +# CHECK: lwz 2, 128(4) +0x80 0x44 0x00 0x80 + +# CHECK: lwzx 2, 3, 4 +0x7c 0x43 0x20 0x2e + +# CHECK: lwzu 2, 128(4) +0x84 0x44 0x00 0x80 + +# CHECK: lwzux 2, 3, 4 +0x7c 0x43 0x20 0x6e + +# CHECK: lwa 2, 128(4) +0xe8 0x44 0x00 0x82 + +# CHECK: lwax 2, 3, 4 +0x7c 0x43 0x22 0xaa + +# CHECK: lwaux 2, 3, 4 +0x7c 0x43 0x22 0xea + +# CHECK: ld 2, 128(4) +0xe8 0x44 0x00 0x80 + +# CHECK: ldx 2, 3, 4 +0x7c 0x43 0x20 0x2a + +# CHECK: ldu 2, 128(4) +0xe8 0x44 0x00 0x81 + +# CHECK: ldux 2, 3, 4 +0x7c 0x43 0x20 0x6a + +# CHECK: stb 2, 128(4) +0x98 0x44 0x00 0x80 + +# CHECK: stbx 2, 3, 4 +0x7c 0x43 0x21 0xae + +# CHECK: stbu 2, 128(4) +0x9c 0x44 0x00 0x80 + +# CHECK: stbux 2, 3, 4 +0x7c 0x43 0x21 0xee + +# CHECK: sth 2, 128(4) +0xb0 0x44 0x00 0x80 + +# CHECK: sthx 2, 3, 4 +0x7c 0x43 0x23 0x2e + +# CHECK: sthu 2, 128(4) +0xb4 0x44 0x00 0x80 + +# CHECK: sthux 2, 3, 4 +0x7c 0x43 0x23 0x6e + +# CHECK: stw 2, 128(4) +0x90 0x44 0x00 0x80 + +# CHECK: stwx 2, 3, 4 +0x7c 0x43 0x21 0x2e + +# CHECK: stwu 2, 128(4) +0x94 0x44 0x00 0x80 + +# CHECK: stwux 2, 3, 4 +0x7c 0x43 0x21 0x6e + +# CHECK: std 2, 128(4) +0xf8 0x44 0x00 0x80 + +# CHECK: stdx 2, 3, 4 +0x7c 0x43 0x21 0x2a + +# CHECK: stdu 2, 128(4) +0xf8 0x44 0x00 0x81 + +# CHECK: stdux 2, 3, 4 +0x7c 0x43 0x21 0x6a + +# CHECK: lhbrx 2, 3, 4 +0x7c 0x43 0x26 0x2c + +# CHECK: sthbrx 2, 3, 4 +0x7c 0x43 0x27 0x2c + +# CHECK: lwbrx 2, 3, 4 +0x7c 0x43 0x24 0x2c + +# CHECK: stwbrx 2, 3, 4 +0x7c 0x43 0x25 0x2c + +# CHECK: ldbrx 2, 3, 4 +0x7c 0x43 0x24 0x28 + +# CHECK: stdbrx 2, 3, 4 +0x7c 0x43 0x25 0x28 + +# CHECK: lmw 2, 128(1) +0xb8 0x41 0x00 0x80 + +# CHECK: stmw 2, 128(1) +0xbc 0x41 0x00 0x80 + +# CHECK: addi 2, 3, 128 +0x38 0x43 0x00 0x80 + +# CHECK: addis 2, 3, 128 +0x3c 0x43 0x00 0x80 + +# CHECK: add 2, 3, 4 +0x7c 0x43 0x22 0x14 + +# CHECK: add. 2, 3, 4 +0x7c 0x43 0x22 0x15 + +# CHECK: subf 2, 3, 4 +0x7c 0x43 0x20 0x50 + +# CHECK: subf. 2, 3, 4 +0x7c 0x43 0x20 0x51 + +# CHECK: addic 2, 3, 128 +0x30 0x43 0x00 0x80 + +# CHECK: addic. 2, 3, 128 +0x34 0x43 0x00 0x80 + +# CHECK: subfic 2, 3, 4 +0x20 0x43 0x00 0x04 + +# CHECK: addc 2, 3, 4 +0x7c 0x43 0x20 0x14 + +# CHECK: addc. 2, 3, 4 +0x7c 0x43 0x20 0x15 + +# CHECK: subfc 2, 3, 4 +0x7c 0x43 0x20 0x10 + +# CHECK: subfc 2, 3, 4 +0x7c 0x43 0x20 0x10 + +# CHECK: adde 2, 3, 4 +0x7c 0x43 0x21 0x14 + +# CHECK: adde. 2, 3, 4 +0x7c 0x43 0x21 0x15 + +# CHECK: subfe 2, 3, 4 +0x7c 0x43 0x21 0x10 + +# CHECK: subfe. 2, 3, 4 +0x7c 0x43 0x21 0x11 + +# CHECK: addme 2, 3 +0x7c 0x43 0x01 0xd4 + +# CHECK: addme. 2, 3 +0x7c 0x43 0x01 0xd5 + +# CHECK: subfme 2, 3 +0x7c 0x43 0x01 0xd0 + +# CHECK: subfme. 2, 3 +0x7c 0x43 0x01 0xd1 + +# CHECK: addze 2, 3 +0x7c 0x43 0x01 0x94 + +# CHECK: addze. 2, 3 +0x7c 0x43 0x01 0x95 + +# CHECK: subfze 2, 3 +0x7c 0x43 0x01 0x90 + +# CHECK: subfze. 2, 3 +0x7c 0x43 0x01 0x91 + +# CHECK: neg 2, 3 +0x7c 0x43 0x00 0xd0 + +# CHECK: neg. 2, 3 +0x7c 0x43 0x00 0xd1 + +# CHECK: mulli 2, 3, 128 +0x1c 0x43 0x00 0x80 + +# CHECK: mulhw 2, 3, 4 +0x7c 0x43 0x20 0x96 + +# CHECK: mulhw. 2, 3, 4 +0x7c 0x43 0x20 0x97 + +# CHECK: mullw 2, 3, 4 +0x7c 0x43 0x21 0xd6 + +# CHECK: mullw. 2, 3, 4 +0x7c 0x43 0x21 0xd7 + +# CHECK: mulhwu 2, 3, 4 +0x7c 0x43 0x20 0x16 + +# CHECK: mulhwu. 2, 3, 4 +0x7c 0x43 0x20 0x17 + +# CHECK: divw 2, 3, 4 +0x7c 0x43 0x23 0xd6 + +# CHECK: divw. 2, 3, 4 +0x7c 0x43 0x23 0xd7 + +# CHECK: divwu 2, 3, 4 +0x7c 0x43 0x23 0x96 + +# CHECK: divwu. 2, 3, 4 +0x7c 0x43 0x23 0x97 + +# CHECK: mulld 2, 3, 4 +0x7c 0x43 0x21 0xd2 + +# CHECK: mulld. 2, 3, 4 +0x7c 0x43 0x21 0xd3 + +# CHECK: mulhd 2, 3, 4 +0x7c 0x43 0x20 0x92 + +# CHECK: mulhd. 2, 3, 4 +0x7c 0x43 0x20 0x93 + +# CHECK: mulhdu 2, 3, 4 +0x7c 0x43 0x20 0x12 + +# CHECK: mulhdu. 2, 3, 4 +0x7c 0x43 0x20 0x13 + +# CHECK: divd 2, 3, 4 +0x7c 0x43 0x23 0xd2 + +# CHECK: divd. 2, 3, 4 +0x7c 0x43 0x23 0xd3 + +# CHECK: divdu 2, 3, 4 +0x7c 0x43 0x23 0x92 + +# CHECK: divdu. 2, 3, 4 +0x7c 0x43 0x23 0x93 + +# CHECK: cmpdi 2, 3, 128 +0x2d 0x23 0x00 0x80 + +# CHECK: cmpd 2, 3, 4 +0x7d 0x23 0x20 0x00 + +# CHECK: cmpldi 2, 3, 128 +0x29 0x23 0x00 0x80 + +# CHECK: cmpld 2, 3, 4 +0x7d 0x23 0x20 0x40 + +# CHECK: cmpwi 2, 3, 128 +0x2d 0x03 0x00 0x80 + +# CHECK: cmpw 2, 3, 4 +0x7d 0x03 0x20 0x00 + +# CHECK: cmplwi 2, 3, 128 +0x29 0x03 0x00 0x80 + +# CHECK: cmplw 2, 3, 4 +0x7d 0x03 0x20 0x40 + +# CHECK: twi 2, 3, 4 +0x0c 0x43 0x00 0x04 + +# CHECK: tw 2, 3, 4 +0x7c 0x43 0x20 0x08 + +# CHECK: tdi 2, 3, 4 +0x08 0x43 0x00 0x04 + +# CHECK: td 2, 3, 4 +0x7c 0x43 0x20 0x88 + +# CHECK: isel 2, 3, 4, 5 +0x7c 0x43 0x21 0x5e + +# CHECK: andi. 2, 3, 128 +0x70 0x62 0x00 0x80 + +# CHECK: andis. 2, 3, 128 +0x74 0x62 0x00 0x80 + +# CHECK: ori 2, 3, 128 +0x60 0x62 0x00 0x80 + +# CHECK: oris 2, 3, 128 +0x64 0x62 0x00 0x80 + +# CHECK: xori 2, 3, 128 +0x68 0x62 0x00 0x80 + +# CHECK: xoris 2, 3, 128 +0x6c 0x62 0x00 0x80 + +# CHECK: and 2, 3, 4 +0x7c 0x62 0x20 0x38 + +# CHECK: and. 2, 3, 4 +0x7c 0x62 0x20 0x39 + +# CHECK: xor 2, 3, 4 +0x7c 0x62 0x22 0x78 + +# CHECK: xor. 2, 3, 4 +0x7c 0x62 0x22 0x79 + +# CHECK: nand 2, 3, 4 +0x7c 0x62 0x23 0xb8 + +# CHECK: nand. 2, 3, 4 +0x7c 0x62 0x23 0xb9 + +# CHECK: or 2, 3, 4 +0x7c 0x62 0x23 0x78 + +# CHECK: or. 2, 3, 4 +0x7c 0x62 0x23 0x79 + +# CHECK: nor 2, 3, 4 +0x7c 0x62 0x20 0xf8 + +# CHECK: nor. 2, 3, 4 +0x7c 0x62 0x20 0xf9 + +# CHECK: eqv 2, 3, 4 +0x7c 0x62 0x22 0x38 + +# CHECK: eqv. 2, 3, 4 +0x7c 0x62 0x22 0x39 + +# CHECK: andc 2, 3, 4 +0x7c 0x62 0x20 0x78 + +# CHECK: andc. 2, 3, 4 +0x7c 0x62 0x20 0x79 + +# CHECK: orc 2, 3, 4 +0x7c 0x62 0x23 0x38 + +# CHECK: orc. 2, 3, 4 +0x7c 0x62 0x23 0x39 + +# CHECK: extsb 2, 3 +0x7c 0x62 0x07 0x74 + +# CHECK: extsb. 2, 3 +0x7c 0x62 0x07 0x75 + +# CHECK: extsh 2, 3 +0x7c 0x62 0x07 0x34 + +# CHECK: extsh. 2, 3 +0x7c 0x62 0x07 0x35 + +# CHECK: cntlzw 2, 3 +0x7c 0x62 0x00 0x34 + +# CHECK: cntlzw. 2, 3 +0x7c 0x62 0x00 0x35 + +# CHECK: popcntw 2, 3 +0x7c 0x62 0x02 0xf4 + +# CHECK: extsw 2, 3 +0x7c 0x62 0x07 0xb4 + +# CHECK: extsw. 2, 3 +0x7c 0x62 0x07 0xb5 + +# CHECK: cntlzd 2, 3 +0x7c 0x62 0x00 0x74 + +# CHECK: cntlzd. 2, 3 +0x7c 0x62 0x00 0x75 + +# CHECK: popcntd 2, 3 +0x7c 0x62 0x03 0xf4 + +# CHECK: rlwinm 2, 3, 4, 5, 6 +0x54 0x62 0x21 0x4c + +# CHECK: rlwinm. 2, 3, 4, 5, 6 +0x54 0x62 0x21 0x4d + +# CHECK: rlwnm 2, 3, 4, 5, 6 +0x5c 0x62 0x21 0x4c + +# CHECK: rlwnm. 2, 3, 4, 5, 6 +0x5c 0x62 0x21 0x4d + +# CHECK: rlwimi 2, 3, 4, 5, 6 +0x50 0x62 0x21 0x4c + +# CHECK: rlwimi. 2, 3, 4, 5, 6 +0x50 0x62 0x21 0x4d + +# CHECK: rldicl 2, 3, 4, 5 +0x78 0x62 0x21 0x40 + +# CHECK: rldicl. 2, 3, 4, 5 +0x78 0x62 0x21 0x41 + +# CHECK: rldicr 2, 3, 4, 5 +0x78 0x62 0x21 0x44 + +# CHECK: rldicr. 2, 3, 4, 5 +0x78 0x62 0x21 0x45 + +# CHECK: rldic 2, 3, 4, 5 +0x78 0x62 0x21 0x48 + +# CHECK: rldic. 2, 3, 4, 5 +0x78 0x62 0x21 0x49 + +# CHECK: rldcl 2, 3, 4, 5 +0x78 0x62 0x21 0x50 + +# CHECK: rldcl. 2, 3, 4, 5 +0x78 0x62 0x21 0x51 + +# CHECK: rldcr 2, 3, 4, 5 +0x78 0x62 0x21 0x52 + +# CHECK: rldcr. 2, 3, 4, 5 +0x78 0x62 0x21 0x53 + +# CHECK: rldimi 2, 3, 4, 5 +0x78 0x62 0x21 0x4c + +# CHECK: rldimi. 2, 3, 4, 5 +0x78 0x62 0x21 0x4d + +# CHECK: slw 2, 3, 4 +0x7c 0x62 0x20 0x30 + +# CHECK: slw. 2, 3, 4 +0x7c 0x62 0x20 0x31 + +# CHECK: srw 2, 3, 4 +0x7c 0x62 0x24 0x30 + +# CHECK: srw. 2, 3, 4 +0x7c 0x62 0x24 0x31 + +# CHECK: srawi 2, 3, 4 +0x7c 0x62 0x26 0x70 + +# CHECK: srawi. 2, 3, 4 +0x7c 0x62 0x26 0x71 + +# CHECK: sraw 2, 3, 4 +0x7c 0x62 0x26 0x30 + +# CHECK: sraw. 2, 3, 4 +0x7c 0x62 0x26 0x31 + +# CHECK: sld 2, 3, 4 +0x7c 0x62 0x20 0x36 + +# CHECK: sld. 2, 3, 4 +0x7c 0x62 0x20 0x37 + +# CHECK: srd 2, 3, 4 +0x7c 0x62 0x24 0x36 + +# CHECK: srd. 2, 3, 4 +0x7c 0x62 0x24 0x37 + +# CHECK: sradi 2, 3, 4 +0x7c 0x62 0x26 0x74 + +# CHECK: sradi. 2, 3, 4 +0x7c 0x62 0x26 0x75 + +# CHECK: srad 2, 3, 4 +0x7c 0x62 0x26 0x34 + +# CHECK: srad. 2, 3, 4 +0x7c 0x62 0x26 0x35 + +# CHECK: mtspr 600, 2 +0x7c 0x58 0x93 0xa6 + +# CHECK: mfspr 2, 600 +0x7c 0x58 0x92 0xa6 + +# CHECK: mtcrf 123, 2 +0x7c 0x47 0xb1 0x20 + +# CHECK: mfcr 2 +0x7c 0x40 0x00 0x26 + +# CHECK: mtocrf 16, 2 +0x7c 0x51 0x01 0x20 + +# CHECK: mfocrf 16, 8 +0x7e 0x10 0x80 0x26 + diff --git a/test/MC/Disassembler/PowerPC/ppc64-operands.txt b/test/MC/Disassembler/PowerPC/ppc64-operands.txt new file mode 100644 index 0000000..a2da322 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-operands.txt @@ -0,0 +1,94 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: add 1, 2, 3 +0x7c 0x22 0x1a 0x14 + +# CHECK: add 1, 2, 3 +0x7c 0x22 0x1a 0x14 + +# CHECK: add 0, 0, 0 +0x7c 0x00 0x02 0x14 + +# CHECK: add 31, 31, 31 +0x7f 0xff 0xfa 0x14 + +# CHECK: li 1, 0 +0x38 0x20 0x00 0x00 + +# CHECK: addi 1, 2, 0 +0x38 0x22 0x00 0x00 + +# CHECK: li 1, -32768 +0x38 0x20 0x80 0x00 + +# CHECK: li 1, 32767 +0x38 0x20 0x7f 0xff + +# CHECK: ori 1, 2, 0 +0x60 0x41 0x00 0x00 + +# CHECK: ori 1, 2, 65535 +0x60 0x41 0xff 0xff + +# CHECK: lis 1, 0 +0x3c 0x20 0x00 0x00 + +# CHECK: lis 1, -1 +0x3c 0x20 0xff 0xff + +# CHECK: lwz 1, 0(0) +0x80 0x20 0x00 0x00 + +# CHECK: lwz 1, 0(0) +0x80 0x20 0x00 0x00 + +# CHECK: lwz 1, 0(31) +0x80 0x3f 0x00 0x00 + +# CHECK: lwz 1, 0(31) +0x80 0x3f 0x00 0x00 + +# CHECK: lwz 1, -32768(2) +0x80 0x22 0x80 0x00 + +# CHECK: lwz 1, 32767(2) +0x80 0x22 0x7f 0xff + +# CHECK: ld 1, 0(0) +0xe8 0x20 0x00 0x00 + +# CHECK: ld 1, 0(0) +0xe8 0x20 0x00 0x00 + +# CHECK: ld 1, 0(31) +0xe8 0x3f 0x00 0x00 + +# CHECK: ld 1, 0(31) +0xe8 0x3f 0x00 0x00 + +# CHECK: ld 1, -32768(2) +0xe8 0x22 0x80 0x00 + +# CHECK: ld 1, 32764(2) +0xe8 0x22 0x7f 0xfc + +# CHECK: ld 1, 4(2) +0xe8 0x22 0x00 0x04 + +# CHECK: ld 1, -4(2) +0xe8 0x22 0xff 0xfc + +# CHECK: b .+1024 +0x48 0x00 0x04 0x00 + +# CHECK: ba 1024 +0x48 0x00 0x04 0x02 + +# FIXME: decode as beq 0, .+1024 +# CHECK: bc 12, 2, .+1024 +0x41 0x82 0x04 0x00 + +# FIXME: decode as beqa 0, 1024 +# CHECK: bca 12, 2, 1024 +0x41 0x82 0x04 0x02 + diff --git a/test/MC/Disassembler/PowerPC/vsx.txt b/test/MC/Disassembler/PowerPC/vsx.txt new file mode 100644 index 0000000..b5e2751 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/vsx.txt @@ -0,0 +1,452 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s + +# CHECK: lxsdx 7, 5, 31 +0x7c 0xe5 0xfc 0x98 + +# CHECK: lxvd2x 7, 5, 31 +0x7c 0xe5 0xfe 0x98 + +# CHECK: lxvdsx 7, 5, 31 +0x7c 0xe5 0xfa 0x98 + +# CHECK: lxvw4x 7, 5, 31 +0x7c 0xe5 0xfe 0x18 + +# CHECK: stxsdx 8, 5, 31 +0x7d 0x05 0xfd 0x98 + +# CHECK: stxvd2x 8, 5, 31 +0x7d 0x05 0xff 0x98 + +# CHECK: stxvw4x 8, 5, 31 +0x7d 0x05 0xff 0x18 + +# CHECK: xsabsdp 7, 27 +0xf0 0xe0 0xdd 0x64 + +# CHECK: xsadddp 7, 63, 27 +0xf0 0xff 0xd9 0x04 + +# CHECK: xscmpodp 6, 63, 27 +0xf3 0x1f 0xd9 0x5c + +# CHECK: xscmpudp 6, 63, 27 +0xf3 0x1f 0xd9 0x1c + +# CHECK: xscpsgndp 7, 63, 27 +0xf0 0xff 0xdd 0x84 + +# CHECK: xscvdpsp 7, 27 +0xf0 0xe0 0xdc 0x24 + +# CHECK: xscvdpsxds 7, 27 +0xf0 0xe0 0xdd 0x60 + +# CHECK: xscvdpsxws 7, 27 +0xf0 0xe0 0xd9 0x60 + +# CHECK: xscvdpuxds 7, 27 +0xf0 0xe0 0xdd 0x20 + +# CHECK: xscvdpuxws 7, 27 +0xf0 0xe0 0xd9 0x20 + +# CHECK: xscvspdp 7, 27 +0xf0 0xe0 0xdd 0x24 + +# CHECK: xscvsxddp 7, 27 +0xf0 0xe0 0xdd 0xe0 + +# CHECK: xscvuxddp 7, 27 +0xf0 0xe0 0xdd 0xa0 + +# CHECK: xsdivdp 7, 63, 27 +0xf0 0xff 0xd9 0xc4 + +# CHECK: xsmaddadp 7, 63, 27 +0xf0 0xff 0xd9 0x0c + +# CHECK: xsmaddmdp 7, 63, 27 +0xf0 0xff 0xd9 0x4c + +# CHECK: xsmaxdp 7, 63, 27 +0xf0 0xff 0xdd 0x04 + +# CHECK: xsmindp 7, 63, 27 +0xf0 0xff 0xdd 0x44 + +# CHECK: xsmsubadp 7, 63, 27 +0xf0 0xff 0xd9 0x8c + +# CHECK: xsmsubmdp 7, 63, 27 +0xf0 0xff 0xd9 0xcc + +# CHECK: xsmuldp 7, 63, 27 +0xf0 0xff 0xd9 0x84 + +# CHECK: xsnabsdp 7, 27 +0xf0 0xe0 0xdd 0xa4 + +# CHECK: xsnegdp 7, 27 +0xf0 0xe0 0xdd 0xe4 + +# CHECK: xsnmaddadp 7, 63, 27 +0xf0 0xff 0xdd 0x0c + +# CHECK: xsnmaddmdp 7, 63, 27 +0xf0 0xff 0xdd 0x4c + +# CHECK: xsnmsubadp 7, 63, 27 +0xf0 0xff 0xdd 0x8c + +# CHECK: xsnmsubmdp 7, 63, 27 +0xf0 0xff 0xdd 0xcc + +# CHECK: xsrdpi 7, 27 +0xf0 0xe0 0xd9 0x24 + +# CHECK: xsrdpic 7, 27 +0xf0 0xe0 0xd9 0xac + +# CHECK: xsrdpim 7, 27 +0xf0 0xe0 0xd9 0xe4 + +# CHECK: xsrdpip 7, 27 +0xf0 0xe0 0xd9 0xa4 + +# CHECK: xsrdpiz 7, 27 +0xf0 0xe0 0xd9 0x64 + +# CHECK: xsredp 7, 27 +0xf0 0xe0 0xd9 0x68 + +# CHECK: xsrsqrtedp 7, 27 +0xf0 0xe0 0xd9 0x28 + +# CHECK: xssqrtdp 7, 27 +0xf0 0xe0 0xd9 0x2c + +# CHECK: xssubdp 7, 63, 27 +0xf0 0xff 0xd9 0x44 + +# CHECK: xstdivdp 6, 63, 27 +0xf3 0x1f 0xd9 0xec + +# CHECK: xstsqrtdp 6, 27 +0xf3 0x00 0xd9 0xa8 + +# CHECK: xvabsdp 7, 27 +0xf0 0xe0 0xdf 0x64 + +# CHECK: xvabssp 7, 27 +0xf0 0xe0 0xde 0x64 + +# CHECK: xvadddp 7, 63, 27 +0xf0 0xff 0xdb 0x04 + +# CHECK: xvaddsp 7, 63, 27 +0xf0 0xff 0xda 0x04 + +# CHECK: xvcmpeqdp 7, 63, 27 +0xf0 0xff 0xdb 0x1c + +# CHECK: xvcmpeqdp. 7, 63, 27 +0xf0 0xff 0xdf 0x1c + +# CHECK: xvcmpeqsp 7, 63, 27 +0xf0 0xff 0xda 0x1c + +# CHECK: xvcmpeqsp. 7, 63, 27 +0xf0 0xff 0xde 0x1c + +# CHECK: xvcmpgedp 7, 63, 27 +0xf0 0xff 0xdb 0x9c + +# CHECK: xvcmpgedp. 7, 63, 27 +0xf0 0xff 0xdf 0x9c + +# CHECK: xvcmpgesp 7, 63, 27 +0xf0 0xff 0xda 0x9c + +# CHECK: xvcmpgesp. 7, 63, 27 +0xf0 0xff 0xde 0x9c + +# CHECK: xvcmpgtdp 7, 63, 27 +0xf0 0xff 0xdb 0x5c + +# CHECK: xvcmpgtdp. 7, 63, 27 +0xf0 0xff 0xdf 0x5c + +# CHECK: xvcmpgtsp 7, 63, 27 +0xf0 0xff 0xda 0x5c + +# CHECK: xvcmpgtsp. 7, 63, 27 +0xf0 0xff 0xde 0x5c + +# CHECK: xvcpsgndp 7, 63, 27 +0xf0 0xff 0xdf 0x84 + +# CHECK: xvcpsgnsp 7, 63, 27 +0xf0 0xff 0xde 0x84 + +# CHECK: xvcvdpsp 7, 27 +0xf0 0xe0 0xde 0x24 + +# CHECK: xvcvdpsxds 7, 27 +0xf0 0xe0 0xdf 0x60 + +# CHECK: xvcvdpsxws 7, 27 +0xf0 0xe0 0xdb 0x60 + +# CHECK: xvcvdpuxds 7, 27 +0xf0 0xe0 0xdf 0x20 + +# CHECK: xvcvdpuxws 7, 27 +0xf0 0xe0 0xdb 0x20 + +# CHECK: xvcvspdp 7, 27 +0xf0 0xe0 0xdf 0x24 + +# CHECK: xvcvspsxds 7, 27 +0xf0 0xe0 0xde 0x60 + +# CHECK: xvcvspsxws 7, 27 +0xf0 0xe0 0xda 0x60 + +# CHECK: xvcvspuxds 7, 27 +0xf0 0xe0 0xde 0x20 + +# CHECK: xvcvspuxws 7, 27 +0xf0 0xe0 0xda 0x20 + +# CHECK: xvcvsxddp 7, 27 +0xf0 0xe0 0xdf 0xe0 + +# CHECK: xvcvsxdsp 7, 27 +0xf0 0xe0 0xde 0xe0 + +# CHECK: xvcvsxwdp 7, 27 +0xf0 0xe0 0xdb 0xe0 + +# CHECK: xvcvsxwsp 7, 27 +0xf0 0xe0 0xda 0xe0 + +# CHECK: xvcvuxddp 7, 27 +0xf0 0xe0 0xdf 0xa0 + +# CHECK: xvcvuxdsp 7, 27 +0xf0 0xe0 0xde 0xa0 + +# CHECK: xvcvuxwdp 7, 27 +0xf0 0xe0 0xdb 0xa0 + +# CHECK: xvcvuxwsp 7, 27 +0xf0 0xe0 0xda 0xa0 + +# CHECK: xvdivdp 7, 63, 27 +0xf0 0xff 0xdb 0xc4 + +# CHECK: xvdivsp 7, 63, 27 +0xf0 0xff 0xda 0xc4 + +# CHECK: xvmaddadp 7, 63, 27 +0xf0 0xff 0xdb 0x0c + +# CHECK: xvmaddasp 7, 63, 27 +0xf0 0xff 0xda 0x0c + +# CHECK: xvmaddmdp 7, 63, 27 +0xf0 0xff 0xdb 0x4c + +# CHECK: xvmaddmsp 7, 63, 27 +0xf0 0xff 0xda 0x4c + +# CHECK: xvmaxdp 7, 63, 27 +0xf0 0xff 0xdf 0x04 + +# CHECK: xvmaxsp 7, 63, 27 +0xf0 0xff 0xde 0x04 + +# CHECK: xvmindp 7, 63, 27 +0xf0 0xff 0xdf 0x44 + +# CHECK: xvminsp 7, 63, 27 +0xf0 0xff 0xde 0x44 + +# FIXME: decode as xvmovdp 7, 63 +# CHECK: xvcpsgndp 7, 63, 63 +0xf0 0xff 0xff 0x86 + +# FIXME: decode as xvmovsp 7, 63 +# CHECK: xvcpsgnsp 7, 63, 63 +0xf0 0xff 0xfe 0x86 + +# CHECK: xvmsubadp 7, 63, 27 +0xf0 0xff 0xdb 0x8c + +# CHECK: xvmsubasp 7, 63, 27 +0xf0 0xff 0xda 0x8c + +# CHECK: xvmsubmdp 7, 63, 27 +0xf0 0xff 0xdb 0xcc + +# CHECK: xvmsubmsp 7, 63, 27 +0xf0 0xff 0xda 0xcc + +# CHECK: xvmuldp 7, 63, 27 +0xf0 0xff 0xdb 0x84 + +# CHECK: xvmulsp 7, 63, 27 +0xf0 0xff 0xda 0x84 + +# CHECK: xvnabsdp 7, 27 +0xf0 0xe0 0xdf 0xa4 + +# CHECK: xvnabssp 7, 27 +0xf0 0xe0 0xde 0xa4 + +# CHECK: xvnegdp 7, 27 +0xf0 0xe0 0xdf 0xe4 + +# CHECK: xvnegsp 7, 27 +0xf0 0xe0 0xde 0xe4 + +# CHECK: xvnmaddadp 7, 63, 27 +0xf0 0xff 0xdf 0x0c + +# CHECK: xvnmaddasp 7, 63, 27 +0xf0 0xff 0xde 0x0c + +# CHECK: xvnmaddmdp 7, 63, 27 +0xf0 0xff 0xdf 0x4c + +# CHECK: xvnmaddmsp 7, 63, 27 +0xf0 0xff 0xde 0x4c + +# CHECK: xvnmsubadp 7, 63, 27 +0xf0 0xff 0xdf 0x8c + +# CHECK: xvnmsubasp 7, 63, 27 +0xf0 0xff 0xde 0x8c + +# CHECK: xvnmsubmdp 7, 63, 27 +0xf0 0xff 0xdf 0xcc + +# CHECK: xvnmsubmsp 7, 63, 27 +0xf0 0xff 0xde 0xcc + +# CHECK: xvrdpi 7, 27 +0xf0 0xe0 0xdb 0x24 + +# CHECK: xvrdpic 7, 27 +0xf0 0xe0 0xdb 0xac + +# CHECK: xvrdpim 7, 27 +0xf0 0xe0 0xdb 0xe4 + +# CHECK: xvrdpip 7, 27 +0xf0 0xe0 0xdb 0xa4 + +# CHECK: xvrdpiz 7, 27 +0xf0 0xe0 0xdb 0x64 + +# CHECK: xvredp 7, 27 +0xf0 0xe0 0xdb 0x68 + +# CHECK: xvresp 7, 27 +0xf0 0xe0 0xda 0x68 + +# CHECK: xvrspi 7, 27 +0xf0 0xe0 0xda 0x24 + +# CHECK: xvrspic 7, 27 +0xf0 0xe0 0xda 0xac + +# CHECK: xvrspim 7, 27 +0xf0 0xe0 0xda 0xe4 + +# CHECK: xvrspip 7, 27 +0xf0 0xe0 0xda 0xa4 + +# CHECK: xvrspiz 7, 27 +0xf0 0xe0 0xda 0x64 + +# CHECK: xvrsqrtedp 7, 27 +0xf0 0xe0 0xdb 0x28 + +# CHECK: xvrsqrtesp 7, 27 +0xf0 0xe0 0xda 0x28 + +# CHECK: xvsqrtdp 7, 27 +0xf0 0xe0 0xdb 0x2c + +# CHECK: xvsqrtsp 7, 27 +0xf0 0xe0 0xda 0x2c + +# CHECK: xvsubdp 7, 63, 27 +0xf0 0xff 0xdb 0x44 + +# CHECK: xvsubsp 7, 63, 27 +0xf0 0xff 0xda 0x44 + +# CHECK: xvtdivdp 6, 63, 27 +0xf3 0x1f 0xdb 0xec + +# CHECK: xvtdivsp 6, 63, 27 +0xf3 0x1f 0xda 0xec + +# CHECK: xvtsqrtdp 6, 27 +0xf3 0x00 0xdb 0xa8 + +# CHECK: xvtsqrtsp 6, 27 +0xf3 0x00 0xda 0xa8 + +# CHECK: xxland 7, 63, 27 +0xf0 0xff 0xdc 0x14 + +# CHECK: xxlandc 7, 63, 27 +0xf0 0xff 0xdc 0x54 + +# CHECK: xxlnor 7, 63, 27 +0xf0 0xff 0xdd 0x14 + +# CHECK: xxlor 7, 63, 27 +0xf0 0xff 0xdc 0x94 + +# CHECK: xxlxor 7, 63, 27 +0xf0 0xff 0xdc 0xd4 + +# FIXME: decode as xxmrghd 7, 63, 27 +# CHECK: xxpermdi 7, 63, 27, 0 +0xf0 0xff 0xd8 0x54 + +# CHECK: xxmrghw 7, 63, 27 +0xf0 0xff 0xd8 0x94 + +# FIXME: decode as xxmrgld 7, 63, 27 +# CHECK: xxpermdi 7, 63, 27, 3 +0xf0 0xff 0xdb 0x54 + +# CHECK: xxmrglw 7, 63, 27 +0xf0 0xff 0xd9 0x94 + +# CHECK: xxpermdi 7, 63, 27, 2 +0xf0 0xff 0xda 0x54 + +# CHECK: xxsel 7, 63, 27, 14 +0xf0 0xff 0xdb 0xb4 + +# CHECK: xxsldwi 7, 63, 27, 1 +0xf0 0xff 0xd9 0x14 + +# FIXME: decode as xxspltd 7, 63, 1 +# CHECK: xxpermdi 7, 63, 63, 3 +0xf0 0xff 0xfb 0x56 + +# CHECK: xxspltw 7, 27, 3 +0xf0 0xe3 0xda 0x90 + +# FIXME: decode as xxswapd 7, 63 +# CHECK: xxpermdi 7, 63, 63, 2 +0xf0 0xff 0xfa 0x56 + diff --git a/test/MC/Disassembler/Sparc/lit.local.cfg b/test/MC/Disassembler/Sparc/lit.local.cfg new file mode 100644 index 0000000..4d344fa --- /dev/null +++ b/test/MC/Disassembler/Sparc/lit.local.cfg @@ -0,0 +1,4 @@ +targets = set(config.root.targets_to_build.split()) +if not 'Sparc' in targets: + config.unsupported = True + diff --git a/test/MC/Disassembler/Sparc/sparc-fp.txt b/test/MC/Disassembler/Sparc/sparc-fp.txt new file mode 100644 index 0000000..b279da8 --- /dev/null +++ b/test/MC/Disassembler/Sparc/sparc-fp.txt @@ -0,0 +1,148 @@ +# RUN: llvm-mc --disassemble %s -triple=sparc64-linux-gnu | FileCheck %s + + +# CHECK: fitos %f0, %f4 +0x89 0xa0 0x18 0x80 + +# CHECK: fitod %f0, %f4 +0x89 0xa0 0x19 0x00 + +# CHECK: fitoq %f0, %f4 +0x89 0xa0 0x19 0x80 + +# CHECK: fstoi %f0, %f4 +0x89 0xa0 0x1a 0x20 + +# CHECK: fdtoi %f0, %f4 +0x89 0xa0 0x1a 0x40 + +# CHECK: fqtoi %f0, %f4 +0x89 0xa0 0x1a 0x60 + +# CHECK: fstod %f0, %f4 +0x89 0xa0 0x19 0x20 +# CHECK: fstoq %f0, %f4 +0x89 0xa0 0x19 0xa0 + +# CHECK: fdtos %f0, %f4 +0x89 0xa0 0x18 0xc0 + +# CHECK: fdtoq %f0, %f4 +0x89 0xa0 0x19 0xc0 + +# CHECK: fqtos %f0, %f4 +0x89 0xa0 0x18 0xe0 + +# CHECK: fqtod %f0, %f4 +0x89 0xa0 0x19 0x60 + +# CHECK: fmovs %f0, %f4 +0x89 0xa0 0x00 0x20 + +# CHECK: fmovd %f0, %f4 +0x89 0xa0 0x00 0x40 + +# CHECK: fmovq %f0, %f4 +0x89 0xa0 0x00 0x60 + +# CHECK: fnegs %f0, %f4 +0x89 0xa0 0x00 0xa0 + +# CHECK: fnegd %f0, %f4 +0x89 0xa0 0x00 0xc0 + +# CHECK: fnegq %f0, %f4 +0x89 0xa0 0x00 0xe0 + +# CHECK: fabss %f0, %f4 +0x89 0xa0 0x01 0x20 + +# CHECK: fabsd %f0, %f4 +0x89 0xa0 0x01 0x40 + +# CHECK: fabsq %f0, %f4 +0x89 0xa0 0x01 0x60 + +# CHECK: fsqrts %f0, %f4 +0x89 0xa0 0x05 0x20 + +# CHECK: fsqrtd %f0, %f4 +0x89 0xa0 0x05 0x40 + +# CHECK: fsqrtq %f0, %f4 +0x89 0xa0 0x05 0x60 + +# CHECK: fadds %f0, %f4, %f8 +0x91 0xa0 0x08 0x24 + +# CHECK: faddd %f0, %f4, %f8 +0x91 0xa0 0x08 0x44 + +# CHECK: faddq %f0, %f4, %f8 +0x91 0xa0 0x08 0x64 + +# CHECK: faddd %f32, %f34, %f62 +0xbf 0xa0 0x48 0x43 + +# CHECK: faddq %f32, %f36, %f60 +0xbb 0xa0 0x48 0x65 + +# CHECK: fsubs %f0, %f4, %f8 +0x91 0xa0 0x08 0xa4 + +# CHECK: fsubd %f0, %f4, %f8 +0x91 0xa0 0x08 0xc4 + +# CHECK: fsubq %f0, %f4, %f8 +0x91 0xa0 0x08 0xe4 + +# CHECK: fmuls %f0, %f4, %f8 +0x91 0xa0 0x09 0x24 + +# CHECK: fmuld %f0, %f4, %f8 +0x91 0xa0 0x09 0x44 + +# CHECK: fmulq %f0, %f4, %f8 +0x91 0xa0 0x09 0x64 + +# CHECK: fsmuld %f0, %f4, %f8 +0x91 0xa0 0x0d 0x24 + +# CHECK: fdmulq %f0, %f4, %f8 +0x91 0xa0 0x0d 0xc4 + +# CHECK: fdivs %f0, %f4, %f8 +0x91 0xa0 0x09 0xa4 + +# CHECK: fdivd %f0, %f4, %f8 +0x91 0xa0 0x09 0xc4 + +# CHECK: fdivq %f0, %f4, %f8 +0x91 0xa0 0x09 0xe4 + +# CHECK: fcmps %fcc0, %f0, %f4 +0x81 0xa8 0x0a 0x24 + +# CHECK: fcmpd %fcc0, %f0, %f4 +0x81 0xa8 0x0a 0x44 + +# CHECK: fcmpq %fcc0, %f0, %f4 +0x81 0xa8 0x0a 0x64 + +# CHECK: fxtos %f0, %f4 +0x89 0xa0 0x10 0x80 + +# CHECK: fxtod %f0, %f4 +0x89 0xa0 0x11 0x00 + +# CHECK: fxtoq %f0, %f4 +0x89 0xa0 0x11 0x80 + +# CHECK: fstox %f0, %f4 +0x89 0xa0 0x10 0x20 + +# CHECK: fdtox %f0, %f4 +0x89 0xa0 0x10 0x40 + +# CHECK: fqtox %f0, %f4 +0x89 0xa0 0x10 0x60 diff --git a/test/MC/Disassembler/Sparc/sparc-mem.txt b/test/MC/Disassembler/Sparc/sparc-mem.txt new file mode 100644 index 0000000..6ad4be1 --- /dev/null +++ b/test/MC/Disassembler/Sparc/sparc-mem.txt @@ -0,0 +1,163 @@ +# RUN: llvm-mc --disassemble %s -triple=sparcv9-unknown-linux | FileCheck %s + +# CHECK: ldsb [%i0+%l6], %o2 +0xd4 0x4e 0x00 0x16 + +# CHECK: ldsb [%i0+32], %o2 +0xd4 0x4e 0x20 0x20 + +# CHECK: ldsb [%g1], %o4 +0xd8 0x48 0x60 0x00 + +# CHECK: ldsh [%i0+%l6], %o2 +0xd4 0x56 0x00 0x16 + +# CHECK: ldsh [%i0+32], %o2 +0xd4 0x56 0x20 0x20 + +# CHECK: ldsh [%g1], %o4 +0xd8 0x50 0x60 0x00 + +# CHECK: ldub [%i0+%l6], %o2 +0xd4 0x0e 0x00 0x16 + +# CHECK: ldub [%i0+32], %o2 +0xd4 0x0e 0x20 0x20 + +# CHECK: ldub [%g1], %o2 +0xd4 0x08 0x60 0x00 + +# CHECK: lduh [%i0+%l6], %o2 +0xd4 0x16 0x00 0x16 + +# CHECK: lduh [%i0+32], %o2 +0xd4 0x16 0x20 0x20 + +# CHECK: lduh [%g1], %o2 +0xd4 0x10 0x60 0x00 + +# CHECK: ld [%i0+%l6], %o2 +0xd4 0x06 0x00 0x16 + +# CHECK: ld [%i0+32], %o2 +0xd4 0x06 0x20 0x20 + +# CHECK: ld [%g1], %o2 +0xd4 0x00 0x60 0x00 + +# CHECK: ld [%i0+%l6], %f2 +0xc5 0x06 0x00 0x16 + +# CHECK: ld [%i0+32], %f2 +0xc5 0x06 0x20 0x20 + +# CHECK: ld [%g1], %f2 +0xc5 0x00 0x60 0x00 + +# CHECK: ldd [%i0+%l6], %f2 +0xc5 0x1e 0x00 0x16 + +# CHECK: ldd [%i0+32], %f2 +0xc5 0x1e 0x20 0x20 + +# CHECK: ldd [%g1], %f2 +0xc5 0x18 0x60 0x00 + +# CHECK: ldq [%i0+%l6], %f4 +0xc9 0x16 0x00 0x16 + +# CHECK: ldq [%i0+32], %f4 +0xc9 0x16 0x20 0x20 + +# CHECK: ldq [%g1], %f4 +0xc9 0x10 0x60 0x00 + +# CHECK: ldx [%i0+%l6], %o2 +0xd4 0x5e 0x00 0x16 + +# CHECK: ldx [%i0+32], %o2 +0xd4 0x5e 0x20 0x20 + +# CHECK: ldx [%g1], %o2 +0xd4 0x58 0x60 0x00 + +# CHECK: ldsw [%i0+%l6], %o2 +0xd4 0x46 0x00 0x16 + +# CHECK: ldsw [%i0+32], %o2 +0xd4 0x46 0x20 0x20 + +# CHECK: ldsw [%g1], %o2 +0xd4 0x40 0x60 0x00 + +# CHECK: stb %o2, [%i0+%l6] +0xd4 0x2e 0x00 0x16 + +# CHECK: stb %o2, [%i0+32] +0xd4 0x2e 0x20 0x20 + +# CHECK: stb %o2, [%g1] +0xd4 0x28 0x60 0x00 + +# CHECK: sth %o2, [%i0+%l6] +0xd4 0x36 0x00 0x16 + +# CHECK: sth %o2, [%i0+32] +0xd4 0x36 0x20 0x20 + +# CHECK: sth %o2, [%g1] +0xd4 0x30 0x60 0x00 + +# CHECK: st %o2, [%i0+%l6] +0xd4 0x26 0x00 0x16 + +# CHECK: st %o2, [%i0+32] +0xd4 0x26 0x20 0x20 + +# CHECK: st %o2, [%g1] +0xd4 0x20 0x60 0x00 + +# CHECK: st %f2, [%i0+%l6] +0xc5 0x26 0x00 0x16 + +# CHECK: st %f2, [%i0+32] +0xc5 0x26 0x20 0x20 + +# CHECK: st %f2, [%g1] +0xc5 0x20 0x60 0x00 + +# CHECK: std %f2, [%i0+%l6] +0xc5 0x3e 0x00 0x16 + +# CHECK: std %f2, [%i0+32] +0xc5 0x3e 0x20 0x20 + +# CHECK: std %f2, [%g1] +0xc5 0x38 0x60 0x00 + +# CHECK: stq %f4, [%i0+%l6] +0xc9 0x36 0x00 0x16 + +# CHECK: stq %f4, [%i0+32] +0xc9 0x36 0x20 0x20 + +# CHECK: stq %f4, [%g1] +0xc9 0x30 0x60 0x00 + +# CHECK: stx %o2, [%i0+%l6] +0xd4 0x76 0x00 0x16 + +# CHECK: stx %o2, [%i0+32] +0xd4 0x76 0x20 0x20 + +# CHECK: stx %o2, [%g1] +0xd4 0x70 0x60 0x00 + +# CHECK: swap [%i0+%l6], %o2 +0xd4 0x7e 0x00 0x16 + +# CHECK: swap [%i0+32], %o2 +0xd4 0x7e 0x20 0x20 + +# CHECK: swap [%g1], %o2 +0xd4 0x78 0x60 0x00 diff --git a/test/MC/Disassembler/Sparc/sparc.txt b/test/MC/Disassembler/Sparc/sparc.txt new file mode 100644 index 0000000..a942024 --- /dev/null +++ b/test/MC/Disassembler/Sparc/sparc.txt @@ -0,0 +1,202 @@ +# RUN: llvm-mc --disassemble %s -triple=sparc-unknown-linux | FileCheck %s + +# CHECK: add %g0, %g0, %g0 +0x80 0x00 0x00 0x00 + +# CHECK: add %g1, %g2, %g3 +0x86 0x00 0x40 0x02 + +# CHECK: add %o0, %o1, %l0 +0xa0 0x02 0x00 0x09 + +# CHECK: add %o0, 10, %l0 +0xa0 0x02 0x20 0x0a + +# CHECK: addcc %g1, %g2, %g3 +0x86 0x80 0x40 0x02 + +# CHECK: addxcc %g1, %g2, %g3 +0x86 0xc0 0x40 0x02 + +# CHECK: udiv %g1, %g2, %g3 +0x86 0x70 0x40 0x02 + +# CHECK: sdiv %g1, %g2, %g3 +0x86 0x78 0x40 0x02 + +# CHECK: and %g1, %g2, %g3 +0x86 0x08 0x40 0x02 + +# CHECK: andn %g1, %g2, %g3 +0x86 0x28 0x40 0x02 + +# CHECK: or %g1, %g2, %g3 +0x86 0x10 0x40 0x02 + +# CHECK: orn %g1, %g2, %g3 +0x86 0x30 0x40 0x02 + +# CHECK: xor %g1, %g2, %g3 +0x86 0x18 0x40 0x02 + +# CHECK: xnor %g1, %g2, %g3 +0x86 0x38 0x40 0x02 + +# CHECK: umul %g1, %g2, %g3 +0x86 0x50 0x40 0x02 + +# CHECK: smul %g1, %g2, %g3 +0x86 0x58 0x40 0x02 + +# CHECK: nop +0x01 0x00 0x00 0x00 + +# CHECK: sethi 10, %l0 +0x21 0x00 0x00 0x0a + +# CHECK: sll %g1, %g2, %g3 +0x87 0x28 0x40 0x02 + +# CHECK: sll %g1, 31, %g3 +0x87 0x28 0x60 0x1f + +# CHECK: srl %g1, %g2, %g3 +0x87 0x30 0x40 0x02 + +# CHECK: srl %g1, 31, %g3 +0x87 0x30 0x60 0x1f + +# CHECK: sra %g1, %g2, %g3 +0x87 0x38 0x40 0x02 + +# CHECK: sra %g1, 31, %g3 +0x87 0x38 0x60 0x1f + +# CHECK: sub %g1, %g2, %g3 +0x86 0x20 0x40 0x02 + +# CHECK: subcc %g1, %g2, %g3 +0x86 0xa0 0x40 0x02 + +# CHECK: subxcc %g1, %g2, %g3 +0x86 0xe0 0x40 0x02 + +# CHECK: ba 4194303 +0x10 0xbf 0xff 0xff + +# CHECK: bne 4194303 +0x12 0xbf 0xff 0xff + +# CHECK: be 4194303 +0x02 0xbf 0xff 0xff + +# CHECK: bg 4194303 +0x14 0xbf 0xff 0xff + +# CHECK: ble 4194303 +0x04 0xbf 0xff 0xff + +# CHECK: bge 4194303 +0x16 0xbf 0xff 0xff + +# CHECK: bl 4194303 +0x06 0xbf 0xff 0xff + +# CHECK: bgu 4194303 +0x18 0xbf 0xff 0xff + +# CHECK: bleu 4194303 +0x08 0xbf 0xff 0xff + +# CHECK: bcc 4194303 +0x1a 0xbf 0xff 0xff + +# CHECK: bcs 4194303 +0x0a 0xbf 0xff 0xff + +# CHECK: bpos 4194303 +0x1c 0xbf 0xff 0xff + +# CHECK: bneg 4194303 +0x0c 0xbf 0xff 0xff + +# CHECK: bvc 4194303 +0x1e 0xbf 0xff 0xff + +# CHECK: bvs 4194303 +0x0e 0xbf 0xff 0xff + +# CHECK: fbu 4194303 +0x0f 0xbf 0xff 0xff + +# CHECK: fbg 4194303 +0x0d 0xbf 0xff 0xff + +# CHECK: fbug 4194303 +0x0b 0xbf 0xff 0xff + +# CHECK: fbl 4194303 +0x09 0xbf 0xff 0xff + +# CHECK: fbul 4194303 +0x07 0xbf 0xff 0xff + +# CHECK: fblg 4194303 +0x05 0xbf 0xff 0xff + +# CHECK: fbne 4194303 +0x03 0xbf 0xff 0xff + +# CHECK: fbe 4194303 +0x13 0xbf 0xff 0xff + +# CHECK: fbue 4194303 +0x15 0xbf 0xff 0xff + +# CHECK: fbge 4194303 +0x17 0xbf 0xff 0xff + +# CHECK: fbuge 4194303 +0x19 0xbf 0xff 0xff + +# CHECK: fble 4194303 +0x1b 0xbf 0xff 0xff + +# CHECK: fbule 4194303 +0x1d 0xbf 0xff 0xff + +# CHECK: fbo 4194303 +0x1f 0xbf 0xff 0xff + +# CHECK: restore +0x81 0xe8 0x00 0x00 + +# CHECK: call 16 +0x40 0x00 0x00 0x04 + +# CHECK: add %g1, -10, %g2 +0x84 0x00 0x7f 0xf6 + +# CHECK: save %sp, -196, %sp +0x9d 0xe3 0xbf 0x3c + +# CHECK: cmp %g1, -2 +0x80 0xa0 0x7f 0xfe + +# CHECK: wr %g1, -2, %y +0x81 0x80 0x7f 0xfe + +# CHECK: unimp 12 +0x00 0x00 0x00 0x0c + +# CHECK: jmp %g1+12 +0x81,0xc0,0x60,0x0c + +# CHECK: retl +0x81 0xc3 0xe0 0x08 + +# CHECK: ret +0x81,0xc7,0xe0,0x08 + +# CHECK: rett %i7+8 +0x81 0xcf 0xe0 0x08 diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt index 78d348d..1a5634d 100644 --- a/test/MC/Disassembler/SystemZ/insns.txt +++ b/test/MC/Disassembler/SystemZ/insns.txt @@ -907,6 +907,42 @@ # CHECK: cdgbr %f15, %r15 0xb3 0xa5 0x00 0xff +# CHECK: cdlfbr %f0, 0, %r0, 1 +0xb3 0x91 0x01 0x00 + +# CHECK: cdlfbr %f0, 0, %r0, 15 +0xb3 0x91 0x0f 0x00 + +# CHECK: cdlfbr %f0, 0, %r15, 1 +0xb3 0x91 0x01 0x0f + +# CHECK: cdlfbr %f0, 15, %r0, 1 +0xb3 0x91 0xf1 0x00 + +# CHECK: cdlfbr %f4, 5, %r6, 7 +0xb3 0x91 0x57 0x46 + +# CHECK: cdlfbr %f15, 0, %r0, 1 +0xb3 0x91 0x01 0xf0 + +# CHECK: cdlgbr %f0, 0, %r0, 1 +0xb3 0xa1 0x01 0x00 + +# CHECK: cdlgbr %f0, 0, %r0, 15 +0xb3 0xa1 0x0f 0x00 + +# CHECK: cdlgbr %f0, 0, %r15, 1 +0xb3 0xa1 0x01 0x0f + +# CHECK: cdlgbr %f0, 15, %r0, 1 +0xb3 0xa1 0xf1 0x00 + +# CHECK: cdlgbr %f4, 5, %r6, 7 +0xb3 0xa1 0x57 0x46 + +# CHECK: cdlgbr %f15, 0, %r0, 1 +0xb3 0xa1 0x01 0xf0 + # CHECK: cebr %f0, %f0 0xb3 0x09 0x00 0x00 @@ -970,6 +1006,42 @@ # CHECK: cegbr %f15, %r15 0xb3 0xa4 0x00 0xff +# CHECK: celfbr %f0, 0, %r0, 1 +0xb3 0x90 0x01 0x00 + +# CHECK: celfbr %f0, 0, %r0, 15 +0xb3 0x90 0x0f 0x00 + +# CHECK: celfbr %f0, 0, %r15, 1 +0xb3 0x90 0x01 0x0f + +# CHECK: celfbr %f0, 15, %r0, 1 +0xb3 0x90 0xf1 0x00 + +# CHECK: celfbr %f4, 5, %r6, 7 +0xb3 0x90 0x57 0x46 + +# CHECK: celfbr %f15, 0, %r0, 1 +0xb3 0x90 0x01 0xf0 + +# CHECK: celgbr %f0, 0, %r0, 1 +0xb3 0xa0 0x01 0x00 + +# CHECK: celgbr %f0, 0, %r0, 15 +0xb3 0xa0 0x0f 0x00 + +# CHECK: celgbr %f0, 0, %r15, 1 +0xb3 0xa0 0x01 0x0f + +# CHECK: celgbr %f0, 15, %r0, 1 +0xb3 0xa0 0xf1 0x00 + +# CHECK: celgbr %f4, 5, %r6, 7 +0xb3 0xa0 0x57 0x46 + +# CHECK: celgbr %f15, 0, %r0, 1 +0xb3 0xa0 0x01 0xf0 + # CHECK: cfdbr %r0, 0, %f0 0xb3 0x99 0x00 0x00 @@ -1480,6 +1552,114 @@ # CHECK: clc 0(256,%r15), 0 0xd5 0xff 0xf0 0x00 0x00 0x00 +# CHECK: clfdbr %r0, 0, %f0, 1 +0xb3 0x9d 0x01 0x00 + +# CHECK: clfdbr %r0, 0, %f0, 15 +0xb3 0x9d 0x0f 0x00 + +# CHECK: clfdbr %r0, 0, %f15, 1 +0xb3 0x9d 0x01 0x0f + +# CHECK: clfdbr %r0, 15, %f0, 1 +0xb3 0x9d 0xf1 0x00 + +# CHECK: clfdbr %r4, 5, %f6, 7 +0xb3 0x9d 0x57 0x46 + +# CHECK: clfdbr %r15, 0, %f0, 1 +0xb3 0x9d 0x01 0xf0 + +# CHECK: clfebr %r0, 0, %f0, 1 +0xb3 0x9c 0x01 0x00 + +# CHECK: clfebr %r0, 0, %f0, 15 +0xb3 0x9c 0x0f 0x00 + +# CHECK: clfebr %r0, 0, %f15, 1 +0xb3 0x9c 0x01 0x0f + +# CHECK: clfebr %r0, 15, %f0, 1 +0xb3 0x9c 0xf1 0x00 + +# CHECK: clfebr %r4, 5, %f6, 7 +0xb3 0x9c 0x57 0x46 + +# CHECK: clfebr %r15, 0, %f0, 1 +0xb3 0x9c 0x01 0xf0 + +# CHECK: clfxbr %r0, 0, %f0, 1 +0xb3 0x9e 0x01 0x00 + +# CHECK: clfxbr %r0, 0, %f0, 15 +0xb3 0x9e 0x0f 0x00 + +# CHECK: clfxbr %r0, 0, %f13, 1 +0xb3 0x9e 0x01 0x0d + +# CHECK: clfxbr %r0, 15, %f0, 1 +0xb3 0x9e 0xf1 0x00 + +# CHECK: clfxbr %r4, 5, %f8, 9 +0xb3 0x9e 0x59 0x48 + +# CHECK: clfxbr %r15, 0, %f0, 1 +0xb3 0x9e 0x01 0xf0 + +# CHECK: clgdbr %r0, 0, %f0, 1 +0xb3 0xad 0x01 0x00 + +# CHECK: clgdbr %r0, 0, %f0, 15 +0xb3 0xad 0x0f 0x00 + +# CHECK: clgdbr %r0, 0, %f15, 1 +0xb3 0xad 0x01 0x0f + +# CHECK: clgdbr %r0, 15, %f0, 1 +0xb3 0xad 0xf1 0x00 + +# CHECK: clgdbr %r4, 5, %f6, 7 +0xb3 0xad 0x57 0x46 + +# CHECK: clgdbr %r15, 0, %f0, 1 +0xb3 0xad 0x01 0xf0 + +# CHECK: clgebr %r0, 0, %f0, 1 +0xb3 0xac 0x01 0x00 + +# CHECK: clgebr %r0, 0, %f0, 15 +0xb3 0xac 0x0f 0x00 + +# CHECK: clgebr %r0, 0, %f15, 1 +0xb3 0xac 0x01 0x0f + +# CHECK: clgebr %r0, 15, %f0, 1 +0xb3 0xac 0xf1 0x00 + +# CHECK: clgebr %r4, 5, %f6, 7 +0xb3 0xac 0x57 0x46 + +# CHECK: clgebr %r15, 0, %f0, 1 +0xb3 0xac 0x01 0xf0 + +# CHECK: clgxbr %r0, 0, %f0, 1 +0xb3 0xae 0x01 0x00 + +# CHECK: clgxbr %r0, 0, %f0, 15 +0xb3 0xae 0x0f 0x00 + +# CHECK: clgxbr %r0, 0, %f13, 1 +0xb3 0xae 0x01 0x0d + +# CHECK: clgxbr %r0, 15, %f0, 1 +0xb3 0xae 0xf1 0x00 + +# CHECK: clgxbr %r4, 5, %f8, 9 +0xb3 0xae 0x59 0x48 + +# CHECK: clgxbr %r15, 0, %f0, 1 +0xb3 0xae 0x01 0xf0 + # CHECK: clfhsi 0, 0 0xe5 0x5d 0x00 0x00 0x00 0x00 @@ -1996,6 +2176,42 @@ # CHECK: cxgbr %f13, %r15 0xb3 0xa6 0x00 0xdf +# CHECK: cxlfbr %f0, 0, %r0, 1 +0xb3 0x92 0x01 0x00 + +# CHECK: cxlfbr %f0, 0, %r0, 15 +0xb3 0x92 0x0f 0x00 + +# CHECK: cxlfbr %f0, 0, %r15, 1 +0xb3 0x92 0x01 0x0f + +# CHECK: cxlfbr %f0, 15, %r0, 1 +0xb3 0x92 0xf1 0x00 + +# CHECK: cxlfbr %f4, 5, %r6, 7 +0xb3 0x92 0x57 0x46 + +# CHECK: cxlfbr %f13, 0, %r0, 1 +0xb3 0x92 0x01 0xd0 + +# CHECK: cxlgbr %f0, 0, %r0, 1 +0xb3 0xa2 0x01 0x00 + +# CHECK: cxlgbr %f0, 0, %r0, 15 +0xb3 0xa2 0x0f 0x00 + +# CHECK: cxlgbr %f0, 0, %r15, 1 +0xb3 0xa2 0x01 0x0f + +# CHECK: cxlgbr %f0, 15, %r0, 1 +0xb3 0xa2 0xf1 0x00 + +# CHECK: cxlgbr %f4, 5, %r6, 7 +0xb3 0xa2 0x57 0x46 + +# CHECK: cxlgbr %f13, 0, %r0, 1 +0xb3 0xa2 0x01 0xd0 + # CHECK: cy %r0, -524288 0xe3 0x00 0x00 0x00 0x80 0x59 @@ -2545,6 +2761,336 @@ # CHECK: la %r15, 0 0x41 0xf0 0x00 0x00 +# CHECK: laa %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xf8 + +# CHECK: laa %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xf8 + +# CHECK: laa %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xf8 + +# CHECK: laa %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xf8 + +# CHECK: laa %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xf8 + +# CHECK: laa %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xf8 + +# CHECK: laa %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xf8 + +# CHECK: laa %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xf8 + +# CHECK: laa %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xf8 + +# CHECK: laa %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xf8 + +# CHECK: laa %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xf8 + +# CHECK: laag %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xe8 + +# CHECK: laag %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xe8 + +# CHECK: laag %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xe8 + +# CHECK: laag %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xe8 + +# CHECK: laag %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xe8 + +# CHECK: laag %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xe8 + +# CHECK: laag %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xe8 + +# CHECK: laag %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xe8 + +# CHECK: laag %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xe8 + +# CHECK: laag %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xe8 + +# CHECK: laag %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xe8 + +# CHECK: laal %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xfa + +# CHECK: laal %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xfa + +# CHECK: laal %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xfa + +# CHECK: laal %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xfa + +# CHECK: laal %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xfa + +# CHECK: laal %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xfa + +# CHECK: laal %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xfa + +# CHECK: laal %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xfa + +# CHECK: laal %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xfa + +# CHECK: laal %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xfa + +# CHECK: laal %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xfa + +# CHECK: laalg %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xea + +# CHECK: laalg %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xea + +# CHECK: laalg %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xea + +# CHECK: laalg %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xea + +# CHECK: laalg %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xea + +# CHECK: laalg %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xea + +# CHECK: laalg %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xea + +# CHECK: laalg %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xea + +# CHECK: laalg %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xea + +# CHECK: laalg %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xea + +# CHECK: laalg %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xea + +# CHECK: lan %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xf4 + +# CHECK: lan %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xf4 + +# CHECK: lan %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xf4 + +# CHECK: lan %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xf4 + +# CHECK: lan %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xf4 + +# CHECK: lan %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xf4 + +# CHECK: lan %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xf4 + +# CHECK: lan %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xf4 + +# CHECK: lan %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xf4 + +# CHECK: lan %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xf4 + +# CHECK: lan %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xf4 + +# CHECK: csy %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0x14 + +# CHECK: lang %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xe4 + +# CHECK: lang %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xe4 + +# CHECK: lang %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xe4 + +# CHECK: lang %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xe4 + +# CHECK: lang %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xe4 + +# CHECK: lang %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xe4 + +# CHECK: lang %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xe4 + +# CHECK: lang %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xe4 + +# CHECK: lang %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xe4 + +# CHECK: lang %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xe4 + +# CHECK: lao %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xf6 + +# CHECK: lao %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xf6 + +# CHECK: lao %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xf6 + +# CHECK: lao %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xf6 + +# CHECK: lao %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xf6 + +# CHECK: lao %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xf6 + +# CHECK: lao %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xf6 + +# CHECK: lao %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xf6 + +# CHECK: lao %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xf6 + +# CHECK: lao %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xf6 + +# CHECK: lao %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xf6 + +# CHECK: laog %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xe6 + +# CHECK: laog %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xe6 + +# CHECK: laog %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xe6 + +# CHECK: laog %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xe6 + +# CHECK: laog %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xe6 + +# CHECK: laog %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xe6 + +# CHECK: laog %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xe6 + +# CHECK: laog %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xe6 + +# CHECK: laog %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xe6 + +# CHECK: laog %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xe6 + +# CHECK: laog %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xe6 + +# CHECK: lax %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xf7 + +# CHECK: lax %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xf7 + +# CHECK: lax %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xf7 + +# CHECK: lax %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xf7 + +# CHECK: lax %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xf7 + +# CHECK: lax %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xf7 + +# CHECK: lax %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xf7 + +# CHECK: lax %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xf7 + +# CHECK: lax %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xf7 + +# CHECK: lax %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xf7 + +# CHECK: lax %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xf7 + +# CHECK: laxg %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xe7 + +# CHECK: laxg %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xe7 + +# CHECK: laxg %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xe7 + +# CHECK: laxg %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xe7 + +# CHECK: laxg %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xe7 + +# CHECK: laxg %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xe7 + +# CHECK: laxg %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xe7 + +# CHECK: laxg %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xe7 + +# CHECK: laxg %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xe7 + +# CHECK: laxg %r0, %r15, 0 +0xeb 0x0f 0x00 0x00 0x00 0xe7 + +# CHECK: laxg %r15, %r0, 0 +0xeb 0xf0 0x00 0x00 0x00 0xe7 + # CHECK: lay %r0, -524288 0xe3 0x00 0x00 0x00 0x80 0x71 diff --git a/test/MC/Disassembler/X86/avx-512.txt b/test/MC/Disassembler/X86/avx-512.txt new file mode 100644 index 0000000..e5ad2a9 --- /dev/null +++ b/test/MC/Disassembler/X86/avx-512.txt @@ -0,0 +1,59 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -mcpu=knl | FileCheck %s + +# CHECK: vpbroadcastd %xmm18, %zmm28 {%k7} {z} +0x62 0x22 0x7d 0xcf 0x58 0xe2 + +# CHECK: vbroadcastss (%rsp), %zmm28 +0x62 0x62 0x7d 0x48 0x18 0x24 0x24 + +# CHECK: vblendmpd (%rsi), %zmm2, %zmm8 {%k7} +0x62 0x72 0xed 0x4f 0x65 0x06 + +# CHECK: vpermpd (%rsi,%r10,4), %zmm2, %zmm8 +0x62 0x32 0xed 0x48 0x16 0x04 0x96 + +# CHECK: vpbroadcastmw2d %k2, %zmm8 +0x62 0xd2 0x7e 0x48 0x3a 0xd0 + +# CHECK: vpbroadcastq (%r9,%rax), %zmm28 +0x62 0x42 0xfd 0x48 0x59 0x24 0x01 + +# CHECK: vbroadcastss %xmm0, %zmm1 +0x62 0xf2 0x7d 0x48 0x18 0xc8 + +# CHECK: vextracti32x4 $4, %zmm0, (%r10) +0x62 0xd3 0x7d 0x48 0x39 0x02 0x04 + +# CHECK: vextracti32x4 $4, %zmm0, %xmm1 +0x62 0xf3 0x7d 0x48 0x39 0xc1 0x04 + +# CHECK: vinserti32x4 $1, %xmm21, %zmm5, %zmm17 +0x62 0xa3 0x55 0x48 0x38 0xcd 0x01 + +# CHECK: vmovaps %zmm21, %zmm5 {%k3} +0x62 0xb1 0x7c 0x4b 0x28 0xed + +# CHECK: vgatherdps (%rsi,%zmm0,4), %zmm1 {%k2} +0x62 0xf2 0x7d 0x4a 0x92 0x0c 0x86 + +# CHECK: vgatherdpd (%rsi,%ymm0,4), %zmm1 {%k2} +0x62 0xf2 0xfd 0x4a 0x92 0x0c 0x86 + +##################################################### +# MASK INSTRUCTIONS # +##################################################### + +# CHECK: kshiftlw $3, %k1, %k2 +0xc4 0xe3 0xf9 0x32 0xd1 0x03 + +# CHECK: kmovw (%rdi), %k1 +0xc5 0xf8 0x90 0x0f + +# CHECK: kmovw %k1, %eax +0xc5 0xf8 0x93 0xc1 + +# CHECK: kandw %k1, %k2, %k3 +0xc5 0xec 0x41 0xd9 + +# CHECK: kmovw %k5, %k1 +0xc5 0xf8 0x90 0xcd diff --git a/test/MC/Disassembler/X86/fp-stack.txt b/test/MC/Disassembler/X86/fp-stack.txt new file mode 100644 index 0000000..f9aa402 --- /dev/null +++ b/test/MC/Disassembler/X86/fp-stack.txt @@ -0,0 +1,1037 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s + +# CHECK: fadd %st(0) +0xd8,0xc0 + +# CHECK: fadd %st(1) +0xd8,0xc1 + +# CHECK: fadd %st(2) +0xd8,0xc2 + +# CHECK: fadd %st(3) +0xd8,0xc3 + +# CHECK: fadd %st(4) +0xd8,0xc4 + +# CHECK: fadd %st(5) +0xd8,0xc5 + +# CHECK: fadd %st(6) +0xd8,0xc6 + +# CHECK: fadd %st(7) +0xd8,0xc7 + +# CHECK: fmul %st(0) +0xd8,0xc8 + +# CHECK: fmul %st(1) +0xd8,0xc9 + +# CHECK: fmul %st(2) +0xd8,0xca + +# CHECK: fmul %st(3) +0xd8,0xcb + +# CHECK: fmul %st(4) +0xd8,0xcc + +# CHECK: fmul %st(5) +0xd8,0xcd + +# CHECK: fmul %st(6) +0xd8,0xce + +# CHECK: fmul %st(7) +0xd8,0xcf + +# CHECK: fcom %st(0) +0xd8,0xd0 + +# CHECK: fcom %st(1) +0xd8,0xd1 + +# CHECK: fcom %st(2) +0xd8,0xd2 + +# CHECK: fcom %st(3) +0xd8,0xd3 + +# CHECK: fcom %st(4) +0xd8,0xd4 + +# CHECK: fcom %st(5) +0xd8,0xd5 + +# CHECK: fcom %st(6) +0xd8,0xd6 + +# CHECK: fcom %st(7) +0xd8,0xd7 + +# CHECK: fcomp %st(0) +0xd8,0xd8 + +# CHECK: fcomp %st(1) +0xd8,0xd9 + +# CHECK: fcomp %st(2) +0xd8,0xda + +# CHECK: fcomp %st(3) +0xd8,0xdb + +# CHECK: fcomp %st(4) +0xd8,0xdc + +# CHECK: fcomp %st(5) +0xd8,0xdd + +# CHECK: fcomp %st(6) +0xd8,0xde + +# CHECK: fcomp %st(7) +0xd8,0xdf + +# CHECK: fsub %st(0) +0xd8,0xe0 + +# CHECK: fsub %st(1) +0xd8,0xe1 + +# CHECK: fsub %st(2) +0xd8,0xe2 + +# CHECK: fsub %st(3) +0xd8,0xe3 + +# CHECK: fsub %st(4) +0xd8,0xe4 + +# CHECK: fsub %st(5) +0xd8,0xe5 + +# CHECK: fsub %st(6) +0xd8,0xe6 + +# CHECK: fsub %st(7) +0xd8,0xe7 + +# CHECK: fsubr %st(0) +0xd8,0xe8 + +# CHECK: fsubr %st(1) +0xd8,0xe9 + +# CHECK: fsubr %st(2) +0xd8,0xea + +# CHECK: fsubr %st(3) +0xd8,0xeb + +# CHECK: fsubr %st(4) +0xd8,0xec + +# CHECK: fsubr %st(5) +0xd8,0xed + +# CHECK: fsubr %st(6) +0xd8,0xee + +# CHECK: fsubr %st(7) +0xd8,0xef + +# CHECK: fdiv %st(0) +0xd8,0xf0 + +# CHECK: fdiv %st(1) +0xd8,0xf1 + +# CHECK: fdiv %st(2) +0xd8,0xf2 + +# CHECK: fdiv %st(3) +0xd8,0xf3 + +# CHECK: fdiv %st(4) +0xd8,0xf4 + +# CHECK: fdiv %st(5) +0xd8,0xf5 + +# CHECK: fdiv %st(6) +0xd8,0xf6 + +# CHECK: fdiv %st(7) +0xd8,0xf7 + +# CHECK: fdivr %st(0) +0xd8,0xf8 + +# CHECK: fdivr %st(1) +0xd8,0xf9 + +# CHECK: fdivr %st(2) +0xd8,0xfa + +# CHECK: fdivr %st(3) +0xd8,0xfb + +# CHECK: fdivr %st(4) +0xd8,0xfc + +# CHECK: fdivr %st(5) +0xd8,0xfd + +# CHECK: fdivr %st(6) +0xd8,0xfe + +# CHECK: fdivr %st(7) +0xd8,0xff + +# CHECK: fld %st(0) +0xd9,0xc0 + +# CHECK: fld %st(1) +0xd9,0xc1 + +# CHECK: fld %st(2) +0xd9,0xc2 + +# CHECK: fld %st(3) +0xd9,0xc3 + +# CHECK: fld %st(4) +0xd9,0xc4 + +# CHECK: fld %st(5) +0xd9,0xc5 + +# CHECK: fld %st(6) +0xd9,0xc6 + +# CHECK: fld %st(7) +0xd9,0xc7 + +# CHECK: fxch %st(0) +0xd9,0xc8 + +# CHECK: fxch %st(1) +0xd9,0xc9 + +# CHECK: fxch %st(2) +0xd9,0xca + +# CHECK: fxch %st(3) +0xd9,0xcb + +# CHECK: fxch %st(4) +0xd9,0xcc + +# CHECK: fxch %st(5) +0xd9,0xcd + +# CHECK: fxch %st(6) +0xd9,0xce + +# CHECK: fxch %st(7) +0xd9,0xcf + +# CHECK: fnop +0xd9,0xd0 + +# CHECK: fchs +0xd9,0xe0 + +# CHECK: fabs +0xd9,0xe1 + +# CHECK: ftst +0xd9,0xe4 + +# CHECK: fxam +0xd9,0xe5 + +# CHECK: fld1 +0xd9,0xe8 + +# CHECK: fldl2t +0xd9,0xe9 + +# CHECK: fldl2e +0xd9,0xea + +# CHECK: fldpi +0xd9,0xeb + +# CHECK: fldlg2 +0xd9,0xec + +# CHECK: fldln2 +0xd9,0xed + +# CHECK: fldz +0xd9,0xee + +# CHECK: f2xm1 +0xd9,0xf0 + +# CHECK: fyl2x +0xd9,0xf1 + +# CHECK: fptan +0xd9,0xf2 + +# CHECK: fpatan +0xd9,0xf3 + +# CHECK: fxtract +0xd9,0xf4 + +# CHECK: fprem1 +0xd9,0xf5 + +# CHECK: fdecstp +0xd9,0xf6 + +# CHECK: fincstp +0xd9,0xf7 + +# CHECK: fprem +0xd9,0xf8 + +# CHECK: fyl2xp1 +0xd9,0xf9 + +# CHECK: fsqrt +0xd9,0xfa + +# CHECK: fsincos +0xd9,0xfb + +# CHECK: frndint +0xd9,0xfc + +# CHECK: fscale +0xd9,0xfd + +# CHECK: fsin +0xd9,0xfe + +# CHECK: fcos +0xd9,0xff + +# CHECK: fcmovb %st(0), %st(0) +0xda,0xc0 + +# CHECK: fcmovb %st(1), %st(0) +0xda,0xc1 + +# CHECK: fcmovb %st(2), %st(0) +0xda,0xc2 + +# CHECK: fcmovb %st(3), %st(0) +0xda,0xc3 + +# CHECK: fcmovb %st(4), %st(0) +0xda,0xc4 + +# CHECK: fcmovb %st(5), %st(0) +0xda,0xc5 + +# CHECK: fcmovb %st(6), %st(0) +0xda,0xc6 + +# CHECK: fcmovb %st(7), %st(0) +0xda,0xc7 + +# CHECK: fcmove %st(0), %st(0) +0xda,0xc8 + +# CHECK: fcmove %st(1), %st(0) +0xda,0xc9 + +# CHECK: fcmove %st(2), %st(0) +0xda,0xca + +# CHECK: fcmove %st(3), %st(0) +0xda,0xcb + +# CHECK: fcmove %st(4), %st(0) +0xda,0xcc + +# CHECK: fcmove %st(5), %st(0) +0xda,0xcd + +# CHECK: fcmove %st(6), %st(0) +0xda,0xce + +# CHECK: fcmove %st(7), %st(0) +0xda,0xcf + +# CHECK: fcmovbe %st(0), %st(0) +0xda,0xd0 + +# CHECK: fcmovbe %st(1), %st(0) +0xda,0xd1 + +# CHECK: fcmovbe %st(2), %st(0) +0xda,0xd2 + +# CHECK: fcmovbe %st(3), %st(0) +0xda,0xd3 + +# CHECK: fcmovbe %st(4), %st(0) +0xda,0xd4 + +# CHECK: fcmovbe %st(5), %st(0) +0xda,0xd5 + +# CHECK: fcmovbe %st(6), %st(0) +0xda,0xd6 + +# CHECK: fcmovbe %st(7), %st(0) +0xda,0xd7 + +# CHECK: fcmovu %st(0), %st(0) +0xda,0xd8 + +# CHECK: fcmovu %st(1), %st(0) +0xda,0xd9 + +# CHECK: fcmovu %st(2), %st(0) +0xda,0xda + +# CHECK: fcmovu %st(3), %st(0) +0xda,0xdb + +# CHECK: fcmovu %st(4), %st(0) +0xda,0xdc + +# CHECK: fcmovu %st(5), %st(0) +0xda,0xdd + +# CHECK: fcmovu %st(6), %st(0) +0xda,0xde + +# CHECK: fcmovu %st(7), %st(0) +0xda,0xdf + +# CHECK: fucompp +0xda,0xe9 + +# CHECK: fcmovnb %st(0), %st(0) +0xdb,0xc0 + +# CHECK: fcmovnb %st(1), %st(0) +0xdb,0xc1 + +# CHECK: fcmovnb %st(2), %st(0) +0xdb,0xc2 + +# CHECK: fcmovnb %st(3), %st(0) +0xdb,0xc3 + +# CHECK: fcmovnb %st(4), %st(0) +0xdb,0xc4 + +# CHECK: fcmovnb %st(5), %st(0) +0xdb,0xc5 + +# CHECK: fcmovnb %st(6), %st(0) +0xdb,0xc6 + +# CHECK: fcmovnb %st(7), %st(0) +0xdb,0xc7 + +# CHECK: fcmovne %st(0), %st(0) +0xdb,0xc8 + +# CHECK: fcmovne %st(1), %st(0) +0xdb,0xc9 + +# CHECK: fcmovne %st(2), %st(0) +0xdb,0xca + +# CHECK: fcmovne %st(3), %st(0) +0xdb,0xcb + +# CHECK: fcmovne %st(4), %st(0) +0xdb,0xcc + +# CHECK: fcmovne %st(5), %st(0) +0xdb,0xcd + +# CHECK: fcmovne %st(6), %st(0) +0xdb,0xce + +# CHECK: fcmovne %st(7), %st(0) +0xdb,0xcf + +# CHECK: fcmovnbe %st(0), %st(0) +0xdb,0xd0 + +# CHECK: fcmovnbe %st(1), %st(0) +0xdb,0xd1 + +# CHECK: fcmovnbe %st(2), %st(0) +0xdb,0xd2 + +# CHECK: fcmovnbe %st(3), %st(0) +0xdb,0xd3 + +# CHECK: fcmovnbe %st(4), %st(0) +0xdb,0xd4 + +# CHECK: fcmovnbe %st(5), %st(0) +0xdb,0xd5 + +# CHECK: fcmovnbe %st(6), %st(0) +0xdb,0xd6 + +# CHECK: fcmovnbe %st(7), %st(0) +0xdb,0xd7 + +# CHECK: fcmovnu %st(0), %st(0) +0xdb,0xd8 + +# CHECK: fcmovnu %st(1), %st(0) +0xdb,0xd9 + +# CHECK: fcmovnu %st(2), %st(0) +0xdb,0xda + +# CHECK: fcmovnu %st(3), %st(0) +0xdb,0xdb + +# CHECK: fcmovnu %st(4), %st(0) +0xdb,0xdc + +# CHECK: fcmovnu %st(5), %st(0) +0xdb,0xdd + +# CHECK: fcmovnu %st(6), %st(0) +0xdb,0xde + +# CHECK: fcmovnu %st(7), %st(0) +0xdb,0xdf + +# CHECK: fnclex +0xdb,0xe2 + +# CHECK: fninit +0xdb,0xe3 + +# CHECK: fucomi %st(0) +0xdb,0xe8 + +# CHECK: fucomi %st(1) +0xdb,0xe9 + +# CHECK: fucomi %st(2) +0xdb,0xea + +# CHECK: fucomi %st(3) +0xdb,0xeb + +# CHECK: fucomi %st(4) +0xdb,0xec + +# CHECK: fucomi %st(5) +0xdb,0xed + +# CHECK: fucomi %st(6) +0xdb,0xee + +# CHECK: fucomi %st(7) +0xdb,0xef + +# CHECK: fcomi %st(0) +0xdb,0xf0 + +# CHECK: fcomi %st(1) +0xdb,0xf1 + +# CHECK: fcomi %st(2) +0xdb,0xf2 + +# CHECK: fcomi %st(3) +0xdb,0xf3 + +# CHECK: fcomi %st(4) +0xdb,0xf4 + +# CHECK: fcomi %st(5) +0xdb,0xf5 + +# CHECK: fcomi %st(6) +0xdb,0xf6 + +# CHECK: fcomi %st(7) +0xdb,0xf7 + +# CHECK: fadd %st(0), %st(0) +0xdc,0xc0 + +# CHECK: fadd %st(0), %st(1) +0xdc,0xc1 + +# CHECK: fadd %st(0), %st(2) +0xdc,0xc2 + +# CHECK: fadd %st(0), %st(3) +0xdc,0xc3 + +# CHECK: fadd %st(0), %st(4) +0xdc,0xc4 + +# CHECK: fadd %st(0), %st(5) +0xdc,0xc5 + +# CHECK: fadd %st(0), %st(6) +0xdc,0xc6 + +# CHECK: fadd %st(0), %st(7) +0xdc,0xc7 + +# CHECK: fmul %st(0), %st(0) +0xdc,0xc8 + +# CHECK: fmul %st(0), %st(1) +0xdc,0xc9 + +# CHECK: fmul %st(0), %st(2) +0xdc,0xca + +# CHECK: fmul %st(0), %st(3) +0xdc,0xcb + +# CHECK: fmul %st(0), %st(4) +0xdc,0xcc + +# CHECK: fmul %st(0), %st(5) +0xdc,0xcd + +# CHECK: fmul %st(0), %st(6) +0xdc,0xce + +# CHECK: fmul %st(0), %st(7) +0xdc,0xcf + +# CHECK: fsub %st(0), %st(0) +0xdc,0xe0 + +# CHECK: fsub %st(0), %st(1) +0xdc,0xe1 + +# CHECK: fsub %st(0), %st(2) +0xdc,0xe2 + +# CHECK: fsub %st(0), %st(3) +0xdc,0xe3 + +# CHECK: fsub %st(0), %st(4) +0xdc,0xe4 + +# CHECK: fsub %st(0), %st(5) +0xdc,0xe5 + +# CHECK: fsub %st(0), %st(6) +0xdc,0xe6 + +# CHECK: fsub %st(0), %st(7) +0xdc,0xe7 + +# CHECK: fsubr %st(0), %st(0) +0xdc,0xe8 + +# CHECK: fsubr %st(0), %st(1) +0xdc,0xe9 + +# CHECK: fsubr %st(0), %st(2) +0xdc,0xea + +# CHECK: fsubr %st(0), %st(3) +0xdc,0xeb + +# CHECK: fsubr %st(0), %st(4) +0xdc,0xec + +# CHECK: fsubr %st(0), %st(5) +0xdc,0xed + +# CHECK: fsubr %st(0), %st(6) +0xdc,0xee + +# CHECK: fsubr %st(0), %st(7) +0xdc,0xef + +# CHECK: fdiv %st(0), %st(0) +0xdc,0xf0 + +# CHECK: fdiv %st(0), %st(1) +0xdc,0xf1 + +# CHECK: fdiv %st(0), %st(2) +0xdc,0xf2 + +# CHECK: fdiv %st(0), %st(3) +0xdc,0xf3 + +# CHECK: fdiv %st(0), %st(4) +0xdc,0xf4 + +# CHECK: fdiv %st(0), %st(5) +0xdc,0xf5 + +# CHECK: fdiv %st(0), %st(6) +0xdc,0xf6 + +# CHECK: fdiv %st(0), %st(7) +0xdc,0xf7 + +# CHECK: fdivr %st(0), %st(0) +0xdc,0xf8 + +# CHECK: fdivr %st(0), %st(1) +0xdc,0xf9 + +# CHECK: fdivr %st(0), %st(2) +0xdc,0xfa + +# CHECK: fdivr %st(0), %st(3) +0xdc,0xfb + +# CHECK: fdivr %st(0), %st(4) +0xdc,0xfc + +# CHECK: fdivr %st(0), %st(5) +0xdc,0xfd + +# CHECK: fdivr %st(0), %st(6) +0xdc,0xfe + +# CHECK: fdivr %st(0), %st(7) +0xdc,0xff + +# CHECK: ffree %st(0) +0xdd,0xc0 + +# CHECK: ffree %st(1) +0xdd,0xc1 + +# CHECK: ffree %st(2) +0xdd,0xc2 + +# CHECK: ffree %st(3) +0xdd,0xc3 + +# CHECK: ffree %st(4) +0xdd,0xc4 + +# CHECK: ffree %st(5) +0xdd,0xc5 + +# CHECK: ffree %st(6) +0xdd,0xc6 + +# CHECK: ffree %st(7) +0xdd,0xc7 + +# CHECK: fst %st(0) +0xdd,0xd0 + +# CHECK: fst %st(1) +0xdd,0xd1 + +# CHECK: fst %st(2) +0xdd,0xd2 + +# CHECK: fst %st(3) +0xdd,0xd3 + +# CHECK: fst %st(4) +0xdd,0xd4 + +# CHECK: fst %st(5) +0xdd,0xd5 + +# CHECK: fst %st(6) +0xdd,0xd6 + +# CHECK: fst %st(7) +0xdd,0xd7 + +# CHECK: fstp %st(0) +0xdd,0xd8 + +# CHECK: fstp %st(1) +0xdd,0xd9 + +# CHECK: fstp %st(2) +0xdd,0xda + +# CHECK: fstp %st(3) +0xdd,0xdb + +# CHECK: fstp %st(4) +0xdd,0xdc + +# CHECK: fstp %st(5) +0xdd,0xdd + +# CHECK: fstp %st(6) +0xdd,0xde + +# CHECK: fstp %st(7) +0xdd,0xdf + +# CHECK: fucom %st(0) +0xdd,0xe0 + +# CHECK: fucom %st(1) +0xdd,0xe1 + +# CHECK: fucom %st(2) +0xdd,0xe2 + +# CHECK: fucom %st(3) +0xdd,0xe3 + +# CHECK: fucom %st(4) +0xdd,0xe4 + +# CHECK: fucom %st(5) +0xdd,0xe5 + +# CHECK: fucom %st(6) +0xdd,0xe6 + +# CHECK: fucom %st(7) +0xdd,0xe7 + +# CHECK: fucomp %st(0) +0xdd,0xe8 + +# CHECK: fucomp %st(1) +0xdd,0xe9 + +# CHECK: fucomp %st(2) +0xdd,0xea + +# CHECK: fucomp %st(3) +0xdd,0xeb + +# CHECK: fucomp %st(4) +0xdd,0xec + +# CHECK: fucomp %st(5) +0xdd,0xed + +# CHECK: fucomp %st(6) +0xdd,0xee + +# CHECK: fucomp %st(7) +0xdd,0xef + +# CHECK: faddp %st(0) +0xde,0xc0 + +# CHECK: faddp %st(1) +0xde,0xc1 + +# CHECK: faddp %st(2) +0xde,0xc2 + +# CHECK: faddp %st(3) +0xde,0xc3 + +# CHECK: faddp %st(4) +0xde,0xc4 + +# CHECK: faddp %st(5) +0xde,0xc5 + +# CHECK: faddp %st(6) +0xde,0xc6 + +# CHECK: faddp %st(7) +0xde,0xc7 + +# CHECK: fmulp %st(0) +0xde,0xc8 + +# CHECK: fmulp %st(1) +0xde,0xc9 + +# CHECK: fmulp %st(2) +0xde,0xca + +# CHECK: fmulp %st(3) +0xde,0xcb + +# CHECK: fmulp %st(4) +0xde,0xcc + +# CHECK: fmulp %st(5) +0xde,0xcd + +# CHECK: fmulp %st(6) +0xde,0xce + +# CHECK: fmulp %st(7) +0xde,0xcf + +# CHECK: fcompp +0xde,0xd9 + +# CHECK: fsubp %st(0) +0xde,0xe0 + +# CHECK: fsubp %st(1) +0xde,0xe1 + +# CHECK: fsubp %st(2) +0xde,0xe2 + +# CHECK: fsubp %st(3) +0xde,0xe3 + +# CHECK: fsubp %st(4) +0xde,0xe4 + +# CHECK: fsubp %st(5) +0xde,0xe5 + +# CHECK: fsubp %st(6) +0xde,0xe6 + +# CHECK: fsubp %st(7) +0xde,0xe7 + +# CHECK: fsubrp %st(0) +0xde,0xe8 + +# CHECK: fsubrp %st(1) +0xde,0xe9 + +# CHECK: fsubrp %st(2) +0xde,0xea + +# CHECK: fsubrp %st(3) +0xde,0xeb + +# CHECK: fsubrp %st(4) +0xde,0xec + +# CHECK: fsubrp %st(5) +0xde,0xed + +# CHECK: fsubrp %st(6) +0xde,0xee + +# CHECK: fsubrp %st(7) +0xde,0xef + +# CHECK: fdivp %st(0) +0xde,0xf0 + +# CHECK: fdivp %st(1) +0xde,0xf1 + +# CHECK: fdivp %st(2) +0xde,0xf2 + +# CHECK: fdivp %st(3) +0xde,0xf3 + +# CHECK: fdivp %st(4) +0xde,0xf4 + +# CHECK: fdivp %st(5) +0xde,0xf5 + +# CHECK: fdivp %st(6) +0xde,0xf6 + +# CHECK: fdivp %st(7) +0xde,0xf7 + +# CHECK: fdivrp %st(0) +0xde,0xf8 + +# CHECK: fdivrp %st(1) +0xde,0xf9 + +# CHECK: fdivrp %st(2) +0xde,0xfa + +# CHECK: fdivrp %st(3) +0xde,0xfb + +# CHECK: fdivrp %st(4) +0xde,0xfc + +# CHECK: fdivrp %st(5) +0xde,0xfd + +# CHECK: fdivrp %st(6) +0xde,0xfe + +# CHECK: fdivrp %st(7) +0xde,0xff + +# CHECK: fnstsw %ax +0xdf,0xe0 + +# CHECK: fucompi %st(0) +0xdf,0xe8 + +# CHECK: fucompi %st(1) +0xdf,0xe9 + +# CHECK: fucompi %st(2) +0xdf,0xea + +# CHECK: fucompi %st(3) +0xdf,0xeb + +# CHECK: fucompi %st(4) +0xdf,0xec + +# CHECK: fucompi %st(5) +0xdf,0xed + +# CHECK: fucompi %st(6) +0xdf,0xee + +# CHECK: fucompi %st(7) +0xdf,0xef + +# CHECK: fcompi %st(0) +0xdf,0xf0 + +# CHECK: fcompi %st(1) +0xdf,0xf1 + +# CHECK: fcompi %st(2) +0xdf,0xf2 + +# CHECK: fcompi %st(3) +0xdf,0xf3 + +# CHECK: fcompi %st(4) +0xdf,0xf4 + +# CHECK: fcompi %st(5) +0xdf,0xf5 + +# CHECK: fcompi %st(6) +0xdf,0xf6 + +# CHECK: fcompi %st(7) +0xdf,0xf7 diff --git a/test/MC/Disassembler/X86/missing-sib.txt b/test/MC/Disassembler/X86/missing-sib.txt new file mode 100644 index 0000000..814f684 --- /dev/null +++ b/test/MC/Disassembler/X86/missing-sib.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 2>&1 | grep "invalid instruction encoding" + +# This instruction would decode as jmp32m if it didn't run out of bytes +0xff 0x24 diff --git a/test/MC/Disassembler/X86/moffs.txt b/test/MC/Disassembler/X86/moffs.txt new file mode 100644 index 0000000..67d64e8 --- /dev/null +++ b/test/MC/Disassembler/X86/moffs.txt @@ -0,0 +1,86 @@ +# RUN: llvm-mc --hdis %s -triple=i686-linux-gnu-code16 | FileCheck --check-prefix=16 %s +# RUN: llvm-mc --hdis %s -triple=i686-linux-gnu | FileCheck --check-prefix=32 %s +# RUN: llvm-mc --hdis %s -triple=x86_64-linux-gnu | FileCheck --check-prefix=64 %s + +# 16: movb 0x5a5a, %al +# 32: movb 0x5a5a5a5a, %al +# 64: movabsb 0x5a5a5a5a5a5a5a5a, %al +0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movb 0x5a5a5a5a, %al +# 32: movb 0x5a5a, %al +# 64: movabsb 0x5a5a5a5a, %al +0x67 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movw 0x5a5a, %ax +# 32: movl 0x5a5a5a5a, %eax +# 64: movabsl 0x5a5a5a5a5a5a5a5a, %eax +0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movw 0x5a5a5a5a, %ax +# 32: movl 0x5a5a, %eax +# 64: movabsl 0x5a5a5a5a, %eax +0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl 0x5a5a, %eax +# 32: movw 0x5a5a5a5a, %ax +# 64: movabsw 0x5a5a5a5a5a5a5a5a, %ax +0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl 0x5a5a5a5a, %eax +# 32: movw 0x5a5a, %ax +# 64: movabsw 0x5a5a5a5a, %ax +0x66 0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl 0x5a5a5a5a, %eax +# 32: movw 0x5a5a, %ax +# 64: movabsw 0x5a5a5a5a, %ax +0x67 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl %es:0x5a5a5a5a, %eax +# 32: movw %es:0x5a5a, %ax +# 64: movabsw %es:0x5a5a5a5a, %ax +0x67 0x26 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + + + +# 16: movb %al, 0x5a5a +# 32: movb %al, 0x5a5a5a5a +# 64: movabsb %al, 0x5a5a5a5a5a5a5a5a +0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movb %al, 0x5a5a5a5a +# 32: movb %al, 0x5a5a +# 64: movabsb %al, 0x5a5a5a5a +0x67 0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movw %ax, 0x5a5a +# 32: movl %eax, 0x5a5a5a5a +# 64: movabsl %eax, 0x5a5a5a5a5a5a5a5a +0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movw %ax, %gs:0x5a5a5a5a +# 32: movl %eax, %gs:0x5a5a +# 64: movabsl %eax, %gs:0x5a5a5a5a +0x65 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl %eax, 0x5a5a +# 32: movw %ax, 0x5a5a5a5a +# 64: movabsw %ax, 0x5a5a5a5a5a5a5a5a +0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl %eax, 0x5a5a5a5a +# 32: movw %ax, 0x5a5a +# 64: movabsw %ax, 0x5a5a5a5a +0x66 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl %eax, 0x5a5a5a5a +# 32: movw %ax, 0x5a5a +# 64: movabsw %ax, 0x5a5a5a5a +0x67 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + +# 16: movl %eax, %es:0x5a5a5a5a +# 32: movw %ax, %es:0x5a5a +# 64: movabsw %ax, %es:0x5a5a5a5a +0x67 0x26 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a + diff --git a/test/MC/Disassembler/X86/padlock.txt b/test/MC/Disassembler/X86/padlock.txt new file mode 100644 index 0000000..2060a33 --- /dev/null +++ b/test/MC/Disassembler/X86/padlock.txt @@ -0,0 +1,56 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s + +# CHECK: xstore +0x0f 0xa7 0xc0 + +# CHECK: xcryptecb +0x0f 0xa7 0xc8 + +# CHECK: xcryptcbc +0x0f 0xa7 0xd0 + +# CHECK: xcryptctr +0x0f 0xa7 0xd8 + +# CHECK: xcryptcfb +0x0f 0xa7 0xe0 + +# CHECK: xcryptofb +0x0f 0xa7 0xe8 + +# CHECK: xsha1 +0x0f 0xa6 0xc8 + +# CHECK: xsha256 +0x0f 0xa6 0xd0 + +# CHECK: montmul +0x0f 0xa6 0xc0 +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s + +# CHECK: xstore +0x0f 0xa7 0xc0 + +# CHECK: xcryptecb +0x0f 0xa7 0xc8 + +# CHECK: xcryptcbc +0x0f 0xa7 0xd0 + +# CHECK: xcryptctr +0x0f 0xa7 0xd8 + +# CHECK: xcryptcfb +0x0f 0xa7 0xe0 + +# CHECK: xcryptofb +0x0f 0xa7 0xe8 + +# CHECK: xsha1 +0x0f 0xa6 0xc8 + +# CHECK: xsha256 +0x0f 0xa6 0xd0 + +# CHECK: montmul +0x0f 0xa6 0xc0 diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 7ca0874..e6e9c7b 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -359,6 +359,18 @@ # CHECK: xchgq %r8, %rax 0x49 0x90 +# CHECK: xchgl %r9d, %eax +0x41 0x91 + +# CHECK: xchgq %r9, %rax +0x49 0x91 + +# CHECK: xchgl %ecx, %eax +0x91 + +# CHECK: xchgq %rcx, %rax +0x48 0x91 + # CHECK: addb $0, %al 0x04 0x00 diff --git a/test/MC/Disassembler/X86/x86-16.txt b/test/MC/Disassembler/X86/x86-16.txt new file mode 100644 index 0000000..93974d4 --- /dev/null +++ b/test/MC/Disassembler/X86/x86-16.txt @@ -0,0 +1,788 @@ +# RUN: llvm-mc --disassemble %s -triple=i686-linux-gnu-code16 | FileCheck %s + +# CHECK: movl $305419896, %ebx +0x66 0xbb 0x78 0x56 0x34 0x12 + +# CHECK: pause +0xf3 0x90 + +# CHECK: sfence +0x0f 0xae 0xf8 + +# CHECK: lfence +0x0f 0xae 0xe8 + +# CHECK: mfence +0x0f 0xae 0xf0 + +# CHECK: stgi +0x0f 0x01 0xdc + +# CHECK: clgi +0x0f 0x01 0xdd + +# CHECK: rdtscp +0x0f 0x01 0xf9 + +# CHECK: movl %eax, 16(%ebp) +0x67 0x66 0x89 0x45 0x10 + +# CHECK: movl %eax, -16(%ebp) +0x67 0x66 0x89 0x45 0xf0 + +# CHECK: testb %bl, %cl +0x84 0xcb + +# CHECK: cmpl %eax, %ebx +0x66 0x39 0xc3 + +# CHECK: addw %ax, %ax +0x01 0xc0 + +# CHECK: shrl %eax +0x66 0xd1 0xe8 + +# CHECK: shll %eax +0x66 0xd1 0xe0 + +# CHECK: shll %eax +0x66 0xd1 0xe0 + +# CHECK: movb 0, %al +0xa0 0x00 0x00 + +# CHECK: movw 0, %ax +0xa1 0x00 0x00 + +# CHECK: movl 0, %eax +0x66 0xa1 0x00 0x00 + +# CHECK: into +0xce + +# CHECK: int3 +0xcc + +# CHECK: int $4 +0xcd 0x04 + +# CHECK: int $127 +0xcd 0x7f + +# CHECK: pushfw +0x9c + +# CHECK: pushfl +0x66 0x9c + +# CHECK: popfw +0x9d + +# CHECK: popfl +0x66 0x9d + +# CHECK: retl +0x66 0xc3 + +# CHECK: cmoval %eax, %edx +0x66 0x0f 0x47 0xd0 + +# CHECK: cmovael %eax, %edx +0x66 0x0f 0x43 0xd0 + +# CHECK: cmovbel %eax, %edx +0x66 0x0f 0x46 0xd0 + +# CHECK: cmovbl %eax, %edx +0x66 0x0f 0x42 0xd0 + +# CHECK: cmovbw %bx, %bx +0x0f 0x42 0xdb + +# CHECK: cmovbel %eax, %edx +0x66 0x0f 0x46 0xd0 + +# CHECK: cmovbl %eax, %edx +0x66 0x0f 0x42 0xd0 + +# CHECK: cmovel %eax, %edx +0x66 0x0f 0x44 0xd0 + +# CHECK: cmovgl %eax, %edx +0x66 0x0f 0x4f 0xd0 + +# CHECK: cmovgel %eax, %edx +0x66 0x0f 0x4d 0xd0 + +# CHECK: cmovll %eax, %edx +0x66 0x0f 0x4c 0xd0 + +# CHECK: cmovlel %eax, %edx +0x66 0x0f 0x4e 0xd0 + +# CHECK: cmovbel %eax, %edx +0x66 0x0f 0x46 0xd0 + +# CHECK: cmovnel %eax, %edx +0x66 0x0f 0x45 0xd0 + +# CHECK: cmovael %eax, %edx +0x66 0x0f 0x43 0xd0 + +# CHECK: cmoval %eax, %edx +0x66 0x0f 0x47 0xd0 + +# CHECK: cmovael %eax, %edx +0x66 0x0f 0x43 0xd0 + +# CHECK: cmovnel %eax, %edx +0x66 0x0f 0x45 0xd0 + +# CHECK: cmovlel %eax, %edx +0x66 0x0f 0x4e 0xd0 + +# CHECK: cmovgel %eax, %edx +0x66 0x0f 0x4d 0xd0 + +# CHECK: cmovnel %eax, %edx +0x66 0x0f 0x45 0xd0 + +# CHECK: cmovlel %eax, %edx +0x66 0x0f 0x4e 0xd0 + +# CHECK: cmovll %eax, %edx +0x66 0x0f 0x4c 0xd0 + +# CHECK: cmovgel %eax, %edx +0x66 0x0f 0x4d 0xd0 + +# CHECK: cmovgl %eax, %edx +0x66 0x0f 0x4f 0xd0 + +# CHECK: cmovnol %eax, %edx +0x66 0x0f 0x41 0xd0 + +# CHECK: cmovnpl %eax, %edx +0x66 0x0f 0x4b 0xd0 + +# CHECK: cmovnsl %eax, %edx +0x66 0x0f 0x49 0xd0 + +# CHECK: cmovnel %eax, %edx +0x66 0x0f 0x45 0xd0 + +# CHECK: cmovol %eax, %edx +0x66 0x0f 0x40 0xd0 + +# CHECK: cmovpl %eax, %edx +0x66 0x0f 0x4a 0xd0 + +# CHECK: cmovsl %eax, %edx +0x66 0x0f 0x48 0xd0 + +# CHECK: cmovel %eax, %edx +0x66 0x0f 0x44 0xd0 + +# CHECK: fmul %st(0) +0xd8 0xc8 + +# CHECK: fadd %st(0) +0xd8 0xc0 + +# CHECK: fsub %st(0) +0xd8 0xe0 + +# CHECK: fsubr %st(0) +0xd8 0xe8 + +# CHECK: fdivr %st(0) +0xd8 0xf8 + +# CHECK: fdiv %st(0) +0xd8 0xf0 + +# CHECK: movl %cs, %eax +0x66 0x8c 0xc8 + +# CHECK: movw %cs, %ax +0x8c 0xc8 + +# CHECK: movl %cs, (%eax) +0x67 0x66 0x8c 0x08 + +# CHECK: movw %cs, (%eax) +0x67 0x8c 0x08 + +# CHECK: movl %eax, %cs +0x66 0x8e 0xc8 + +# CHECK: movl (%eax), %cs +0x67 0x66 0x8e 0x08 + +# CHECK: movw (%eax), %cs +0x67 0x8e 0x08 + +# CHECKX: movl %cr0, %eax +0x0f 0x20 0xc0 + +# CHECKX: movl %cr1, %eax +0x0f 0x20 0xc8 + +# CHECKX: movl %cr2, %eax +0x0f 0x20 0xd0 + +# CHECKX: movl %cr3, %eax +0x0f 0x20 0xd8 + +# CHECKX: movl %cr4, %eax +0x0f 0x20 0xe0 + +# CHECKX: movl %dr0, %eax +0x0f 0x21 0xc0 + +# CHECKX: movl %dr1, %eax +0x0f 0x21 0xc8 + +# CHECKX: movl %dr1, %eax +0x0f 0x21 0xc8 + +# CHECKX: movl %dr2, %eax +0x0f 0x21 0xd0 + +# CHECKX: movl %dr3, %eax +0x0f 0x21 0xd8 + +# CHECKX: movl %dr4, %eax +0x0f 0x21 0xe0 + +# CHECKX: movl %dr5, %eax +0x0f 0x21 0xe8 + +# CHECKX: movl %dr6, %eax +0x0f 0x21 0xf0 + +# CHECKX: movl %dr7, %eax +0x0f 0x21 0xf8 + +# CHECK: wait +0x9b + +# CHECK: movl %gs:124, %eax +0x65 0x66 0x8b 0x06 0x7c 0x00 + +# CHECK: pushaw +0x60 + +# CHECK: popaw +0x61 + +# CHECK: pushaw +0x60 + +# CHECK: popaw +0x61 + +# CHECK: pushal +0x66 0x60 + +# CHECK: popal +0x66 0x61 + +# CHECK: jmpw *8(%eax) +0x67 0xff 0x60 0x08 + +# CHECK: jmpl *8(%eax) +0x67 0x66 0xff 0x60 0x08 + +# CHECK: lcalll $2, $4660 +0x66 0x9a 0x34 0x12 0x00 0x00 0x02 0x00 + +# CHECK: jcxz +0xe3 0x00 + +# CHECK: jecxz +0x67 0xe3 0x00 + +# CHECK: iretw +0xcf + +# CHECK: iretw +0xcf + +# CHECK: iretl +0x66 0xcf + +# CHECK: sysretl +0x0f 0x07 + +# CHECK: sysretl +0x0f 0x07 + +# CHECK: testl -24(%ebp), %ecx +0x67 0x66 0x85 0x4d 0xe8 + +# CHECK: testl -24(%ebp), %ecx +0x67 0x66 0x85 0x4d 0xe8 + +# CHECK: pushw %cs +0x0e + +# CHECK: pushw %ds +0x1e + +# CHECK: pushw %ss +0x16 + +# CHECK: pushw %es +0x06 + +# CHECK: pushw %fs +0x0f 0xa0 + +# CHECK: pushw %gs +0x0f 0xa8 + +# CHECK: pushw %cs +0x0e + +# CHECK: pushw %ds +0x1e + +# CHECK: pushw %ss +0x16 + +# CHECK: pushw %es +0x06 + +# CHECK: pushw %fs +0x0f 0xa0 + +# CHECK: pushw %gs +0x0f 0xa8 + +# CHECK: pushl %cs +0x66 0x0e + +# CHECK: pushl %ds +0x66 0x1e + +# CHECK: pushl %ss +0x66 0x16 + +# CHECK: pushl %es +0x66 0x06 + +# CHECK: pushl %fs +0x66 0x0f 0xa0 + +# CHECK: pushl %gs +0x66 0x0f 0xa8 + +# CHECK: popw %ss +0x17 + +# CHECK: popw %ds +0x1f + +# CHECK: popw %es +0x07 + +# CHECK: popl %ss +0x66 0x17 + +# CHECK: popl %ds +0x66 0x1f + +# CHECK: popl %es +0x66 0x07 + +# CHECK: pushfl +0x66 0x9c + +# CHECK: popfl +0x66 0x9d + +# CHECK: pushfl +0x66 0x9c + +# CHECK: popfl +0x66 0x9d + +# CHECK: setb %bl +0x0f 0x92 0xc3 + +# CHECK: setb %bl +0x0f 0x92 0xc3 + +# CHECK: setae %bl +0x0f 0x93 0xc3 + +# CHECK: setae %bl +0x0f 0x93 0xc3 + +# CHECK: setbe %bl +0x0f 0x96 0xc3 + +# CHECK: seta %bl +0x0f 0x97 0xc3 + +# CHECK: setp %bl +0x0f 0x9a 0xc3 + +# CHECK: setnp %bl +0x0f 0x9b 0xc3 + +# CHECK: setl %bl +0x0f 0x9c 0xc3 + +# CHECK: setge %bl +0x0f 0x9d 0xc3 + +# CHECK: setle %bl +0x0f 0x9e 0xc3 + +# CHECK: setg %bl +0x0f 0x9f 0xc3 + +# CHECK: setne %cl +0x0f 0x95 0xc1 + +# CHECK: setb %bl +0x0f 0x92 0xc3 + +# CHECK: setb %bl +0x0f 0x92 0xc3 + +# CHECK: lcalll $31438, $31438 +0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a + +# CHECK: lcalll $31438, $31438 +0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a + +# CHECK: ljmpl $31438, $31438 +0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a + +# CHECK: ljmpl $31438, $31438 +0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a + +# CHECK: lcallw $31438, $31438 +0x9a 0xce 0x7a 0xce 0x7a + +# CHECK: lcallw $31438, $31438 +0x9a 0xce 0x7a 0xce 0x7a + +# CHECK: ljmpw $31438, $31438 +0xea 0xce 0x7a 0xce 0x7a + +# CHECK: ljmpw $31438, $31438 +0xea 0xce 0x7a 0xce 0x7a + +# CHECK: lcallw $31438, $31438 +0x9a 0xce 0x7a 0xce 0x7a + +# CHECK: lcallw $31438, $31438 +0x9a 0xce 0x7a 0xce 0x7a + +# CHECK: ljmpw $31438, $31438 +0xea 0xce 0x7a 0xce 0x7a + +# CHECK: ljmpw $31438, $31438 +0xea 0xce 0x7a 0xce 0x7a + +# CHECK: calll +0x66 0xe8 0x00 0x00 0x00 0x00 + +# CHECK: callw +0xe8 0x00 0x00 + +# CHECK: incb %al +0xfe 0xc0 + +# CHECK: incw %ax +0x40 + +# CHECK: incl %eax +0x66 0x40 + +# CHECK: decb %al +0xfe 0xc8 + +# CHECK: decw %ax +0x48 + +# CHECK: decl %eax +0x66 0x48 + +# CHECK: pshufw $14, %mm4, %mm0 +0x0f 0x70 0xc4 0x0e + +# CHECK: pshufw $90, %mm4, %mm0 +0x0f 0x70 0xc4 0x5a + +# CHECK: aaa +0x37 + +# CHECK: aad $1 +0xd5 0x01 + +# CHECK: aad +0xd5 0x0a + +# CHECK: aad +0xd5 0x0a + +# CHECK: aam $2 +0xd4 0x02 + +# CHECK: aam +0xd4 0x0a + +# CHECK: aam +0xd4 0x0a + +# CHECK: aas +0x3f + +# CHECK: daa +0x27 + +# CHECK: das +0x2f + +# CHECK: retw $31438 +0xc2 0xce 0x7a + +# CHECK: lretw $31438 +0xca 0xce 0x7a + +# CHECK: retw $31438 +0xc2 0xce 0x7a + +# CHECK: lretw $31438 +0xca 0xce 0x7a + +# CHECK: retl $31438 +0x66 0xc2 0xce 0x7a + +# CHECK: lretl $31438 +0x66 0xca 0xce 0x7a + +# CHECK: bound 2(%eax), %bx +0x67 0x62 0x58 0x02 + +# CHECK: bound 4(%ebx), %ecx +0x67 0x66 0x62 0x4b 0x04 + +# CHECK: arpl %bx, %bx +0x63 0xdb + +# CHECK: arpl %bx, 6(%ecx) +0x67 0x63 0x59 0x06 + +# CHECK: lgdtw 4(%eax) +0x67 0x0f 0x01 0x50 0x04 + +# CHECK: lgdtw 4(%eax) +0x67 0x0f 0x01 0x50 0x04 + +# CHECK: lgdtl 4(%eax) +0x67 0x66 0x0f 0x01 0x50 0x04 + +# CHECK: lidtw 4(%eax) +0x67 0x0f 0x01 0x58 0x04 + +# CHECK: lidtw 4(%eax) +0x67 0x0f 0x01 0x58 0x04 + +# CHECK: lidtl 4(%eax) +0x67 0x66 0x0f 0x01 0x58 0x04 + +# CHECK: sgdtw 4(%eax) +0x67 0x0f 0x01 0x40 0x04 + +# CHECK: sgdtw 4(%eax) +0x67 0x0f 0x01 0x40 0x04 + +# CHECK: sgdtl 4(%eax) +0x67 0x66 0x0f 0x01 0x40 0x04 + +# CHECK: sidtw 4(%eax) +0x67 0x0f 0x01 0x48 0x04 + +# CHECK: sidtw 4(%eax) +0x67 0x0f 0x01 0x48 0x04 + +# CHECK: sidtl 4(%eax) +0x67 0x66 0x0f 0x01 0x48 0x04 + +# CHECK: fcompi %st(2) +0xdf 0xf2 + +# CHECK: fcompi %st(2) +0xdf 0xf2 + +# CHECK: fcompi %st(1) +0xdf 0xf1 + +# CHECK: fucompi %st(2) +0xdf 0xea + +# CHECK: fucompi %st(2) +0xdf 0xea + +# CHECK: fucompi %st(1) +0xdf 0xe9 + +# CHECK: fldcw 32493 +0xd9 0x2e 0xed 0x7e + +# CHECK: fldcw 32493 +0xd9 0x2e 0xed 0x7e + +# CHECK: fnstcw 32493 +0xd9 0x3e 0xed 0x7e + +# CHECK: fnstcw 32493 +0xd9 0x3e 0xed 0x7e + +# CHECK: wait +0x9b + +# CHECK: fnstcw 32493 +0xd9 0x3e 0xed 0x7e + +# CHECK: wait +0x9b + +# CHECK: fnstcw 32493 +0xd9 0x3e 0xed 0x7e + +# CHECK: fnstsw 32493 +0xdd 0x3e 0xed 0x7e + +# CHECK: fnstsw 32493 +0xdd 0x3e 0xed 0x7e + +# CHECK: wait +0x9b + +# CHECK: fnstsw 32493 +0xdd 0x3e 0xed 0x7e + +# CHECK: wait +0x9b + +# CHECK: fnstsw 32493 +0xdd 0x3e 0xed 0x7e + +# CHECK: verr 32493 +0x0f 0x00 0x26 0xed 0x7e + +# CHECK: verr 32493 +0x0f 0x00 0x26 0xed 0x7e + +# CHECK: wait +0x9b + +# CHECK: fnclex +0xdb 0xe2 + +# CHECK: fnclex +0xdb 0xe2 + +# CHECK: ud2 +0x0f 0x0b + +# CHECK: ud2 +0x0f 0x0b + +# CHECK: ud2b +0x0f 0xb9 + +# CHECK: loope +0xe1 0x00 + +# CHECK: loopne +0xe0 0x00 + +# CHECK: outsb +0x6e + +# CHECK: outsw +0x6f + +# CHECK: outsl +0x66 0x6f + +# CHECK: insb +0x6c + +# CHECK: insw +0x6d + +# CHECK: insl +0x66 0x6d + +# CHECK: movsb +0xa4 + +# CHECK: movsw +0xa5 + +# CHECK: movsl +0x66 0xa5 + +# CHECK: lodsb +0xac + +# CHECK: lodsw +0xad + +# CHECK: lodsl +0x66 0xad + +# CHECK: stosb +0xaa + +# CHECK: stosw +0xab + +# CHECK: stosl +0x66 0xab + +# CHECK: strw %ax +0x0f 0x00 0xc8 + +# CHECK: strl %eax +0x66 0x0f 0x00 0xc8 + +# CHECK: fsubp %st(1) +0xde 0xe1 + +# CHECK: fsubp %st(2) +0xde 0xe2 + +# CHECKX: nop +0x66 0x90 + +# CHECKX: nop +0x90 + +# CHECK: xchgl %ecx, %eax +0x66 0x91 + +# CHECK: xchgl %ecx, %eax +0x66 0x91 + +# CHECK: retw +0xc3 + +# CHECK: retl +0x66 0xc3 + +# CHECK: lretw +0xcb + +# CHECK: lretl +0x66 0xcb + diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index b6a62c4..a4a0b2c 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -696,3 +696,15 @@ # CHECK: vmovq %xmm0, %xmm0 0xc5 0xfa 0x7e 0xc0 + +# CHECK: movl %fs:0, %eax +0x64 0xa1 0x00 0x00 0x00 0x00 + +# CHECK: movb $-1, %al +0xc6 0xc0 0xff + +# CHECK: movw $65535, %ax +0x66 0xc7 0xc0 0xff 0xff + +# CHECK: movl $4294967295, %eax +0xc7 0xc0 0xff 0xff 0xff 0xff diff --git a/test/MC/Disassembler/X86/x86-64.txt b/test/MC/Disassembler/X86/x86-64.txt index 8c6bc0e..6f072df 100644 --- a/test/MC/Disassembler/X86/x86-64.txt +++ b/test/MC/Disassembler/X86/x86-64.txt @@ -241,3 +241,27 @@ # CHECK: pextrw $3, %xmm3, (%rax) 0x66 0x0f 0x3a 0x15 0x18 0x03 + +# CHECK: $0, 305419896(,%r8) +0x43 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00 + +# CHECK: $0, 305419896(%r13,%r8) +0x43 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00 + +# CHECK: $0, 305419896(,%r8) +0x42 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00 + +# CHECK: $0, 305419896(%rbp,%r8) +0x42 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00 + +# CHECK: $0, 305419896(,%r12) +0x42 0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00 + +# CHECK: $0, 305419896(%rbp,%r12) +0x42 0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00 + +# CHECK: $0, 305419896 +0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00 + +# CHECK: $0, 305419896(%rbp) +0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00 |